CAT661 High Frequency 100 mA CMOS Charge Pump, Inverter/Doubler Description The CAT661 is a charge−pump voltage converter. It can invert a positive input voltage to a negative output. Only two external capacitors are needed. With a guaranteed 100 mA output current capability, the CAT661 can replace a switching regulator and its inductor. Lower EMI is achieved due to the absence of an inductor. In addition, the CAT661 can double a voltage supplied from a battery or power supply. Inputs from 2.5 V to 5.5 V will yield a doubled, 5 V to 11 V output. A Frequency Control pin (BOOST/FC) is provided to select either a high (typically 135 kHz) or low (25 kHz) internal oscillator frequency, thus allowing quiescent current vs. capacitor size trade−offs to be made. The 135 kHz frequency is selected when the FC pin is connected to V+. The operating frequency can also be adjusted with an external capacitor at the OSC pin or by driving OSC with an external clock. Both 8−pin DIP and SO packages are available. For die availability, contact ON Semiconductor marketing. The CAT661 can replace the MAX660 and the LTC660 in applications where higher oscillator frequency and smaller capacitors are needed. In addition, the CAT661 is pin compatible with the 7660/1044, offering an easy upgrade for applications with 100 mA loads. http://onsemi.com SOIC−8 V SUFFIX CASE 751BD PIN CONFIGURATION BOOST/FC • • • • Converts V+ to V− or V+ to 2V+ Low Output Resistance, 10 W Max. High Power Efficiency Selectable Charge Pump Frequency of 25 kHz or 135 kHz; Optimize Capacitor Size Low Quiescent Current Pin−compatible to MAX660, LTC660 with Higher Frequency Operation Available in 8−pin SOIC and DIP Packages These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant May, 2010 − Rev. 11 OSC GND LV CAP− OUT (Top View) 661ELA 1 661EVA 661ELA = CAT661ELA 661EVA = CAT661EVA or 660EVA = CAT661EVA−T3 ORDERING INFORMATION Device Negative Voltage Generator Voltage Doubler Voltage Splitter Low EMI Power Source GaAs FET Biasing Lithium Battery Power Supply Instrumentation LCD Contrast Bias Cellular Phones, Pagers © Semiconductor Components Industries, LLC, 2010 V+ MARKING DIAGRAMS Applications • • • • • • • • • 1 CAP+ Features • • • • PDIP−8 L SUFFIX CASE 646AA Package Shipping CAT661ELA PDIP−8 (Pb−Free) 50 / Tube CAT661EVA SOIC−8 (Pb−Free) 100 / Tube CAT661EVA−T3 SOIC−8 (Pb−Free) 3,000 / Tape & Reel Publication Order Number: CAT661/D CAT661 Typical Application +VIN 1.5 V to 5.5 V 1 2 C1 + 1 mF to 100 mF 3 4 V+ BOOST/FC CAP+ GND CAT661 CAP− OSC LV OUT 8 7 6 5 C2 1 mF to 100 mF Inverted Negative Voltage Output C1 1 + VIN = 2.5 V to 5.5 V 1 mF to 100 mF Figure 1. Voltage Inverter 2 3 4 BOOST/FC CAP+ GND CAP− V+ CAT661 OSC LV OUT 8 7 6 Doubled Positive Voltage C2 Output 1 mF to 100 mF 5 Figure 2. Positive Voltage Doubler Table 1. PIN DESCRIPTIONS Circuit Configuration Pin Number Name Inverter Mode 1 Boost/FC Frequency Control for the internal oscillator. With an external oscillator BOOST/FC has no effect. Boost/FC Oscillator Frequency Doubler Mode Same as inverter. Oscillator Frequency Open 25 kHz typical, 10 kHz minimum 40 kHz typical V+ 135 kHz typical, 80 kHz minimum 135 kHz typical, 40 kHz minimum 2 CAP+ Charge Pump Capacitor. Positive terminal. Same as inverter. 3 GND Power Supply Ground. Power supply. Positive voltage input. 4 CAP− Charge pump capacitor. Negative terminal. Same as inverter. 5 OUT Output for negative voltage. Power supply ground. 6 LV Low−Voltage selection pin. When the input voltage is less than 3 V, connect LV to GND. For input voltages above 3 V, LV may be connected to GND or left open. If OSC is driven externally, connect LV to GND. LV must be tied to OUT for all input voltages. 7 OSC Oscillator control input. An external capacitor can be connected to lower the oscillator frequency. An external oscillator can drive OSC and set the chip operating frequency. The charge−pump frequency is one−half the frequency at OSC. Same as inverter. Do not overdrive OSC in doubling mode. Standard logic levels will not be suitable. See the applications section for additional information. 8 V+ Power supply. Positive voltage input. Positive voltage output. http://onsemi.com 2 CAT661 Table 2. ABSOLUTE MAXIMUM RATINGS Parameters Ratings Units 6 V −0.3 to (V+ + 0.3) V The least negative of (Out − 0.3 V) or (V+ − 6 V) to (V+ + 0.3 V) V 1 sec. 730 500 1 mW mW W −65 to +160 °C 300 °C V+ to GND Input Voltage (Pins 1, 6 and 7) BOOST/FC and OSC Input Voltage Output Short−circuit Duration to GND (OUT may be shorted to GND for 1 sec without damage but shorting OUT to V+ should be avoided.) Continuous Power Dissipation (TA = 70°C) Plastic DIP SO TDFN Storage Temperature Lead Soldering Temperature (10 sec) ESD Rating − Human Body Model Operating Ambient Temperature Range 2000 V −40 to +85 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: TA = Ambient Temperature Table 3. ELECTRICAL CHARACTERISTICS (V+ = 5 V, C1 = C2 = 100 mF, Boost/FC = Open, COSC = 0 pF, and Test Circuit is Figure 3 unless otherwise noted. Temperature is TA = TAMIN to TAMAX unless otherwise noted.) Parameter Supply Voltage Supply Current Symbol VS IS Conditions Min Inverter: LV = Open, RL = 1 kW Max Units 3.0 5.5 V Inverter: LV = GND, RL = 1 kW 1.5 5.5 Doubler: LV = OUT, RL = 1 kW 2.5 5.5 BOOST/FC = open, LV = Open BOOST/FC = V+, LV = Open Output Current Output Resistance IOUT RO Oscillator Frequency (Note 3) FOSC OSC Input Current IOSC Power Efficiency PE OUT is more negative than −4 V VEFF 0.2 0.5 1 3 100 3.5 10 C1 = C2 = 100 mF (Note 2) 3.5 10 BOOST/FC = Open 10 25 BOOST/FC = V+ 80 135 BOOST/FC = Open BOOST/FC = V+ W kHz ±2 ±10 mA % RL = 1 kW connected between V+ and OUT, TA = 25°C (Doubler) 96 98 RL = 500 W connected between GND and OUT, TA = 25°C (Inverter) 92 96 99 99.9 No load, TA = 25°C mA mA C1 = C2 = 10 mF BOOST/FC = V+ (C1, C2 ESR ≤ 0.5 W) IL = 100 mA to GND, TA = 25°C (Inverter) Voltage Conversion Efficiency Typ 88 % 1. In Figure 3, test circuit electrolytic capacitors C1 and C2 are 100 mF and have 0.2 W maximum ESR. Higher ESR levels may reduce efficiency and output voltage. 2. The output resistance is a combination of the internal switch resistance and the external capacitor ESR. For maximum voltage and efficiency keep external capacitor ESR under 0.2 W. 3. FOSC is tested with COSC = 100 pF to minimize test fixture loading. The test is correlated back to COSC = 0 pF to simulate the capacitance at OSC when the device is inserted into a test socket without an external COSC. http://onsemi.com 3 CAT661 Voltage Inverter CAT661 1 V+ 2 + C1 100 mF 3 4 BOOST/FC V+ OSC CAP+ LV GND OUT CAP− 8 IS V+ 5V External Oscillator 7 6 RL COSC IL 5 + VOUT C2 100 mF Figure 3. Test Circuit Voltage Inverter TYPICAL OPERATING CHARACTERISTICS (Typical characteristic curves are generated using the test circuit in Figure 3. Inverter test conditions are: V+ = 5 V, LV = GND, BOOST/FC = Open and TA = 25°C unless otherwise indicated. Note that the charge−pump frequency is one−half the oscillator frequency.) 1400 250 INPUT CURRENT (mA) INPUT CURRENT (mA) 1200 1000 800 FC = V+ 600 400 FC = open 200 0 1 2 3 4 5 150 VIN = 3 V 100 VIN = 2 V 50 −25 0 25 50 75 100 INPUT VOLTAGE (V) TEMPERATURE (°C) Figure 4. Supply Current vs. Input Voltage Figure 5. Supply Current vs. Temperature (No Load) 125 8 OUTPUT RESISTANCE (W) OUTPUT RESISTANCE (W) VIN = 5 V 0 −50 6 10 8 6 4 2 0 200 1 2 3 4 5 7 6 5 4 VIN = 5 V 3 2 −50 6 VIN = 2 V VIN = 3 V −25 0 25 50 75 100 125 INPUT VOLTAGE (V) TEMPERATURE (°C) Figure 6. Output Resistance vs. Input Voltage Figure 7. Output Resistance vs. Temperature (50 W Load) http://onsemi.com 4 CAT661 1.0 4.8 0.8 4.6 4.4 4.2 4.0 FREQUENCY (kHz) OUTPUT VOLTAGE (V) 5.0 0 20 40 60 80 0.4 V+ = 5 V 0.2 0 20 40 60 80 100 LOAD CURRENT (mA) Figure 8. Inverted Output Voltage vs. Load, V+ = 5 V Figure 9. Output Voltage Drop vs. Load Current 50 200 40 160 30 20 0 V+ = 3 V LOAD CURRENT (mA) FC = Open 120 FC = V+ 80 40 10 1 2 3 4 5 0 6 1 3 2 4 5 6 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure 10. Oscillator Frequency vs. Supply Voltage Figure 11. Oscillator Frequency vs. Supply Voltage 100 10,000 No Load V+ = 5 V 90 EFFICIENCY (%) INPUT CURRENT (mA) 0.6 0 100 FREQUENCY (kHz) INV. OUTPUT VOLTAGE (V) TYPICAL OPERATING CHARACTERISTICS 1,000 100 V+ = 3 V 80 70 60 50 10 1 10 100 1,000 40 0 10 20 30 40 50 60 70 80 90 100 OSCILLATOR FREQUENCY (kHz) LOAD CURRENT (mA) Figure 12. Supply Current vs. Oscillator Frequency Figure 13. Efficiency vs. Load Current http://onsemi.com 5 CAT661 Voltage Doubler CAT661 1 V+ 2 C1 + 100 mF V+ 5V 3 4 BOOST/FC V+ OSC CAP+ LV GND OUT CAP− 8 10 V VOUT 7 External Oscillator 6 5 C2 100 μF Figure 14. Test Circuit Voltage Doubler TYPICAL OPERATING CHARACTERISTICS (Typical characteristic curves are generated using the circuit in Figure 14. Doubler test conditions are: V+ = 5 V, LV = GND, BOOST/FC = Open and TA = 25°C unless otherwise indicated.) 3000 10 OUTPUT RESISTANCE (W) INPUT CURRENT (mA) 2500 2000 1500 FC = V+ 1000 FC = open 500 0 0 1 2 3 4 5 4 2 1 2 3 4 5 6 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Figure 15. Supply Current vs. Input Voltage (No Load) Figure 16. Output Resistance vs. Input Voltage 1.0 No Load OUTPUT VOLTAGE (V) INPUT CURRENT (mA) 6 0 6 10,000 1,000 100 10 8 1 10 100 1,000 0.8 0.6 V+ = 3 V 0.4 V+ = 5 V 0.2 0 0 20 40 60 80 OSCILLATOR FREQUENCY (kHz) LOAD CURRENT (mA) Figure 17. Supply Current vs. Oscillator Frequency Figure 18. Output Voltage Drop vs. Load Current http://onsemi.com 6 100 CAT661 Application Information Circuit Description and Operating Theory The CAT661 switches capacitors to invert or double an input voltage. Figure 19 shows a simple switch capacitor circuit. In position 1 capacitor C1 is charged to voltage V1. The total charge on C1 is Q1 = C1V1. When the switch moves to position 2, the input capacitor C1 is discharged to voltage V2. After discharge, the charge on C1 is Q2 = C1V2. The charge transferred is: DQ + Q1 * Q2 + C1 Figure 20. This circuit does not include the switch resistance nor does it include output voltage ripple. It does allow one to understand the switch−capacitor topology and make prudent engineering tradeoffs. For example, power conversion efficiency is set by the output impedance, which consists of REQ and switch resistance. As switching frequency is decreased, REQ, the 1/FC1 term, will dominate the output impedance, causing higher voltage losses and decreased efficiency. As the frequency is increased quiescent current increases. At high frequency this current becomes significant and the power efficiency degrades. The oscillator is designed to operate where voltage losses are a minimum. With external 150 mF capacitors, the internal switch resistances and the Equivalent Series Resistance (ESR) of the external capacitors determine the effective output impedance. A block diagram of the CAT661 is shown in Figure 21. (V1 * V2) If the switch is cycled “F” times per second, the current (charge transfer per unit time) is: I+F DQ + F C1 (V1 * V2) Rearranging in terms of impedance: I+ (V1 * V2) + V1 * V2 REQ (1ńFC1) The 1/FC1 term can be modeled as an equivalent impedance REQ. A simple equivalent circuit is shown in REQ V2 V1 C1 C2 V2 V1 RL C2 RL REQ + 1 FC1 Figure 19. Switched−Capacitor Building Block Figure 20. Switched−Capacitor Equivalent Circuit http://onsemi.com 7 CAT661 Oscillator Frequency Control By connecting the BOOST/FC pin to V+, the charge and discharge currents are increased, and the frequency is increased by approximately 6 times. Increasing the frequency will decrease the output impedance and ripple currents. This can be an advantage at high load currents. Increasing the frequency raises quiescent current but allows smaller capacitance values for C1 and C2. If pin 7, OSC, is loaded with an external capacitor the frequency is lowered. By using the BOOST/FC pin and an external capacitor at OSC, the operating frequency can be set. Note that the frequency appearing at CAP+ or CAP− is one−half that of the oscillator. Driving the CAT661 from an external frequency source can be easily achieved by driving Pin 7 and leaving the BOOST pin open, as shown in Figure 22. The output current from Pin 7 is small, typically 1 mA to 8 mA, so a CMOS can drive the OSC pin. For 5 V applications, a TTL logic gate can be used if an external 100 kΩ pull−up resistor is used as shown in Figure 23. The switching frequency can be raised, lowered or driven from an external source. Figure 22 shows a functional diagram of the oscillator circuit. The CAT661 oscillator has four control modes: Table 4. OSC Pin Connection Nominal Oscillator Frequency Open Open 25 kHz BOOST/FC = V+ Open 135 kHz Open or BOOST/FC = V+ External Capacitor − External Clock Frequency of external clock BOOST/FC Pin Connection Open If BOOST/FC and OSC are left floating (Open), the nominal oscillator frequency is 25 kHz. The pump frequency is one−half the oscillator frequency. V+ (8) SW1 BOOST/FC f 8x (1) OSC + B2 CAP− (4) f OSC (7) SW2 CAP+ (2) C1 VOUT (5) C2 + LV (6) CLOSED WHEN V+ > 3.0 V GND (3) Figure 21. CAT661 Block Diagram http://onsemi.com 8 (N) = Pin Number CAT661 Capacitor Selection Output voltage ripple is determined by the value of C2 and the load current. C2 is charged and discharged at a current roughly equal to the load current. The internal switching frequency is one−half the oscillator frequency. Low ESR capacitors are necessary to minimize voltage losses, especially at high load currents. The exact values of C1 and C2 are not critical but low ESR capacitors are necessary. The ESR of capacitor C1, the pump capacitor, can have a pronounced effect on the output. C1 currents are approximately twice the output current and losses occur on both the charge and discharge cycle. The ESR effects are thus multiplied by four. A 0.5 Ω ESR for C1 will have the same effect as a 2 Ω increase in CAT661 output impedance. VRIPPLE + IOUTń(FOSC C2) ) IOUT ESRC2 For example, with a 25 kHz oscillator frequency (12.5 kHz switching frequency), a 150 mF C2 capacitor with an ESR of 0.2 Ω and a 100 mA load peak−to−peak ripple voltage is 45 mV. Table 5. VRIPPLE vs. FOSC VRIPPLE (mV) IOUT (mA) FOSC (kHz) C2 (mF) C2 ESR (W) 45 100 25 150 0.2 25 100 135 150 0.2 V+ 7.0 I I REQUIRED FOR TTL LOGIC BOOST/FC (1) CAT661 NC OSC (7) + C1 ~18 pF LV (6) V+ 7.0 I 1 8 V+ BOOST/FC 2 7 CAP+ OSC 3 6 GND LV 4 5 CAP− OUT I 100 k −V+ + Figure 22. Oscillator C2 Figure 23. External Clocking http://onsemi.com 9 OSC INPUT CAT661 Capacitor Suppliers The following manufacturers supply low−ESR capacitors: Table 6. CAPACITOR SUPPLIERS Manufacturer Capacitor Type Phone WEB Email Comments AVX/Kyocera TPS/TPS3 843−448−9411 www.avxcorp.com [email protected] Tantalum Vishay/Sprague 595 402−563−6866 www.vishay.com − Aluminum Sanyo MV−AX, UGX 619−661−6835 www.sanyo.com [email protected] Aluminum Nichicon F55 847−843−7500 www.nichicon−us.com − Tantalum HC/HD Aluminum Capacitor manufacturers continually introduce new series and offer different package styles. It is recommended that before a design is finalized capacitor manufacturers should be surveyed for their latest product offerings. Controlling Loss in CAT661 Applications 3. Output or reservoir (C2) capacitor ESR: VLOSSC2 = ESRC2 x ILOAD, where ESRC2 is the ESR of capacitor C2. Increasing the value of C2 and/or decreasing its ESR will reduce noise and ripple. The effective output impedance of a CAT661 circuit is approximately: There are three primary sources of voltage loss: 1. Output resistance: VLOSS = ILOAD x ROUT, where ROUT is the CAT661 output resistance and ILOAD is the load current. 2. Charge pump (C1) capacitor ESR: VLOSSC1 ≈ 4 x ESRC1 x ILOAD, where ESRC1 is the ESR of capacitor C1. Rcircuit [ Rout 661 ) (4 http://onsemi.com 10 ESRC1) ) ESRC2 CAT661 Typical Applications Voltage Inversion Positive−to−Negative The CAT661 easily provides a negative supply voltage from a positive supply in the system. Figure 24 shows a typical circuit. The LV pin may be left floating for positive input voltages at or above 3.3 V. CAT661 NC 1 2 + 3 C1 4 V+ BOOST/FC OSC CAP+ LV GND OUT CAP− 8 VIN 1.5 V to 5.5 V 7 6 5 + VOUT = −VIN C2 Figure 24. Voltage Inverter Positive Voltage Doubler The voltage doubler circuit shown in Figure 25 gives VOUT = 2 x VIN for input voltages from 2.5 V to 5.5 V. 1N5817* CAT661 1 2 C1 150 mF VIN + 3 4 2.5 V to 5.5 V BOOST/FC CAP+ GND V+ OSC LV CAP− OUT 8 7 6 5 *SCHOTTKY DIODE IS FOR START−UP ONLY Figure 25. Voltage Doubler http://onsemi.com 11 + VOUT = 2VIN C2 150 mF CAT661 Precision Voltage Divider A precision voltage divider is shown in Figure 26. With load currents under 100 nA, the voltage at pin 2 will be within 0.002% of V+/2. CAT661 1 2 + 3 C1 150 mF V ) ± 0.002% 2 IL ≤ 100 nA 4 BOOST/FC V+ CAP+ OSC GND LV CAP− OUT 8 7 V+ 3 V to 11 V 6 5 + C2 150 mF Figure 26. Precision Voltage Divider (Load 3 100 nA) Battery Voltage Splitter Positive and negative voltages that track each other can be obtained from a battery. Figure 27 shows how a 9 V battery can provide symmetrical positive and negative voltages equal to one−half the battery voltage. CAT661 BATTERY 9V 3 V ≤ VBAT ≤ 11 V 1 VBAT C1 150 mF 2 + 3 4 BOOST/FC CAP+ V+ OSC GND LV CAP− OUT 8 7 V ) BAT (4.5 V) 2 6 V * BAT (−4.5 V) 2 5 + Figure 27. Battery Splitter http://onsemi.com 12 C2 150 mF CAT661 Cascade Operation for Higher Negative Voltages The CAT661 can be cascaded as shown in Figure 28 to generate more negative voltage levels. The output resistance is approximately the sum of the individual CAT661 output resistance. VOUT = −N x VIN, where N represents the number of cascaded devices. +VIN 8 8 2 2 + CAT661 “1” 3 C1 + CAT661 “N” 3 C1N 5 4 5 4 + VOUT = −NVIN + C2 C2 Figure 28. Cascading to Increase Output Voltage Parallel Operation Paralleling CAT661 devices will lower output resistance. As shown in Figure 29, each device requires its own pump capacitor, C2, but the output reservoir capacitor is shared with all devices. The value of C2 should be increased by a factor of N, where N is the number of devices. ROUT + ROUT (of CAT661) N (NUMBER OF DEVICES) +VIN 8 8 2 2 + C1 3 4 CAT661 “1” + 3 C1N 5 4 CAT661 “N” 5 + Figure 29. Reduce Output Resistance BY Paralleling Devices http://onsemi.com 13 C2 CAT661 PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O E1 E SYMBOL MIN A 1.35 1.75 A1 0.10 0.25 b 0.33 0.51 c 0.19 0.25 D 4.80 5.00 E 5.80 6.20 E1 3.80 MAX 4.00 1.27 BSC e PIN # 1 IDENTIFICATION NOM h 0.25 0.50 L 0.40 1.27 θ 0º 8º TOP VIEW D h A1 θ A c e b L SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. http://onsemi.com 14 CAT661 PACKAGE DIMENSIONS PDIP−8, 300 mils CASE 646AA−01 ISSUE A SYMBOL MIN NOM A E1 5.33 A1 0.38 A2 2.92 3.30 4.95 b 0.36 0.46 0.56 b2 1.14 1.52 1.78 c 0.20 0.25 0.36 D 9.02 9.27 10.16 E 7.62 7.87 8.25 E1 6.10 6.35 7.11 e PIN # 1 IDENTIFICATION MAX 2.54 BSC eB 7.87 L 2.92 10.92 3.30 3.80 D TOP VIEW E A2 A A1 c b2 L e eB b SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. http://onsemi.com 15 CAT661 Example of Ordering Information (Note 6) 4. 5. 6. 7. Prefix Device # Suffix CAT 661 EVA T3 Company ID (Optional) Product Number 661 Package ELA: PDIP EVA: SOIC Tape & Reel (Note 7) T: Tape & Reel 3: 3,000 / Reel All packages are RoHS−compliant (Lead−free, Halogen−free). The standard lead finish is Matte−Tin. The device used in the above example is a CAT661EVA−T3 (SOIC, Tape & Reel, 3,000/Reel). For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 16 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative CAT661/D