DATASHEET 40V, Low Quiescent Current, 50mA Linear Regulator for Automotive Applications ISL78307 Features The ISL78307 is a high voltage, low quiescent current linear regulator ideally suited for “always-on” and “keep alive” automotive applications. The ISL78307 operates from an input voltage of +6V to +40V under normal operating conditions and operates down to +3V under a cold crank. It consumes only 18µA of quiescent current at no load on the adjustable version. • Optimized for “always-on” automotive applications The ISL78307 is available in fixed 3.3V, 5V and adjustable output voltage (2.5V to 12V) options. It features an EN pin that can be used to put the device into a low-quiescent current shutdown mode where it draws only 1.8µA of supply current. The device features over-temperature shutdown and current limit protection. • 1.8µA of typical shutdown current The ISL78307 is AEC-Q100 qualified. It is rated over the -40°C to +125°C automotive temperature range and is available in an 8 Ld EPSOIC with exposed pad package. • Thermal shutdown and current limit protection Applications • 18µA typical quiescent current • Guaranteed 50mA output current • Operates through cold crank down to 3V • 40V tolerant logic level (TTL/CMOS) enable input • Low dropout voltage of 120mV at 50mA • Fixed +3.3V, +5.0V and adjustable output voltage options • Stable operation with 10µF output capacitor • -40°C to +125°C operating temperature range • Thermally enhanced 8 Ld exposed pad SOIC package • AEC-Q100 qualified • Automotive • 6kV ESD HBM rated • Industrial • Pb-free (RoHS compliant) • Telecom VIN = 14V CIN 0.1µF VOUT = 12V OUT IN R1 EN (ISL78307) VIN = 14V COUT 10µF OUT IN COUT 10µF CIN 0.1µF ADJ VOUT = 5V EN (ISL78307) R2 GND GND FIGURE 1. TYPICAL APPLICATION - ADJ VERSION FIGURE 2. TYPICAL APPLICATION - FIXED VERSION 70 QUIESCENT CURRENT (µA) 60 LOAD = 50mA 50 40 30 20 LOAD = 0mA 10 0 -50 0 50 100 150 TEMPERATURE (°C) FIGURE 3. QUIESCENT CURRENT vs LOAD CURRENT (ADJ VERSION AT UNITY GAIN). VIN = 14V April 7, 2015 FN7658.3 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2011, 2013, 2015. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL78307 Block Diagram VIN EN CONTROL LOGIC + THERMAL SENSOR EA FET DRIVER WITH CURRENT LIMIT VOUT REFERENCE + SOFT-START ADJ GND Pin Configuration ISL78307 (8 LD EPSOIC) TOP VIEW IN 1 8 OUT NC 2 7 ADJ/NC NC 3 6 NC EN 4 5 GND Pin Descriptions PIN NUMBER PIN NAME 1 IN Input voltage pin. A minimum 0.1µF X5R/X7R capacitor is required for proper operation. 2, 3, 6 NC Pins have internal termination and can be left unconnected. Connection to ground is optional. 4 EN High on this pin enables the device. 5 GND 7 ADJ/NC 8 OUT DESCRIPTION Ground pin. In the adjustable output voltage option, this pin is connected to the external feedback resistor divider which sets the LDO output voltage. In the 3.3V and 5V options, this pin is not used and can be connected to ground. Regulated output voltage. A 10µF X5R/X7R output capacitor is required for stability. EPAD It is recommended to solder the EPAD to the ground plane. Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING TEMP. RANGE (°C) ENABLE PIN OUTPUT VOLTAGE (V) PACKAGE (Pb-Free) PKG. DWG. # ISL78307FBEAZ 78307 FBEAZ -40 to +125 Yes 3.3 8 Ld EPSOIC M8.15B ISL78307FBEBZ 78307 FBEBZ -40 to +125 Yes 5.0 8 Ld EPSOIC M8.15B ISL78307FBECZ 78307 FBECZ -40 to +125 Yes ADJ 8 Ld EPSOIC M8.15B NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL78307. For more information on MSL please see techbrief TB363. Submit Document Feedback 2 FN7658.3 April 7, 2015 ISL78307 Absolute Maximum Ratings Thermal Information Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +45V IN pin to GND Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VCC OUT pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . .. . .GND - 0.3V to 16V EN pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VCC Output Short-circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite ESD Rating Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 6kV Machine Model (Tested per JESD-A115-A) . . . . . . . . . . . . . . . . . . . 350V Charge Device Model (Tested per AEC-Q100-011) . . . . . . . . . . . . . 2.2kV Latch Up (Tested per JESD78B; Class II, Level A) . . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) JA (°C/W) JC (°C/W) 8 Ld EPSOIC Package (Notes 4, 5) . . . . . . . 50 9 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +175°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Recommended Operating Conditions Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C IN pin to GND Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+3V to +40V OUT pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+2.5V to +12V EN pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to +40V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 5. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VIN = 14V, IOUT = 1mA, CIN = 0.1μF, COUT = 10μF, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C. Boldface limits apply across the operating temperature range, -40°C to +125°C. PARAMETER SYMBOL Input Voltage Range TEST CONDITIONS VIN 40 V 3 40 V 50 VIN = VOUT + VDO Output Voltage VOUT EN = High VIN = 14V IOUT = 0.1mA 3.267 3.3 3.333 V 5V Version 4.950 5 5.050 V ADJ pin voltage 1.211 1.223 1.235 V 0.04 0.115 % 0.25 0.5 % IOUT = 1mA, VOUT = 3.3V 10 38 mV IOUT = 50mA, VOUT = 3.3V 130 340 mV IOUT = 1mA, VOUT = 5V 10 48 mV IOUT = 50mA, VOUT = 5V 120 350 mV 1.8 3.64 µA IOUT = 0mA, ADJ Version, VOUT = VADJ 18 24 µA IOUT = 1mA, ADJ Version, VOUT = VADJ 22 42 µA IOUT = 10mA, ADJ Version, VOUT = VADJ 34 60 µA IOUT = 50mA, ADJ Version, VOUT = VADJ 56 82 µA IOUT = 0, 3.3V and 5.0V Version 22 28 µA IOUT = 1mA, 3.3V and 5.0V Version 27 45 µA IOUT = 10mA, 3.3V and 5.0V Version 37 65 µA IOUT = 50mA, 3.3V and 5.0V Version 62 90 µA VOUT/VIN Load Regulation VOUT/IOUT VIN = VOUT +VDO IOUT = 100µA to 50mA 3V VIN 40V IOUT = 1mA Shutdown Current ISHDN EN = LOW Quiescent Current IQ EN = High VIN = 14V 3 mA 3.3V Version Line Regulation Submit Document Feedback MAX (Note 8) UNIT 6 IOUT VDO TYP Cold Crank condition Guaranteed Output Current Dropout Voltage (Note 6) MIN (Note 8) FN7658.3 April 7, 2015 ISL78307 Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VIN = 14V, IOUT = 1mA, CIN = 0.1μF, COUT = 10μF, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C. Boldface limits apply across the operating temperature range, -40°C to +125°C. (Continued) PARAMETER SYMBOL Power Supply Rejection Ratio TEST CONDITIONS PSRR f = 100Hz; Vin_ripple = 500mVP-P; Load = 50mA VEN_H VOUT = Off to On VEN_L VOUT = On to Off MIN (Note 8) TYP MAX (Note 8) UNIT 58 dB EN FUNCTION EN Threshold Voltage EN Pin Current IEN EN to Regulation Time (Note 7) tEN 1.485 0.935 VOUT = 0V V V 0.026 1.65 µA 1.93 ms PROTECTION FEATURES Output Current Limit ILIMIT VOUT = 0V Thermal Shutdown TSHDN Junction Temperature Rising Thermal Shutdown Hysteresis THYST 60 118 mA +165 °C +20 °C NOTES: 6. Dropout voltage is defined as (VIN - VOUT) when VOUT is 2% below the value of VOUT when VIN = VOUT + 3V. 7. Enable to Regulation is the time the output takes to reach 95% of its final value with VIN = 14V and EN is taken from VIL to VIH in 5ns. For the adjustable versions, the output voltage is set at 5V. 8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Submit Document Feedback 4 FN7658.3 April 7, 2015 ISL78307 Typical Performance Curves VIN = 14V, IOUT = 1mA, VOUT = 5V, TJ = +25 °C unless otherwise specified. 80 30 +125°C QUIESCENT CURRENT (µA) QUIESCENT CURRENT (µA) 70 60 50 40 +25°C 30 -40°C 20 10 0 0 10 20 30 40 20 +25°C 10 5 0 10 LOAD CURRENT (mA) FIGURE 4. QUIESCENT CURRENT vs LOAD CURRENT 20 INPUT VOLTAGE (V) 30 40 FIGURE 5. QUIESCENT CURRENT vs INPUT VOLTAGE (NO LOAD) 0.010 % OUTPUT VOLTAGE VARIATION 3.0 SHUTDOWN CURRENT (µA) -40°C 15 0 50 +125°C 25 2.5 VIN = 40V 2.0 1.5 VIN = 14V 1.0 0.5 0 -50 0 50 100 150 0.005 5V OPTION 0 -0.005 -0.010 -50 3.3V OPTION 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 6. SHUTDOWN CURRENT vs TEMPERATURE (EN = 0) FIGURE 7. OUTPUT VOLTAGE vs TEMPERATURE (LOAD = 50mA) 5.100 OUTPUT VOLTAGE (V) 5.075 EN at 500mV/DIV 5.050 +125°C +25°C 5.025 5.000 -40°C 4.975 4.950 VOUT at 1V/DIV 4.925 TIME at 500µs/DIV 4.900 0 10 20 30 40 50 LOAD CURRENT (mA) FIGURE 8. OUTPUT VOLTAGE vs LOAD CURRENT Submit Document Feedback 5 FIGURE 9. START-UP WAVEFORM FN7658.3 April 7, 2015 ISL78307 Typical Performance Curves VIN = 14V, IOUT = 1mA, VOUT = 5V, TJ = +25 °C unless otherwise specified. (Continued) 70 60 VOUT = 3.3V PSRR (dB) 50 40 VOUT at 100mV/DIV VOUT = 5V 30 50mA 20 IOUT at 0mA 10 0 100 TIME at 5ms/DIV 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 10. POWER SUPPLY REJECTION RATIO (LOAD = 50mA) Submit Document Feedback 6 FIGURE 11. LOAD TRANSIENT RESPONSE FN7658.3 April 7, 2015 ISL78307 Functional Description Output Voltage Setting Functional Overview For the adjustable version of the ISL78307, the output voltage is programmed using an external resistor divider as shown in Figure 12. The ISL78307 is a high performance, high voltage, low-dropout regulator (LDO) with 50mA sourcing capability. The part is qualified to operate over the -40°C to +125°C automotive temperature range. Featuring ultra-low quiescent current, it makes an ideal choice for “always-on” automotive applications. It works well under a “load-dump condition” where the input voltage could rise up to 40V. The LDO continues to operate down to 3V under a “cold-crank” condition. The device also features current limit and thermal shutdown protection. Enable Control R1 EN (ISL78307) COUT 10µF ADJ R2 GND FIGURE 12. ADJUSTABLE VERSION The ISL78307 features an enable pin. When it is pulled low, the IC goes to a shutdown mode. In this condition, the device draws less than 2µA. Driving the pin high turns the device on. Current Limit Protection The ISL78307 has internal current limit functionality to protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current largely independent of the output voltage. If the short or overload is removed from VOUT, the output returns to normal voltage regulation mode. Thermal Fault Protection In the event the die temperature exceeds typically +165°C, the output of the LDO will shut down until the die temperature cools down to typically +145°C. The level of power dissipated, combined with the ambient temperature and the thermal impedance of the package, will determine if the junction temperature exceeds the thermal shutdown temperature. See section on “Power Dissipation”. Application Information Input and Output Capacitors For the output, a ceramic capacitor (X5R or X7R) with a capacitance of 10µF is recommended for the ISL78307 to maintain stability. The ground connection of the output capacitor should be routed directly to the GND pin of the device and also placed close to the IC. A minimum of 0.1µF (X5R or X7R) is recommended at the input. Submit Document Feedback OUT IN CIN 0.1µF 7 The output voltage is calculated using Equation 1: R1 V OUT = 1.223V ------- + 1 R2 (EQ. 1) Power Dissipation The junction temperature must not exceed the range specified in “Recommended Operating Conditions” on page 3. The power dissipation can be calculated using Equation 2: P D = V IN – V OUT I OUT + V IN I GND (EQ. 2) The maximum allowable junction temperature, TJ(MAX) and the maximum expected ambient temperature, TA(MAX) will determine the maximum allowable junction temperature rise (TJ), as shown in Equation 3: T J = T J MAX – T A MAX (EQ. 3) To calculate the maximum ambient operating temperature, use the junction-to-ambient thermal resistance (JA) as shown in Equation 4: T J MAX = P D MAX x JA + T A (EQ. 4) Board Layout Recommendations A good PCB layout is important to achieve expected performance. Consideration should be taken when placing the components and routing the trace to minimize the ground impedance, and keep the parasitic inductance low. The input and output capacitors should have a good ground connection and be placed as close to the IC as possible. The feedback trace in the adjustable version should be away from other noisy traces. Connect EPAD to the ground plane for better heat dissipation. Thermal vias on the EPAD increase heat dissipation. FN7658.3 April 7, 2015 ISL78307 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION CHANGE April 7, 2015 FN6705.2 “Absolute Maximum Ratings” on page 3,Charged device Model(tested per JESD22-C101C)....2.2kV to Charged device Model(tested per AEC-Q100-011).....2.2kV December 7, 2013 FN7658.2 Page 9 - 2nd line of the disclaimer changed from: "Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted" to: "Intersil Automotive Qualified products are manufactured, assembled and tested utilizing TS16949 quality systems as noted". May 13, 2011 FN7658.1 Page 4, Removed the EN Pin Current MAX spec; added TYP spec of 0.026. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support Submit Document Feedback 8 FN7658.3 April 7, 2015 ISL78307 Small Outline Exposed Pad Plastic Packages (EPSOIC) M8.15B N INDEX AREA H 0.25(0.010) M 8 LEAD NARROW BODY SMALL OUTLINE EXPOSED PAD PLASTIC PACKAGE B M E INCHES -B1 2 3 TOP VIEW L SEATING PLANE -A- h x 45o A D -C- e B C 0.10(0.004) 0.25(0.010) M C A M B S SIDE VIEW SYMBOL MIN MAX MIN MAX NOTES A 0.056 0.066 1.43 1.68 - A1 0.001 0.005 0.03 0.13 - B 0.0138 0.0192 0.35 0.49 9 C 0.0075 0.0098 0.19 0.25 - D 0.189 0.196 4.80 4.98 3 E 0.150 0.157 3.81 3.99 4 e A1 MILLIMETERS 0.050 BSC 1.27 BSC - H 0.230 0.244 5.84 6.20 - h 0.010 0.016 0.25 0.41 5 L 0.016 0.035 0.41 0.89 6 N 8 8 7 0° 8° 0° 8° - P - 0.094 - 2.387 11 P1 - 0.094 - 2.387 11 Rev. 5 8/10 NOTES: 1 2 3 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. P1 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. N 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. P BOTTOM VIEW 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: INCH. Converted millimeter dimensions are not necessarily exact. 11. Dimensions “P” and “P1” are thermal and/or electrical enhanced variations. Values shown are maximum size of exposed pad within lead count and body size. For additional products, see www.intersil.com/en/products.html Intersil Automotive Qualified products are manufactured, assembled and tested utilizing TS16949 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com Submit Document Feedback 9 FN7658.3 April 7, 2015