CYStech Electronics Corp. Spec. No. : C918F7T Issued Date : 2017.01.03 Revised Date : Page No. : 1/9 N-Channel Enhancement Mode Power MOSFET MTE05N08F7T BVDSS ID @VGS=10V, TC=25°C 80V RDSON(TYP) @ VGS=10V, ID=20A Features 172A 2.7mΩ • Simple Drive Requirement • Fast Switching Characteristic • RoHS compliant package Symbol Outline MTE05N08F7T TO-263-7L-4C G：Gate D：Drain S：Source Ordering Information Device MTE05N08F7T-0-T7-X Package Shipping TO-263-7L-4C 800 pcs / Tape & Reel (Pb-free lead plating and RoHS compliant package) Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T7 : 800 pcs / tape & reel, 13” reel Product rank, zero for no rank products Product name MTE05N08F7T CYStek Product Specification CYStech Electronics Corp. Spec. No. : C918F7T Issued Date : 2017.01.03 Revised Date : Page No. : 2/9 Absolute Maximum Ratings (TC=25°C, unless otherwise noted) Parameter Symbol Limits Drain-Source Voltage Gate-Source Voltage Continuous Drain Current @ TC=25°C(silicon limit) Continuous Drain Current @ TC=100°C(silicon limit) Continuous Drain Current @ TC=25°C(package limit) (Note 1) Pulsed Drain Current (Note 3) Continuous Drain Current @ TA=25°C (Note 2) Continuous Drain Current @ TA=70°C (Note 2) Avalanche Current @L=0.1mH (Note 3) Avalanche Energy @ L=1mH, ID=60A, VDD=50V (Note 4) TC=25°C (Note 1) Power Dissipation TC=100°C (Note 1) TA=25°C (Note 2) Power Dissipation TA=70°C (Note 2) Operating Junction and Storage Temperature VDS VGS 80 ±30 202 143 172 688 16.5 13.2 80 1800 330 165 2 1.3 -55~+175 ID IDM IDSM IAS EAS PD PDSM Tj, Tstg Unit V A mJ W °C Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max, (Note 2) Symbol RθJC RθJA Value 0.45 62.5 Unit °C/W Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2.The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user’s specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. 3. Pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C. 4. 100% tested by conditions of L=1mH, IAS=20A, VGS=15V, VDD=50V. 5. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum. 6. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient. MTE05N08F7T CYStek Product Specification CYStech Electronics Corp. Spec. No. : C918F7T Issued Date : 2017.01.03 Revised Date : Page No. : 3/9 Characteristics (TC=25°C, unless otherwise specified) Symbol Static BVDSS VGS(th) GFS IGSS IDSS Min. Typ. Max. 80 2.0 - 42.8 2.7 4.0 ±100 1 25 3.8 123.8 21 44.8 41 35.6 90 23.2 5776 638 213 1.6 - 0.66 44.2 63.3 172 688 1 - *RDS(ON) Dynamic *Qg *Qgs *Qgd *td(ON) *tr *td(OFF) *tf Ciss Coss Crss Rg Source-Drain Diode *IS *ISM *VSD *trr *Qrr - Unit Test Conditions mΩ VGS=0V, ID=250μA VDS = VGS, ID=250μA VDS =10V, ID=20A VGS=±30V VDS =64V, VGS =0V VDS =64V, VGS =0V, Tj=125°C VGS =10V, ID=20A nC ID=20A, VDS=40V, VGS=10V ns VDS=40V, ID=20A, VGS=10V, RG=1Ω pF VGS=0V, VDS=40V, f=1MHz Ω f=1MHz V S nA μA A V ns nC IS=1A, VGS=0V IF=1A, VGS=0V, dIF/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% MTE05N08F7T CYStek Product Specification Spec. No. : C918F7T Issued Date : 2017.01.03 Revised Date : Page No. : 4/9 CYStech Electronics Corp. Typical Characteristics Brekdown Voltage vs Junction Temperature Typical Output Characteristics 1.4 ID, Drain Current(A) 250 BVDSS, Normalized Drain-Source Breakdown Voltage 300 6V 200 10V,9V,8V,7V 150 100 5V 50 1.2 1 0.8 ID=250μA, VGS=0V 0.6 VGS=4V 0.4 0 0 2 4 6 8 VDS, Drain-Source Voltage(V) -75 -50 -25 10 Static Drain-Source On-State resistance vs Drain Current Reverse Drain Current vs Source-Drain Voltage 1.2 VSD, Source-Drain Voltage(V) R DS(ON) , Static Drain-Source On-State Resistance(mΩ) 100 VGS=6V VGS=7V VGS=10V 10 1 Tj=25°C 0.8 0.6 0.4 Tj=150°C 0.2 1 0.1 1 10 ID, Drain Current(A) 0 100 4 8 12 16 IDR , Reverse Drain Current(A) 20 Drain-Source On-State Resistance vs Junction Tempearture Static Drain-Source On-State Resistance vs Gate-Source Voltage 50 2.4 2 ID=20A 40 R DS(ON) , Normalized Static DrainSource On-State Resistance R DS(ON) , Static Drain-Source OnState Resistance(mΩ) 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) 30 20 10 0 0 MTE05N08F7T 2 4 6 8 VGS, Gate-Source Voltage(V) 10 VGS=10V, ID=20A 1.6 1.2 0.8 0.4 RDS(ON) @Tj=25°C : 2.7mΩ 0 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) CYStek Product Specification Spec. No. : C918F7T Issued Date : 2017.01.03 Revised Date : Page No. : 5/9 CYStech Electronics Corp. Typical Characteristics(Cont.) Threshold Voltage vs Junction Tempearture Capacitance vs Drain-to-Source Voltage VGS(th), Normalized Threshold Voltage 10000 Capacitance---(pF) Ciss C oss 1000 Crss 1.4 1.2 ID=1mA 1 0.8 0.6 ID=250μA 0.4 0.2 100 0 10 20 30 VDS, Drain-Source Voltage(V) -75 -50 -25 40 Forward Transfer Admittance vs Drain Current Gate Charge Characteristics 10 VGS, Gate-Source Voltage(V) GFS , Forward Transfer Admittance(S) 100 10 1 VDS=10V Pulsed Ta=25°C 0.1 0.01 0.001 8 VDS=40V 6 VDS=64V 4 2 ID=20A 0 0.01 0.1 1 ID, Drain Current(A) 10 0 100 ID, Maximum Drain Current(A) ID, Drain Current(A) 1ms 10ms 10 100ms DC TC=25°C, Tj=175°C, VGS=10V,RθJC=0.45°C/W single pulse 1 120 140 Silicon limit 100μs 100 40 60 80 100 Total Gate Charge---Qg(nC) 240 10 μs RDS(ON) Limited 20 Maximum Drain Current vs Case Temperature Maximum Safe Operating Area 1000 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) 200 160 120 Package limit 80 40 VGS=10V, RθJC=0.45°C/W 0 0.1 0.1 MTE05N08F7T 1 10 100 VDS, Drain-Source Voltage(V) 1000 0 25 50 75 100 125 150 TC , Case Temperature(°C) 175 200 CYStek Product Specification Spec. No. : C918F7T Issued Date : 2017.01.03 Revised Date : Page No. : 6/9 CYStech Electronics Corp. Typical Characteristics(Cont.) Single Pulse Maximum Power Dissipation Typical Transfer Characteristics 5000 300 4500 VDS=10V Peak Transient Power (W) ID, Drain Current (A) 250 200 150 100 TJ(MAX) =175°C TC=25°C RθJC=0.45°C/W 4000 3500 3000 2500 2000 1500 1000 50 500 0 0 2 4 6 VGS, Gate-Source Voltage(V) 8 10 0 0.0001 0.001 0.01 0.1 Pulse Width(s) 1 10 Transient Thermal Response Curves 1 r(t), Normalized Effective Transient Thermal Resistance D=0.5 0.2 0.1 0.1 1.RθJC (t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=0.45 °C/W 0.05 0.02 0.01 0.01 0.001 1.E-05 MTE05N08F7T Single Pulse 1.E-04 1.E-03 1.E-02 1.E-01 t1, Square Wave Pulse Duration(s) 1.E+00 1.E+01 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C918F7T Issued Date : 2017.01.03 Revised Date : Page No. : 7/9 Reel Dimension Carrier Tape Dimension MTE05N08F7T CYStek Product Specification CYStech Electronics Corp. Spec. No. : C918F7T Issued Date : 2017.01.03 Revised Date : Page No. : 8/9 Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTE05N08F7T CYStek Product Specification Spec. No. : C918F7T Issued Date : 2017.01.03 Revised Date : Page No. : 9/9 CYStech Electronics Corp. TO-263-7L-4C Dimension Marking : Device Name Date Code CYS E05N08 □□□□ Style : Pin 1. Gate Pin 2, 3, 5, 6, 7 : Source Pin 4. Drain 7-Lead Plastic Surface Mounted TO-263-7L Package CYStek Package Code : F7T Date Code : (From left to right) First Code : Year code, the last digit of Christinr year. For example, 2014→4, 2015→, 2016→6, …, etc. Second Code : Month code, Jan→A, Feb→B, Mar→C, Apr→D, May→E, Jun→F, Jul→G, Aug→H, Sep→J, Oct→K, Nov→L, Dec→M Third and fourth codes : production serial number, 01~99 *:Typical Inches Min. Max. 0.1673 0.1791 0.0472 0.0551 0.0886 0.1004 0.0004 0.0098 0.0197 0.0276 0.0228 0.0331 0.0157 0.0236 0.3563 0.3720 0.2717 - DIM A A1 A2 A3 b b1 c D D4 Millimeters Min. Max. 4.25 4.55 1.20 1.40 2.25 2.55 0.01 0.25 0.50 0.70 0.58 0.84 0.40 0.60 9.05 9.45 6.90 - DIM E e E5 H H2 L L1 L4 θ Inches Min. Max. 0.3858 0.4016 0.0500 BSC 0.2854 0.5768 0.6043 0.0315 0.0472 0.0945 0.1181 0.0335 0.0453 0.0098 BSC 2° 8° Millimeters Min. Max. 9.80 10.20 1.27 BSC 7.25 14.65 15.35 0.80 1.20 2.40 3.00 0.85 1.15 0.25 BSC 2° 8° Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material : • Lead : Pure tin plated. • Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTE05N08F7T CYStek Product Specification