PD - 94990
IRFZ24NPbF
HEXFET® Power MOSFET
Advanced Process Technology
Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Lead-Free
Description
l
D
l
VDSS = 55V
RDS(on) = 0.07Ω
G
ID = 17A
S
Fifth Generation HEXFET ® power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve the lowest possible on-resistance
per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that HEXFET
power MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide variety
of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal resistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
I D @ TC = 25°C
I D @ TC = 100°C
I DM
PD @TC = 25°C
VGS
EAS
I AR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current #
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
17
12
68
45
0.30
±20
71
10
4.5
5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbfin (1.1Nm)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Min.
Typ.
Max.
Units
0.50
3.3
62
°C/W
1
2/10/04
IRFZ24NPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
g fs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
2.0
4.5
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Typ.
0.052
4.9
34
19
27
Max. Units
Conditions
V
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
0.07
Ω
VGS = 10V, ID = 10A
4.0
V
VDS = VGS, ID = 250µA
S
VDS = 25V, ID = 10A
25
VDS = 55V, VGS = 0V
µA
250
VDS = 44V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
20
ID = 10A
5.3
nC
VDS = 44V
7.6
VGS = 10V, See Fig. 6 and 13
VDD = 28V
ID = 10A
ns
RG = 24Ω
RD = 2.6Ω, See Fig. 10
Between lead,
4.5
6mm (0.25in.)
nH
from package
7.5
and center of die contact
370
VGS = 0V
140
pF
VDS = 25V
65
= 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
IS
I SM
VSD
t rr
Q rr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Min. Typ. Max. Units
17
68
56
120
1.3
83
180
A
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 10A, VGS = 0V
TJ = 25°C, IF = 10A
di/dt = 100A/µs
D
G
S
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 1.0mH
RG = 25Ω, IAS = 10A. (See Figure 12)
2
ISD ≤ 10A, di/dt ≤ 280A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
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IRFZ24NPbF
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
4.5V
20µs PULSE WIDTH
TC = 25°C
1
0.1
1
10
A
10
4.5V
3.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
10
V DS = 25V
20µs PULSE WIDTH
6
7
8
9
10
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
A
Fig 2. Typical Output Characteristics,
TJ = 175oC
100
5
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics,
TJ = 25oC
1
20µs PULSE WIDTH
TC = 175°C
1
0.1
100
VDS , Drain-to-Source Voltage (V)
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
TOP
A
I D = 17A
2.5
2.0
1.5
1.0
0.5
VGS = 10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFZ24NPbF
700
500
Ciss
400
Coss
V GS , Gate-to-Source Voltage (V)
600
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
12
Crss
100
0
1
10
100
A
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
4
8
12
16
A
20
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
8
0
100
TJ = 175°C
TJ = 25°C
10
VGS = 0V
1
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
V DS = 44V
V DS = 28V
16
300
200
I D = 10A
A
2.0
100
10µs
10
100µs
1ms
TC = 25°C
TJ = 175°C
Single Pulse
1
1
10ms
10
A
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFZ24NPbF
V GS
D.U.T.
RG
16
ID, Drain Current (Amps)
RD
VDS
20
+
- VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
12
Fig 10a. Switching Time Test Circuit
8
VDS
90%
4
A
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
10%
VGS
td(on)
Fig 9. Maximum Drain Current Vs.
Case Temperature
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
PDM
0.02
0.01
t
1
t2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t
0.01
0.00001
1
/t
2
2. Peak TJ = PDM x Z thJC + T C
0.0001
0.001
0.01
A
0.1
1
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFZ24NPbF
D.U.T.
RG
+
V
- DD
IAS
10 V
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
VDD
EAS , Single Pulse Avalanche Energy (mJ)
L
VDS
140
TOP
120
BOTTOM
100
80
60
40
20
0
VDD = 25V
25
VDS
ID
4.2A
7.2A
10A
50
75
100
125
A
150
175
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
10 V
QGS
QGD
D.U.T.
+
V
- DS
VGS
VG
3mA
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
6
Fig 13b. Gate Charge Test Circuit
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IRFZ24NPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® power MOSFETs
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7
IRFZ24NPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
4- DRAIN
14.09 (.555)
13.47 (.530)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- SOURCE
3- EMITTER
4 - DRAIN
HEXFET
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010
LOT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
PAR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/04
8
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