Fairchild HCPL-0730R2V Low input current high gain split darlington optocoupler Datasheet

LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
DESCRIPTION
The HCPL-0700, HCPL-0701, HCPL-0730 and HCPL-0731 optocouplers consist of an AlGaAs LED optically coupled to a high
gain split darlington photodetector housed in a compact 8-pin small outline package. The HCPL-0730 and HCPL-0731 devices
have two channels per package for optimum mounting density.
The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower
output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly
useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high
fan-out TTL requirements.
PACKAGE DIMENSIONS
FEATURES
•
•
•
•
•
•
Low input current – 0.5 mA
Superior CTR – 2000%
Superior CMR – 10 kV/µs
CTR guaranteed 0-70°C
U.L. Recognized (file# E90700)
VDE 0884 recognized (file# 136616)
– approval pending for HCPL-0730/0731
• BSI recognized (file# 8661, 8662)
– HCPL-0700/0701 only
SEATING PLANE
0.164 (4.16)
0.144 (3.66)
APPLICATIONS
Digital logic ground isolation
Telephone ring detector
EIA-RS-232C line receiver
High common mode noise
line receiver
• µP bus isolation
• Current loop receiver
Pin 1
0.019 (0.48)
•
•
•
•
VO
ON
LOW
OFF
HIGH
0.010 (0.25)
0.006 (0.16)
0.143 (3.63)
0.123 (3.13)
0.244 (6.19)
0.224 (5.69)
0.008 (0.20)
0.003 (0.08)
0.021 (0.53)
0.011 (0.28)
0.050 (1.27)
TYP
Lead Coplanarity : 0.004 (0.10) MAX
TRUTH TABLE
LED
0.202 (5.13)
0.182 (4.63)
NOTE
All dimensions are in inches (millimeters)
N/C 1
8 VCC
+ 1
8 VCC
V
F1
+ 2
7 VB
_ 2
7 V01
VF
_
3
6 VO
_
3
6 V02
V
F2
N/C 4
5 GND
HCPL0700 / HCPL0701
© 2003 Fairchild Semiconductor Corporation
Page 1 of 12
+ 4
5 GND
HCPL0730 / HCPL0731
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified)
Parameter
Symbol
Value
Units
Storage Temperature
TSTG
-40 to +125
°C
Operating Temperature
TOPR
-40 to +85
°C
IF (avg)
20
mA
IF (pk)
40
mA
IF (trans)
1.0
A
Reflow Temperature Profile (Refer to fig. 11)
EMITTER
DC/Average Forward Input Current
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)
Peak Transient Input Current - (≤1 µs P.W., 300 pps)
Reverse Input Voltage
VR
5
V
Input Power Dissipation
PD
35
mW
IO (avg)
60
mA
0.5
V
DETECTOR
Average Output Current (Pin 6)
Emitter-Base Reverse Voltage
HCPL-0700/HCPL-0701
VEBR
HCPL-0700/HCPL-0730
Supply Voltage, Output Voltage
-0.5 to 7
VCC, VO
HCPL-0701/HCPL-0731
Output power dissipation
V
-0.5 to 18
100
PD
mW
ELECTRICAL CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter
EMITTER
Input Forward Voltage
Test Conditions
IF = 1.6mA
TA = 25°C
Symbol
Device
HCLP-0700/01
VF
HCLP-0730/31
Min
1.0
Typ**
1.25
1.35
All
Input Reverse Breakdown
Voltage
DETECTOR
Logic high output
current
Logic Low Supply
Current
Logic High
Supply Current
(TA =25°C, IR = 10 µA)
BVR
(IF = 0 mA, VO = VCC = 18 V)
(IF = 0 mA, VO = VCC = 7 V)
IOH
IF = 1.6 mA, VO = Open, VCC = 18V
IF1 = IF2 = 1.6mA
VCC = 7V
VO1 = VO2 = Open
VCC = 18 V
ICCL
IF = 0 mA, VO = Open, VCC = 18V
IF1 = IF2 = 0,
VCC = 7V
VO1 = VO2 = Open,
VCC = 18 V
© 2003 Fairchild Semiconductor Corporation
All
Page 2 of 12
Unit
1.7
1.75
V
5.0
HCPL-0701/31
0.01
100
HCPL-0700/30
0.01
250
HCPL-0700/01
0.4
1.5
HCPL-0730
0.8
HCPL-0731
1
HCPL-0700/01
ICCH
Max
3
µA
mA
10
HCPL-0730
0.001
HCPL-0731
0.01
20
µA
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
TRANSFER CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Parameter
COUPLED
Test Conditions Symbol
(IF = 0.5 mA, VO = 0.4 V, VCC = 4.5V)
IF = 1.6 mA,
VO = 0.4 V,
VCC = 4.5V
Current transfer ratio
(Notes 1,2)
Device
Min
Typ**
HCPL-0701/31
400
5000
HCPL-0700
300
2600
HCPL-0701
500
2600
HCPL-0730
300
5000
HCPL-0731
500
5000
CTR
(IF = 0.5 mA, IO = 2 mA, VCC = 4.5V)
(IF = 5 mA, IO = 15 mA, VCC = 4.5V)
Unit
%
0.4
(IF = 1.6 mA, IO = 8 mA, VCC = 4.5V)
Logic low output voltage
output voltage
Max
0.4
HCPL-0701
HCPL-0731
VOL
0.4
(IF = 12 mA, IO = 24 mA, VCC = 4.5V)
(IF = 1.6 mA, IO = 4.8 mA, VCC = 4.5V)
V
0.4
HCPL-0700/0730
0.4
ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Characteristics
Input-output
insulation leakage current
Withstand insulation test voltage
Resistance (input to output)
Test Conditions
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
(Note 4)
Symbol
Min
Typ**
II-O
(RH ≤ 50%, TA = 25°C)
(Note 4, 5) ( t = 1 min.)
VISO
(Note 4) (VI-O = 500 VDC)
RI-O
2500
Max
Unit
1.0
µA
VRMS
1012
Ω
** All typicals at TA = 25°C
© 2003 Fairchild Semiconductor Corporation
Page 3 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified., VCC = 5 V)
Parameter
Test Conditions
Symbol
(RL = 4.7 kΩ, IF = 0.5 mA)
TA = 25°C
(RL = 270 Ω, IF = 12 mA)
Propagation delay
time to logic low
(Note 2) (Fig. 14)
TPHL
TA = 25°C
(RL = 2.2 kΩ, IF = 1.6 mA)
TA = 25°C
Device
HCPL-0731
120
HCPL-0701
3
25
HCPL-0731
5
100
HCPL-0701
2
HCPL-0731
3
HCPL-0701
0.3
HCPL-0731
0.4
HCPL-0730/0731
25
HCPL-0700
1
HCPL-0730/0731
2
12
10
20
60
10
HCPL-0731
15
HCPL-0701
1.6
7
HCPL-0731
1.6
10
HCPL-0700/30/31
TA = 25°C
HCPL-0700/30/31
µs
90
HCPL-0701
(RL = 2.2 kΩ, IF = 1.6 mA)
Unit
2
15
HCPL-0701/31
TA = 25°C
1
HCPL-0700
TA = 25°C
TPLH
Max
30
HCPL-0701/31
(RL = 270 Ω, IF = 12 mA)
Typ**
HCPL-0701
(RL = 4.7 kΩ, IF = 0.5 mA)
Propagation delay
time to logic high
(Note 2) (Fig. 14)
Min
µs
50
7
35
Common mode
transient
immunity at
logic high
(IF = 0 mA, |VCM| = 10 VP-P)
TA = 25°C (RL = 2.2 kΩ) (Note 3) (Fig. 15)
|CMH|
ALL
1,000
10,000
V/µs
Common mode
transient
immunity at
logic low
(IF = 1.6 mA, |VCM| = 10 VP-P,
RL = 2.2 kΩ)
TA = 25°C (Note 3) (Fig. 15)
|CML|
ALL
1,000
10,000
V/µs
NOTES
1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVCM/dt on the leading edge of the
common mode pulse signal, VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode
pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.
** All typicals at TA = 25°C
© 2003 Fairchild Semiconductor Corporation
Page 4 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
TYPICAL PERFORMANCE CURVES
Fig. 1 Propagation Delay vs. Temperature
(HCPL-0700, HCPL-0701)
30
25
Fig. 2 Propagation Delay vs. Temperature
(HCPL-0700, HCPL-0701)
20
VCC = 5 V
IF = 0.5 mA
RL = 4.7 kΩ
1/f = 50 µs
18
tp - PROPAGATION DELAY (µs)
tp - PROPAGATION DELAY (µs)
35
tPLH
20
15
10
IF = 1.6 mA
VCC = 5 V
RL = 2.2 kΩ
1/f = 50 µs
16
14
tPLH
12
10
8
6
4
5
tPHL
tPHL
2
0
0
-60
-40
-20
0
20
40
60
80
-60
100
-40
-20
TA - TEMPERATURE (˚C)
Fig. 3 Propagation Delay vs. Temperature
(HCPL-0700, HCPL-0701)
20
40
60
80
100
Fig. 4 Logic High Output Current vs. Temperature
(HCPL-0700, HCPL-0701)
IF = 12 mA
VCC = 5 V
RL = 270 Ω
1/f = 50 µs
IOH - LOGIC HIGH OUTPUT CURRENT (nA)
4
tp - PROPAGATION DELAY (µs)
0
TA - TEMPERATURE (˚C)
tPLH
3
2
1
tPHL
1000
VCC = VO = 5.5 V
100
10
1
0.1
0.01
0
-60
-40
-20
0
20
40
60
80
-40
100
TA - TEMPERATURE (˚C)
-20
0
20
40
60
80
100
TA - TEMPERATURE (˚C)
Fig. 5 Propagation Delay vs. Input Forward Currrent
(HCPL-0730, HCPL-0731)
Fig. 6 Output Current vs. Input Forward Current
(HCPL-0700, HCPL-0701)
100
20
VCC = 5V
IO - OUTPUT CURRENT (mA)
tp - PROPAGATION DELAY (µs)
TA = 25
16
t PLH
R L = 4.7kΩ
12
tPLH
R L = 2.2kΩ
8
4
10
TA = 85˚C
1
TA = 70˚C
TA = 25˚C
0.1
TA = 0˚C
t PHL
TA = -40˚C
R L = 2.2kΩ or 4.7kΩ
0
0
1
2
3
4
5
6
7
8
9
10
0.01
0.01
1
10
IF - INPUT FORWARD CURRENT (mA)
TA - TEMPERATURE (˚C)
© 2003 Fairchild Semiconductor Corporation
0.1
VCC = 5V
VO = 0.4V
Page 5 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
TYPICAL PERFORMANCE CURVES
Fig. 7 Input Forward Current vs. Forward Voltage
(HCPL-0700, HCPL-0701)
Fig. 8 Input Forward Current vs. Forward Voltage
(HCPL-0730, HCPL-0731)
100
100
IF - FORWARD CURRENT (mA)
IF - FORWARD CURRENT (mA)
TA = 85˚C
10
TA = 70˚C
1
0.1
TA = 25˚C
0.01
TA = 0˚C
10
TA = 85°C
TA = -40°C
TA = 70°C
1
TA = 25°C
TA = 0°C
0.1
0.01
TA = -40˚C
0.001
1.1
1.2
1.3
1.4
1.5
1.6
0.001
0.9
1.0
1.1
VF - FORWARD VOLTAGE (V)
ICC (PER CHANNEL) - SUPPLY CURRENT (mA)
ICCL - LOGIC LOW SUPPLY CURRENT (mA)
0.5
Logic Low Supply Current vs.
Input Forward Current
VCC = 18V
0.3
VCC = 5V
0.2
0.1
0.0
0.0
0.2
0.4
0.6
0.8
1.0
1.4
1.5
1.6
1.7
1.2
1.4
1.6
10
TA = 25°C
VCC = 18V
1.0
VCC = 7V
0.1
0.01
0.1
1
10
IF - INPUT FORWARD CURRENT (mA)
IF - INPUT FORWARD CURRENT (mA)
Fig. 11 DC Transfer Characteristics
(HCPL-0700, HCPL-0701)
Fig. 12 DC Transfer Characteristics
(HCPL-0730, HCPL-0731)
140
80
TA = 25°C
IF = 5.0mA
IF = 4.5mA
IF = 4.0mA
IF = 3.5mA
IF = 3.0mA
IF = 2.5mA
60
120
VCC= 5V
TA = 25˚C
40
IO - OUTPUT CURRENT (mA)
IO - OUTPUT CURRENT (mA)
1.3
Fig. 10 Supply Current vs. Input Forward Current
(HCPL-0730, HCPL-0731)
Fig. 9 Logic Low Supply Current vs. Input Forward Current
(HCPL-0700, HCPL-0701)
0.4
1.2
VF - FORWARD VOLTAGE (V)
IF = 2.0mA
IF = 1.5mA
IF = 1.0mA
20
IF = 0.5mA
V CC = 5V
I F = 5mA
I F = 4.5mA
100
4mA
3.5mA
80
3mA
2.5mA
60
2mA
40
1.5mA
1mA
20
0.5mA
0
0
1
2
0
0.0
VO - OUTPUT VOLTAGE (V)
© 2003 Fairchild Semiconductor Corporation
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
VO - OUTPUT VOLTAGE (V)
Page 6 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
TYPICAL PERFORMANCE CURVES
Fig. 13 Current Transfer Ratio vs. Input Forward Current
(HCPL-0700, HCPL-0701)
CTR - CURRENT TRANSFER RATIO (%)
3500
VCC = 5V
VO = 0.4V
TA = 85˚C
3000
TA = 70˚C
2500
TA = 25˚C
2000
1500
TA = 0˚C
1000
TA = -40˚C
500
0
0.1
1
10
IF - INPUT FORWARD CURRENT (mA)
Pulse
Generator
tr = 5ns
Z O = 50 V
1
Noise
Shield
8
IF
I/ f< 100µs
2
7
3
6
VC
CC
Pulse
Generator
tr = 5ns
Z O = 50 V
+5 V
VB
VF
VO
5
2
7
6
V01
V02
+5 V
0.1 µF
VO
C L = 15 pF*
VF2
Rm
+
C L = 15 pF*
Test Circuit for HCPL-0700 and HCPL-0701
*Includes probe and fixture capacitance
-
VCC
L
IF
MONITOR
GND
8
VF1
VO
0.1 µF
4
Noise
Shield
+
1
10% DUTY CYCLE
I/f < 100 µS
RL
I F Monitor
Rm
IF
4
5
GND
Test Circuit for HCPL-0730 and HCPL-0731
IF
5V
VO
1.5 V
1.5 V
VO
OL
TPHL
TPLH
Fig. 14 Switching Time T
Test Circuit
© 2003 Fairchild Semiconductor Corporation
Page 7 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
IF
1
HCPL-0700
HCPL-0730
Noise
Shield
8
VC
CC
HCPL-0701
HCPL-0731
+
+5 V
IF
2
7
VB
1
8
2
7
3
6
4
5
VCC
VF1
-
RL
+5 V
RL
V01
A
VF
A
B
Noise
Shield
3
6
B
VO
VO
VFFF
0.1 µF
VFF
4
5
+
GND
VF2
+
-
V02
VO
0.1 µF
GND
VC
CM
-
+
Pulse Gen
VCM
-
Pulse Gen
Test Circuit for HCPL-0700 and HCPL-0701
Test Circuit for HCPL-0730 and HCPL-0731
VC
CM 10 V
0V
90%
90%
10%
10%
tr
tf
VO
5V
Switch at A : I F = 0 mA
VO
VOL
Switch at B : I F = 1.6 mA
Fig. 15 Common Mode Immunity Test
T
Circuit
© 2003 Fairchild Semiconductor Corporation
Page 8 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
8-Pin Small Outline
0.024 (0.61)
0.060 (1.52)
0.275 (6.99)
0.155 (3.94)
0.050 (1.27)
© 2003 Fairchild Semiconductor Corporation
Page 9 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
ORDERING INFORMATION
Option
Order Entry Identifier
V
V
R1
R1
R1V
R1V
R2
R2
R2V
R2V
Description
VDE 0884
Tape and reel (500 units per reel)
VDE 0884, Tape and reel (500 units per reel)
Tape and reel (2500 units per reel)
VDE 0884, Tape and reel (2500 units per reel)
MARKING INFORMATION
1
700
V
X YY S
3
4
2
6
5
Definitions
1
Fairchild logo
2
Device number
3
VDE mark (Note: Only appears on parts ordered with VDE
option – See order entry table)
4
One digit year code, e.g., ‘3’
5
Two digit work week ranging from ‘01’ to ‘53’
6
Assembly package code
© 2003 Fairchild Semiconductor Corporation
Page 10 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
Carrier Tape Specifications
8.0 ± 0.10
3.50 ± 0.20
2.0 ± 0.05
Ø1.5 MIN
4.0 ± 0.10
0.30 MAX
1.75 ± 0.10
5.5 ± 0.05
12.0 ± 0.3
8.3 ± 0.10
5.20 ± 0.20
6.40 ± 0.20
0.1 MAX
Ø1.5 ± 0.1/-0
User Direction of Feed
Reflow Profile
Temperature (°C)
300
230°C, 10–30 s
250
245°C peak
200
150
Time above 183°C, 120–180 sec
100
Ramp up = 2–10°C/sec
50
• Peak reflow temperature: 245°C (package surface temperature)
• Time of temperature higher than 183°C for 120–180 seconds
• One time soldering reflow is recommended
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Time (Minute)
© 2003 Fairchild Semiconductor Corporation
Page 11 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
© 2003 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
Page 12 of 12
12/11/03