Fairchild FDB15N50 15a, 500v, 0.38 ohm, n-channel smps power mosfet Datasheet

FDH15N50 / FDP15N50 / FDB15N50
15A, 500V, 0.38 Ohm, N-Channel SMPS Power MOSFET
Applications
Features
Switch Mode Power Supplies(SMPS), such as
• Low Gate Charge
Requirement
• PFC Boost
Qg
results
in
Simple
Drive
• Improved Gate, Avalanche and High Reapplied dv/dt
Ruggedness
• Two-Switch Forward Converter
• Single Switch Forward Converter
• Flyback Converter
• Reduced rDS(ON)
• Buck Converter
• Reduced Miller Capacitance and Low Input Capacitance
• High Speed Switching
• Improved Switching Speed with Low EMI
• 175°C Rated Junction Temperature
Package
Symbol
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
GATE
SOURCE
D
DRAIN
(FLANGE)
G
SOURCE
DRAIN
GATE
TO-263AB
DRAIN
(BOTTOM)
FDB SERIES
S
TO-247
TO-220AB
FDH SERIES
FDP SERIES
Absolute Maximum Ratings TC = 25oC unless otherwise noted
Symbol
VDSS
VGS
Parameter
Drain to Source Voltage
Gate to Source Voltage
Ratings
500
Units
V
±30
V
15
A
Drain Current
ID
PD
TJ, TSTG
Continuous (TC = 25oC, VGS = 10V)
o
Continuous (TC = 100 C, VGS = 10V)
11
A
Pulsed1
60
A
Power dissipation
Derate above 25oC
300
2
W
W/oC
Operating and Storage Temperature
Soldering Temperature for 10 seconds
-55 to 175
o
C
300 (1.6mm from case)
o
C
Thermal Characteristics
Thermal Resistance Junction to Case
RθJA
Thermal Resistance Junction to Ambient (TO-247)
40
oC/W
RθJA
Thermal Resistance Junction to Ambient (TO-220, TO-263)
62
o
©2003 Fairchild Semiconductor Corporation
0.50
o
RθJC
C/W
C/W
FDH15N50 / FDP15N50 / FDB15N50 RevD2
FDH15N50 / FDP15N50 / FDB15N50
August 2003
Device Marking
FDH15N50
Device
FDH15N50
Package
TO-247
Reel Size
Tube
Tape Width
-
Quantity
30
FDP15N50
FDP15N50
TO-220
Tube
-
50
FDB15N50
FDB15N50
TO-263
330mm
24mm
800
Electrical Characteristics TJ = 25°C (unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
ID = 250µA, VGS = 0V
500
-
-
V
Reference to 25oC,
ID = 1mA
-
0.58
-
V/°C
Statics
BVDSS
Drain to Source Breakdown Voltage
∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient
rDS(ON)
Drain to Source On-Resistance
VGS = 10V, ID = 7.5A
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250µA
IDSS
Zero Gate Voltage Drain Current
IGSS
Gate to Source Leakage Current
Forward Transconductance
-
0.33
0.38
Ω
2.0
3.4
4.0
V
VDS = 500V
TC = 25oC
-
-
25
VGS = 0V
TC = 150oC
-
-
250
VGS = ±30V
-
-
±100
VDD = 10V, ID = 7.5A
10
-
-
S
-
33
41
nC
-
7.2
10
nC
-
12
16
nC
µA
nA
Dynamics
gfs
Qg(TOT)
Total Gate Charge at 10V
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
td(ON)
tr
td(OFF)
tf
Turn-On Delay Time
VGS = 10V,
VDS = 400V,
ID = 15A
VDD = 250V,
ID = 15A,
RG = 6.2Ω,
RD = 17Ω
Rise Time
Turn-Off Delay Time
Fall Time
CISS
Input Capacitance
COSS
Output Capacitance
CRSS
Reverse Transfer Capacitance
VDS = 25V, VGS = 0V,
f = 1MHz
-
9
-
ns
-
5.4
-
ns
-
26
-
ns
-
5
-
ns
-
1850
-
pF
-
230
-
pF
-
16
-
pF
760
-
-
mJ
-
-
15
A
-
-
15
A
-
-
60
A
Avalanche Characteristics
EAS
Single Pulse Avalanche Energy2
IAR
Avalanche Current
Drain-Source Diode Characteristics
IS
Continuous Source Current
(Body Diode)
1
MOSFET symbol
showing the
integral reverse
p-n junction diode.
D
G
ISM
Pulsed Source Current
(Body Diode)
VSD
Source to Drain Diode Voltage
ISD = 15A
-
0.86
1.2
V
Reverse Recovery Time
ISD = 15A, diSD/dt = 100A/µs
-
470
730
ns
Reverse Recovered Charge
ISD = 15A, diSD/dt = 100A/µs
-
5
6.6
µC
trr
QRR
S
Notes:
1: Repetitive rating; pulse width limited by maximum junction temperature
2: Starting TJ = 25°C, L = 7.0mH, IAS = 15A
©2003 Fairchild Semiconductor Corporation
FDH15N50 / FDP15N50 / FDB15N50 RevD2
FDH15N50 / FDP15N50 / FDB15N50
Package Marking and Ordering Information
100
TJ = 25oC
VGS DESCENDING
ID, DRAIN TO SOURCE CURRENT (A)
ID, DRAIN TO SOURCE CURRENT (A)
100
10V
6.5V
6V
5.5V
5V
4.5V
10
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1
1
10
10
TJ = 175oC
VGS DESCENDING
10V
6V
5.5V
5V
4.5V
4V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1
1
100
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. Output Characteristics
Figure 2. Output Characteristics
3.5
60
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
50 VDD = 100V
NORMALIZED ON RESISTANCE
ID , DRAIN CURRENT (A)
PULSE DURATION = 80µs
40
30
TJ =
175oC
TJ =
25oC
20
10
0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
3.0
DUTY CYCLE = 0.5% MAX
2.5
2.0
1.5
1.0
VGS = 10V, ID = 7.5A
0.5
0
-50
6.5
-25
25
50
75
100
125
150
175
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. Transfer Characteristics
4000
0
o
VGS , GATE TO SOURCE VOLTAGE (V)
Figure 4. Normalized Drain To Source On
Resistance vs Junction Temperature
15
CISS
VGS , GATE TO SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
100
1000
COSS
100
CRSS
VGS = 0V, f = 1MHz
10
1
10
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 5. Capacitance vs Drain To Source
Voltage
©2003 Fairchild Semiconductor Corporation
100
ID = 15A
12
100V
250V
9
400V
6
3
0
0
10
20
30
40
50
Qg, GATE CHARGE (nC)
Figure 6. Gate Charge Waveforms For Constant
Gate Current
FDH15N50 / FDP15N50 / FDB15N50 RevD2
FDH15N50 / FDP15N50 / FDB15N50
Typical Characteristics
100
TC = 25oC
25
100µs
20
15
TJ =
175oC
TJ =
25oC
10
5
ID, DRAIN CURRENT (A)
ISD , SOURCE TO DRAIN CURRENT (A)
30
10
1ms
10ms
1.0
OPERATION IN THIS AREA
0
0.3
0.1
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1
10
VSD , SOURCE TO DRAIN VOLTAGE (V)
1000
Figure 8. Maximum Safe Operating Area
16
50
IAS, AVALANCHE CURRENT (A)
ID, DRAIN CURRENT (A)
100
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Body Diode Forward Voltage vs Body
Diode Current
12
8
4
0
25
50
75
100
125
150
If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R ≠ 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
10
STARTING TJ = 25oC
STARTING TJ = 150oC
1
0.01
175
o
TC, CASE TEMPERATURE ( C)
0.1
1
10
50
tAV, TIME IN AVALANCHE (ms)
Figure 9. Maximum Drain Current vs Case
Temperature
ZθJC , NORMALIZED THERMAL RESPONSE
DC
LIMITED BY RDS(ON)
Figure 10. Unclamped Inductive Switching
Capability
100
0.50
0.20
10
t1
-1
0.10
PD
0.05
t2
DUTY FACTOR, D = t1 / t2
PEAK TJ = (PD X ZθJC X RθJC) + TC
0.02
0.01
10-2 -5
10
SINGLE PULSE
10-4
10-3
10-2
10-1
100
101
t1 , RECTANGULAR PULSE DURATION (s)
Figure 11. Normalized Transient Thermal Impedance, Junction to Case
©2003 Fairchild Semiconductor Corporation
FDH15N50 / FDP15N50 / FDB15N50 RevD2
FDH15N50 / FDP15N50 / FDB15N50
Typical Characteristics
VDS
BVDSS
tP
VDS
L
IAS
VDD
VARY tP TO OBTAIN
+
RG
REQUIRED PEAK IAS
VDD
-
VGS
DUT
tP
IAS
0V
0
0.01Ω
tAV
Figure 12. Unclamped Energy Test Circuit
VDS
Figure 13. Unclamped Energy Waveforms
VDD
Qg(TOT)
RL
VGS = 10V
VDS
VGS
+
VDD
VGS
-
VGS = 1V
DUT
0
Ig(REF)
Qg(TH)
Qgs
Qgd
Ig(REF)
0
Figure 14. Gate Charge Test Circuit
Figure 15. Gate Charge Waveforms
VDS
tON
tOFF
td(ON)
td(OFF)
tr
RL
VDS
tf
90%
90%
+
VGS
VDD
-
10%
10%
0
DUT
90%
RGS
VGS
VGS
0
Figure 16. Switching Time Test Circuit
©2003 Fairchild Semiconductor Corporation
10%
50%
50%
PULSE WIDTH
Figure 17. Switching Time Waveform
FDH15N50 / FDP15N50 / FDB15N50 RevD2
FDH15N50 / FDP15N50 / FDB15N50
Test Circuits and Waveforms
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Advance Information
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Design
This datasheet contains the design specifications for
product development. Specifications may change in
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First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
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Rev. I3
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