AV9108 Integrated Circuit Systems, Inc. CPU Frequency Generator General Description Features The AV9108 offers a tiny footprint solution for generating two simultaneous clocks. One clock, the REFCLK, is a fixed output frequency which is the same as the input reference crystal (or clock). The other clock, CLK1, can vary between 2 and 120 MHz, with up to 16 selectable preprogrammed frequencies stored in internal ROM. • • • • • • • The ICS9108 is ideal for use in a 3.3V system. It can generate a 66.66 MHz clock at 3.3V. In addition, the ICS9108 provides a symmetrical wave form with a worst case duty cycle of 45/55. The ICS9108 has very tight edge control between the CPU clock and 2XCPU clock outputs, with a worst case skew of 250ps. The device has advanced features which include on-chip loop filters, tristate outputs, and power-down capability. A minimum of external components - two decoupling capacitors and an optional ferrite bead - are all that are required for jitter-free operation. Standard versions for computer motherboard applications are the AV9108-03, AV9108-05 and the ICS9108-10. Custom masked versions, with customized frequencies and features, are available in 6-8 weeks for a small NRE fee. Block Diagram AV 9108 RevB032195 • • • • Runs up to 80 MHz at 3.3V 50/50 typical duty cycle at 5V ±250ps absolute jitter Generates frequencies from 2 to 140 MHz 2 to 32 MHz input reference frequency Up to 16 frequencies stored internally Patented on-chip Phase Locked Loop with VCO for clock generation Provides reference clock and synthesized clock On-chip loop filter Low power 0.8µ CMOS technology 8-pin or 14-pin DIP or SOIC package AV9108 Pin Configuration FS0 1 8 REFCLK GND 2 7 VDD X1/ICLK 3 6 CLK1 X2 4 5 FS1 AV9108-05/-10 8-Pin DIP, SOIC FS1 1 14 FS0 FS2 2 13 REFCLK FS3 3 12 VDD AGND 4 11 CLK1 GND 5 10 OE (CLK1) PD 6 9 OE (REFCLK) X1/ICLK 7 8 X2 AV9108-03/-11 14-Pin DIP, SOIC Pin Descriptions for AV9108-03, AV9108-05 and AV9108-10 PIN NUMBER PIN NAME TYPE DESCRIPTION -05/-10/-13 -03 1 5 14 1 2 FS0 FS1 FS2 Input Input Input 3 FS3 Input Frequency Select 3 for CLK1 (-03 has pull-up). 4 5 6 7 AGND GMD PD X1/ICLK Input Input 6 8 9 10 11 X2 OE(REFCLK) OE(CLK1) CLK1 Output Input Input Output Analog GROUND. Digital GROUND. POWER-DOWN. Shuts off chip when low. Internal pull-up. CRYSTAL OUTPUT or INPUT CLOCK frequency. Typically 14.318 MHz system clock. CRYSTAL OUTPUT (No Connect when clock used.). OUTPUT ENABLE. Tristates REFCLK when low. Pull-up. OUTPUT ENABLE. Tristates CLK1 when low. Pull-up. CLOCK1 Output (see decoding tables). 7 8 12 13 VDD REFCLK Output 2 3 4 Frequency Select 0 for CLK1 (-03 has pull-up). Frequency Select 1 for CLK1 (-03 has pull-up). Frequency Select 2 for CLK1 (-03 has pull-up). Digital power supply (+3V DC). REFERENCE CLOCK output. Produces a buffered version of the input clock or crystal frequency (typically 14.318 MHz). 2 AV9108 Decoding Table for AV9108-11 (in MHz) Actual Frequencies Decoding Table for AV9108-05, 14.318 input FS1 FS0 CLK1 0 0 1 1 0 1 0 1 40.01 MHz 50.11 MHz 66.61 MHz 80.01 MHz Decoding Table for AV9108-03, 14.318 input FS3 FS2 FS1 FS0 CLK1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 16.00 MHz 39.99 MHz 50.11 MHz 80.01 MHz 66.58 MHz 100.23 MHz 8.02 MHz 4.01 MHz 8.02 MHz 20.00 MHz 25.06 MHz 40.01 MHz 33.29 MHz 50.11 MHz 4.01 MHz 2.05 MHz FS3 FS2 FS1 FS0 CLK1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 16.00 MHz 33.39 MHz 50.11 MHz 80.01 MHz 66.58 MHz 100.23 MHz 60.00 MHz 4.01 MHz 8.02 MHz 20.05 MHz 25.06 MHz 39.99 MHz 33.25 MHz 50.11 MHz 30.00 MHz 4.01 MHz Decoding Table for AV9108-10, 14.318 input FS1 FS0 CLK1 0 0 1 1 0 1 0 1 25.057 MHz 33.289 MHz 40.006 MHz 50.113 MHz Note: The dash number following ICS9108 must be included when ordering product since it specifies the frequency decoding table being ordered. Decoding options can be created by a simple metal mask change. 3 AV9108 Frequency Accuracy and Calculation Allowable Input and Output Frequencies The accuracy of the frequencies produced by the ICS9108 depends on the input frequency and the desired actual output frequency. The formula for calculating the exact frequency is as follows: The input frequency should be between 2 and 32 MHz and the A/B ratio should not exceed 24. The output should fall in the range of 2-120 MHz. Output Frequency = Input Frequency × A B Output Enable The Output Enable feature tristates the specified output clock pins. This places the selected output pins in a high impedance state to allow for system level diagnostic testing. where A=2, 3, 4 ... 128, and B=2, 3, 4 ... 32. For example, to calculate the actual output frequency for a video monitor expecting a 44.900 MHz clock and using a 14.318 MHz input clock, the closest A/B ratio is 69/22, which gives an output of 44.906 MHz (within 0.02% of the target frequency). Generally, the ICS9108 can produce frequencies within 0.1% of the desired output. Power-Down If equipped, the power-down shuts off the specified PLL or entire chip to save current. A few milliseconds are required to reach full functioning speed from a power-down state. Frequency Transitions A key ICS9108 feature is the ability to provide glitch-free frequency transitions across its output frequency range. The ICS9108 provides smooth transitions between any of the two groups of eight frequencies (when FS3=0 or FS3=1), so that the device will switch glitch-free between 4-100 MHz and 2-50 MHz. 4 AV9108 Absolute Maximum Ratings AVDD, VDD referenced to GND . . . . . . . . . . . . . . . 7V Operating temperature under bias. . . . . . . . . . . . . . . . 0°C to +70°C Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C Voltage on I/O pins referenced to GND. . . . . . . . . . . GND -0.5V to VDD +0.5V Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Electrical Characteristics at 5V (Operating VDD = +4.5V to +5.5V; TA =0°C to 70°C unless otherwise stated) DC Characteristics PARAMETER Input Low Voltage Input High Voltage Input Low Current Input High Current Output Low Voltage Output High Voltage, Note 1 Output Low Current, Note 1 Output High Current, Note 1 Supply Current Supply Current Supply Current Pull-up Resistor, Note 1 SYMBOL VIL VIH IIL IIH VOL VOH IOL IOH ICC ICC (PD low) ICC (PD low) Rpu TEST CONDITIONS MIN TYP MAX UNITS VIN=0V VIN=VDD IOL=10mA IOH=-30mA VOL=0.8V VOH=2.0V Unload, 50 MHz Unload, Logic Inputs 000 2.0 -2.0 2.4 22.0 - 6.0 0.15 3.25 35.0 -50.0 18.0 38.0 0.8 16 2.0 0.40 -35.0 42.0 100.0 V V µA µA V V mA mA mA µA Unload, Logic Inputs 111 - 14.0 40.0 µA - 380.0 700.0 k ohms 45.0 - 0.60 0.40 2.0 1.0 50.0 50.0 100.0 0.2 1.40 1.00 3.5 2.5 55.0 150.0 200.0 1.0 250.0 500.0 3.0 19.0 120.0 18.0 13.0 ns ns ns ns % ps ps % ps ps % MHz MHz ms ms AC Characteristics Rise Time 0.8 to 2.0V, Note 1 Fall Time 2.0 to 0.8V, Note 1 Rise Time 20% to 80%, Note 1 Fall Time 80% to 20%, Note 1 Duty Cycle, Note 1 Jitter, One Sigma, Note 1 Jitter, One Sigma, Note 1 Jitter, One Sigma, Note 1 Jitter, Absolute, Note 1 Jitter, Absolute, Note 1 Jitter, Absolute, Note 1 Input Frequency, Note 1 Output Frequency Power-up Time, Note 1 Transition Time, Note 1 Tr Tf Tr Tf Dt Tjis Tjis Tjis Tjab Tjab Tjab Fi Fo Tpu Tft 15pf load 15pf load 15pf load 15pf load 15pf load @ 1.4V From 20 to 100 MHz From 14 to 16 MHz From 14 to Below From 20 to 100 MHz From 14 to 16 MHz From 14 to Below -250.0 -500.0 11.0 2.0 - 8 to 66.6 MHz 1.0 14.3 7.58 6.0 Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production. 5 AV9108 Electrical Characteristics at 3.3V (Operating VDD = +3.0V to +3.7V; TA =0°C to 70°C unless otherwise stated) DC Characteristics PARAMETER Input Low Voltage Input High Voltage Input Low Current Input High Current Output Low Voltage Output High Voltage Output Low Current Output High Current Supply Current Supply Current Supply Current Pull-up Resistor SYMBOL VIL VIH IIL IIH VOL VOH IOL IOH ICC ICC (PD low) ICC (PD low) Rpu TEST CONDITIONS MIN TYP MAX UNITS VIN=0V VIN=VDD IOL=6mA IOH=-5mA VOL=0.2VDD VOL=0.7VDD Unloaded, 50 MHz Unload, Logic Inputs 000 0.7VDD -2.0 0.85 15.0 - 2.5 0.15 0.92 22.0 -17.0 22.0 13.0 0.20VDD 7.0 2.0 0.1 -10.0 40.0 40.0 V V µA µA V V mA mA mA µA Unload, Logic Inputs 111 - 4.0 12.0 µA - 550.0 900.0 k ohms 40.0 - 2.2 1.2 46.0 50.0 100.0 0.4 3.5 2.5 60.0 150.0 200.0 1.0 250.0 500.0 3.0 15.3 90.0 18.0 13.0 ns ns % ps ps % ps ps % MHz MHz ms ms AC Characteristics Rise Time 20% to 80%, Note 1 Fall Time 80% to 20% Duty Cycle Jitter, One Sigma Jitter, One Sigma Jitter, One Sigma Jitter, Absolute Jitter, Absolute Jitter, Absolute Input Frequency Output Frequency Power-up Time, Note 1 Transition Time, Note 1 Tr Tf Dt Tjis Tjis Tjis Tjab Tjab Tjab Fi Fo Tpu Tft 15pf load 15pf load 15pf load @ 50% From 25 to 85 MHz From 14 to 20 MHz From 14 to Below From 25 to 85 MHz From 14 to 20 MHz From 14 to Below -250.0 -500.0 13.3 2.0 - 8 to 66.6 MHz Parameter is guaranteed by design and characterization. 6 1.0 14.3 7.58 6.0 AV9108 8-Pin DIP Package 14-Pin DIP Package Ordering Information AV9108-XXCN8, ICS9108-XXCN14 Example: XXX XXXX- XX M X#W Lead Count & Package Width Lead Count=1, 2 or 3 digits W=.3” SOIC or .6” DIP; None=Standard Width Package Type N=DIP (Plastic) Pattern Number (2 or 3 digit number for parts with ROM code patterns) Device Type (consists of 3 or 4 digit numbers) Prefix ICS, AV=Standard Device; GSP=Genlock Device 7 AV9108 8-Pin Plastic SOIC 14-Pin SOIC Package Ordering Information ICS9108-XXCS8, IS9108-XXCS14 Example: XXX XXXX- XX M X#W Lead Count & Package Width Lead Count=1, 2 or 3 digits W=.3” SOIC or .6” DIP; None=Standard Width Package Type S=SOIC Pattern Number (2 or 3 digit number for parts with ROM code patterns) Device Type (consists of 3 or 4 digit numbers) Prefix ICS, AV=Standard Device; GSP=Genlock Device 8