CPC7581 Line Card Access Switch INTEGRATED CIRCUITS DIVISION Features Description • • • • The CPC7581 is a monolithic solid-state four-pole switch in a 16-pin package. It provides the necessary functions to replace a 2-Form-C electromechanical relay on traditional analog and integrated voice and data (IVD) line cards found in central office, access, and PBX equipment. The CPC7581 contains solid-state switches for tip and ring lead line break and ringing injection/ringing return. The device requires only a +5 V supply, and offers break-before-make and make-before-break operation using logic-level inputs. • • • • • • • Low, Matched RON Eliminates the Need for Zero-Cross Switching 5V Operation With Power Consumption < 10 mW Flexible Switch Timing for Transition from Ringing Mode to Idle/Talk Mode Clean, Bounce-Free Switching Tertiary Protection Consisting of Integrated Current Limiting, Thermal Shutdown for SLIC Protection Intelligent Battery Monitor Latched Logic-Level Inputs, No External Drive Circuitry Required SOIC Package Pin-Compatible With Legerity Product Small 16-pin SOIC Package Monolithic IC reliability The CPC7581BA versions include an SCR that provides protection to the SLIC and subsequent circuitry during a fault condition. Ordering Information Applications • • • • • • • • Part # Central Office (CO) Digital Loop Carrier (DLC) PBX Systems Digitally Added Main Line (DAML) Hybrid Fiber Coax (HFC) Fiber in the Loop (FITL) Pair Gain System Channel Banks Description CPC7581BA CPC7581BATR CPC7581BB CPC7581BBTR 16-Pin SOIC, with Protection SCR, 50/Tube 16-Pin SOIC, with Protection SCR, 1000/Reel 16-Pin SOIC, without Protection SCR, 50/Tube 16-Pin SOIC, without Protection SCR, 1000/Reel Not for New Designs Figure 1. CPC7581 Block Diagram +5 Vdc 6 TRING 7 VDD CPC7581 SW3 Tip TLINE X 3 2 TBAT X SW1 Secondary Protection SLIC Ring 15 RBAT SW2 RLINE 14 X SW4 SCR and Trip Circuit CPC7581BA) X 12 VBAT 300Ω (min.) 1 FGND VREF L A T C H Switch Control Logic 16 VBAT 9 DGND 10 11 INRINGING LATCH 8 TSD RINGING Pb DS-CPC7581-R06 e3 www.ixysic.com 1 CPC7581 INTEGRATED CIRCUITS DIVISION 1 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 General Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Switch Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.1 Break Switches, SW1 and SW2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.2 Ringing Return Switch, SW3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.3 Ringing Switch, SW4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7 Additional Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 Protection Circuitry Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9 Truth Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3 4 4 4 5 5 6 7 8 9 9 2 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 Switch Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.1 Make-Before-Break Operation Logic Table (Ringing to Talk Transition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2.2 Break-Before-Make Operation Logic Table (Ringing to Talk Transition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3 Data Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.4 TSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.5 Ringing Switch Zero-Cross Current Turn Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.6 Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.7 Battery Voltage Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.8 Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.8.1 Diode Bridge/SCR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.8.2 Current Limiting function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.9 External Protection Elements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2 www.ixysic.com R06 CPC7581 INTEGRATED CIRCUITS DIVISION 1 Specifications 1.1 Package Pinout 1.2 Pinout CPC7581 FGND 1 16 VBAT TBAT 2 15 RBAT TLINE 3 14 RLINE NC 4 13 NC NC 5 12 RRINGING T RINGING 6 11 LATCH VDD 7 10 INRINGING TSD 8 9 DGND R06 www.ixysic.com Pin Name Description 1 FGND Fault ground 2 TBAT Tip lead of the SLIC 3 TLINE Tip lead of the line side 4 NC No connection 5 NC No connection 6 TRINGING 7 VDD +5 V supply 8 TSD Temperature shutdown pin 9 DGND 10 INRINGING 11 LATCH 12 RRINGING 13 NC 14 RLINE Ring lead of the line side 15 RBAT Ring lead of the SLIC 16 VBAT Battery supply Ringing generator return Digital ground Logic control input Data latch enable control input Ringing generator source No connection 3 CPC7581 INTEGRATED CIRCUITS DIVISION 1.3 Absolute Maximum Ratings Parameter +5 V power supply (VDD) Minimum Maximum 1.4 ESD Rating Unit ESD Rating (Human Body Model) 1000 V -0.3 7 V Battery Supply - -85 V DGND to FGND Separation -5 +5 V -0.3 VDD + 0.3 V Logic input to switch output isolation - 320 V Switch open-contact isolation (SW1, SW2, SW3) - 320 V Switch open-contact isolation (SW4) - 465 V Operating relative humidity 5 95 % Operating temperature -40 +110 C Storage temperature -40 +150 C Logic input voltage Absolute maximum electrical ratings are at 25°C. 1.5 General Conditions Unless otherwise specified, minimum and maximum values are production testing requirements. Typical values are characteristic of the device at 25°C and are the result of engineering evaluations. They are provided for informational purposes only and are not part of the manufacturing testing requirements. Specifications cover the operating temperature range TA = -40°C to +85°C. Also, unless otherwise specified all testing is performed with VDD = +5Vdc, logic low input voltage is 0Vdc and logic high input voltage is +5Vdc. Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this data sheet is not implied. Exposure of the device to the absolute maximum ratings for an extended period may degrade the device and affect its reliability. 4 www.ixysic.com R06 CPC7581 INTEGRATED CIRCUITS DIVISION 1.6 Switch Specifications 1.6.1 Break Switches, SW1 and SW2 Parameter Conditions Symbol Minimum Typical Maximum Unit 1 A Off-state leakage current +25° C VSW (differential) = -320 V to gnd VSW (differential) = +260 V to -60 V +85° C VSW (differential) = -330 V to gnd VSW (differential) = +270 V to -60 V -40° C VSW (differential) = -310 V to gnd VSW (differential) = +250 V to -60 V 0.1 ISW - 0.3 0.1 RON +25° C +85° C -40° C RON match ISW = ±10 mA, ±40 mA, RBAT and TBAT = -2 V RON Per on-resistance test condition of SW1, SW2. Magnitude RON SW1-RON SW2 RON 14.5 - 20.5 28 10.5 - - 0.15 0.8 - 300 - 80 160 - - 400 425 - 2.5 - A 1 A - V/s - DC current limit +25° C +85° C VSW (on) = ±10 V -40° C Dynamic current limit (t 0.5 s) ISW Break switches on, all other switches off, apply ±1 kV at 10x1000 s pulse, with appropriate protection in place. mA Logic input to switch output isolation +25° C VSW (TLINE, RLINE) = ±320 V, logic inputs = gnd +85° C VSW (TLINE, RLINE) = ±330 V, logic inputs = gnd -40° C VSW (TLINE, RLINE) = ±310 V, logic inputs = gnd dv/dt sensitivity R06 - 0.1 ISW - 0.3 0.1 - www.ixysic.com 200 5 CPC7581 INTEGRATED CIRCUITS DIVISION 1.6.2 Ringing Return Switch, SW3 Parameter Conditions Symbol Minimum Typical Maximum Unit 1 A Off-state leakage current +25° C VSW (differential) = -320 V to gnd VSW (differential) = +260 V to -60 V +85° C VSW (differential) = -330 V to gnd VSW (differential) = +270 V to -60 V -40° C VSW (differential) = -310 V to gnd VSW (differential) = +250 V to -60 V 0.1 ISW - 0.3 0.1 RON +25° C +85° C ISW (on) = ±0 mA, ±10 mA RON - -40° C 60 - 85 100 45 - DC current limit +25° C +85° C VSW (on) = ±10 V -40° C Dynamic current limit (t 0.5 s) - 135 70 85 210 ISW Ringing switches on, all other switches off, apply ±1 kV at 10x1000 s pulse, with appropriate protection in place. - mA - 2.5 A Logic input to switch output isolation +25° C VSW (TRINGING, TLINE) = ±320 V, logic inputs = gnd +85° C VSW (TRINGING, TLINE) = ±330 V, logic inputs = gnd -40° C VSW (TRINGING, TLINE) = ±310 V, logic inputs = gnd dv/dt sensitivity 6 - 0.1 ISW - 0.3 1 A - V/s 0.1 - www.ixysic.com 200 R06 CPC7581 INTEGRATED CIRCUITS DIVISION 1.6.3 Ringing Switch, SW4 Parameter Conditions Symbol Minimum Typical Maximum Unit 1 A 1.5 3 V 0.1 0.25 mA ISW - 150 mA Off-state leakage current +25° C VSW (differential) = -255 V to +210 V VSW (differential) = +255 V to -210 V +85° C VSW (differential) = -270 V to +210 V VSW (differential) = +270 V to -210 V -40° C VSW (differential) = -245 V to +210 V VSW (differential) = +245 V to -210 V On Voltage ISW (on) = ± 1 mA 0.05 ISW 0.1 0.05 - Ringing generator current to ground during VDD = 5 V, INRINGING = 0 ringing IRINGING On steady-state current* Inputs set for ringing mode - Surge current* Ringing switches on, all other switches off, apply ±1 kV at 10x1000 s pulse, with appropriate protection in place. - - 2 A Release current - IRINGING 300 - A RON 10 15 1 A - V/s RON ISW (on) = ±70 mA, ±80 mA Logic input to switch output isolation +25° C VSW (RRINGING, RLINE) = ±320 V, logic inputs = gnd +85° C VSW (RRINGING, RLINE) = ±330 V, logic inputs = gnd -40° C VSW (RRINGING, RLINE) = ±310 V, logic inputs = gnd dv/dt sensitivity - 0.1 ISW - 0.3 0.1 - 200 *Secondary protection and ringing source current limiting must prevent exceeding this parameter. R06 www.ixysic.com 7 CPC7581 INTEGRATED CIRCUITS DIVISION 1.7 Additional Electrical Characteristics Parameter Conditions Symbol Minimum Typical Maximum Input low voltage - VIL - 2.2 1.5 Input high voltage - VIH 3.5 2.3 - Unit Digital input characteristics Input leakage current (high) VDD = 5.5 V, VBAT = -75 V, VIH = 5 V IIH - 0.1 1 Input leakage current (low) VDD = 5.5 V, VBAT = -75 V, VIL = 0 V IIL - 0.1 1 V A Voltage Requirements VDD - VDD 4.5 5.0 5.5 V VBAT1 - VBAT -19 -48 -72 V 1 VBAT is used only for internal protection circuitry. If VBAT goes more positive than -10 V, the device will enter the all-off state and will remain in the all-off state until the battery goes more negative than -15 V Power requirements Power consumption in talk and all-off states Power consumption in ringing state VDD = 5 V, VBAT = -48 V, measure IDD and IBAT VDD current in talk and all-off states VDD current in ringing state - VBAT current in any state 10 6.5 10 1.1 2.0 mW VDD = 5 V, VBAT = -48 V 5.5 P IDD IBAT mA - 1.3 2.0 - 0.1 10 110 125 150 10 - 25 A Temperature Shutdown Requirements (temperature shutdown flag is active low) Shutdown activation temperature Shutdown circuit hysteresis - - °C Temperature shutdown requirements are not production tested, but rather guaranteed by design. 8 www.ixysic.com R06 CPC7581 INTEGRATED CIRCUITS DIVISION 1.8 Protection Circuitry Electrical Specifications Parameter Conditions Symbol Minimum Typical Maximum Voltage drop at Apply ± dc current limit of break continuous current (50/ switches 60 Hz) Forward Voltage - 2.1 3 Voltage drop at surge current Forward Voltage - - - Unit Parameters Related to the Diodes in the Diode Bridge Apply ± dynamic current limit of break switches V 5 - - * A - mA Parameters Related to the Protection SCR Surge current - 60 (CPC7581xA) 70 (CPC7581xC) T=+25°C ITRIG Trigger current T=+85°C 35 (CPC7581xA) 40 (CPC7581xC) - 110 (CPC7581xA) 135 (CPC7581xC) T=+25°C IHOLD Hold current T=+85°C Gate trigger voltage IGATE = ITRIGGER** Reverse leakage current VBAT = -48 V On-state voltage 0.5 A, t = 0.5 s 2.0 A, t = 0.5 s 60 70 (CPC7581xA) (CPC7581xA) 110 115 (CPC7581xC) (CPC7581xC) VTBAT or VRBAT VBAT -4 - VBAT -2 V IVBAT - - 1.0 A VTBAT or VRBAT- - -3 - V - -5 - V *Passes GR1089 and ITU-T K.20 with appropriate secondary protection in place. **VBAT must be capable of sourcing ITRIGGER for the internal SCR to activate. 1.9 Truth Table 1 State INRINGING Talk 0 Latch 0 Ringing 1 Latched X 1 All-Off X X TSD Z1 Break Switches Ringing Switches On Off Off On Unchanged 0 Off Off Z = High Impedance. Because TSD has an internal pull up at this pin, it should be controlled with an open-collector or open-drain type device. R06 www.ixysic.com 9 CPC7581 INTEGRATED CIRCUITS DIVISION 2 Functional Description 2.1 Introduction relevant ITU, LSSGR, TIA/EIA and IEC protection requirements. The CPC7581 has three states: • Talk. Line break switches SW1 and SW2 closed, ringing switches SW3 and SW4 open. • Ringing. Ringing switches SW3 and SW4 closed, line break switches SW1 and SW2 open. • All-off. All switches open. The CPC7581 operates from a +5 V supply only. This gives the device extremely low idle and active power consumption and allows use with virtually any range of battery voltage. Battery voltage is also used by the CPC7581 as a reference for the integrated protection circuit. In the event of a loss of battery voltage, the CPC7581 enters the all-off state. See “Truth Table” on page 9 for more information. 2.2 Switch Logic The CPC7581 offers break-before-make and make-before-break switching from the ringing state to the talk state with simple logic-level input control. Solid-state switch construction means no impulse noise is generated when switching during ring cadence or ring trip, eliminating the need for external zero-cross switching circuitry. State control is via logic-level input so no additional driver circuitry is required. The line break switches SW1 and SW2 are linear switches that have exceptionally low RON and excellent matching characteristics. The ringing switch SW4 has a breakdown voltage rating of 465V @ 25°C. This is sufficiently high, with proper protection, to prevent breakdown in the presence of a transient fault condition (i.e., passing the transient on to the ringing generator). Integrated into the CPC7581 is a over voltage clamping circuit, active current limiting, and a thermal shutdown mechanism to provide protection to the SLIC device during a fault condition. Positive and negative surges are reduced by the current limiting circuitry and hazardous potentials are steered to ground via diodes and, in CPC7581xA and CPC7581xC parts, an integrated SCR. Power-cross potentials are also reduced by the current limiting and thermal shutdown circuits. The CPC7581 provides, when switching from the ringing state to the talk state, the ability to control the release timing of the ringing switches SW3 and SW4 relative to the state of the line break switches SW1 and SW2 using simple logic-level input. This is called make-before-break or break-before-make operation. When the line break switch contacts (SW1 and SW2) are closed (or made) before the ringing switch contacts (SW3 and SW4) are opened (or broken), this is called make-before-break operation. Break-before-make operation occurs when the ringing contacts (SW3 and SW4) are opened (broken) before the line break contacts (SW1 and SW2) are closed (made). To use make-before-break ringing switch release timing, de-assert INRINGING during ringing. This causes the operational sequence shown in “MakeBefore-Break Operation Logic Table (Ringing to Talk Transition)” on page 11 to occur. To protect the CPC7581 from an overvoltage fault condition, the use of a secondary protector is required. The secondary protector must limit the voltage seen at the tip and ring terminals to a level below the maximum breakdown voltage of the switches. To minimize the stress on the solid-state contacts, use of a foldback or crowbar type secondary protector is recommended. With proper selection of the secondary protector, a line card using the CPC7581 will meet all 10 www.ixysic.com R06 CPC7581 INTEGRATED CIRCUITS DIVISION 2.2.1 Make-Before-Break Operation Logic Table (Ringing to Talk Transition) Timing Ringing Return Switch (SW3) Ringing Switch (SW4) State INRINGING Ringing 1 - Off On On MakeBeforeBreak 0 SW4 waiting for next zero-current crossing to turn off. Maximum time is one-half of the ringing cycle. In this transition state, current that is limited to the dc break switch current limit value will be sourced from the ring node of the SLIC. On Off On Talk 0 Zero-cross current has occurred On Off Off Latch 0 TSD Break Switches Z To use break-before-make ringing switch release timing, assert TSD during ringing. This causes the operational sequence shown in “Break-Before-Make Operation Logic Table (Ringing to Talk Transition)” on page 11 to occur. Logic states and explanations are given in “Truth Table” on page 9. 2.2.2 Break-Before-Make Operation Logic Table (Ringing to Talk Transition) State INRINGING Ringing 1 All-off 1 All-off 1 Talk 0 Latch 0 Ringing Return Switch (SW3) Ringing Switch (SW4) TSD Timing Break Switches Z - Off On On Hold this state for one-half of the ringing cycle. SW4 waiting for zero current to turn off. Off Off On Zero current has occurred. SW4 has opened Off Off Off Release break switches On Off Off 0 Z 2.3 Data Latch The CPC7581 has an integrated data latch. The latch operation is controlled by logic-level input pin 11 (LATCH). The data input of the latch is pin 10 (INRINGING), while the output of the data latch is an internal node used for state control. When the LATCH control pin is at logic 0, the data latch is transparent and data control signals flow directly through to state control. A change in input will be reflected in a change is switch state. When the LATCH control pin is at logic 1, the data latch is active and a change in input control will not affect switch state. The switches will remain in the position they were in when the LATCH changed from logic 0 to logic 1 and will not respond to changes in input as long as the latch is at logic 1. The TSD input is not tied to the data latch. Therefore, TSD is not R06 affected by the LATCH input and the TSD input will override state control. 2.4 TSD The thermal shutdown mechanism activates when the device die temperature reaches a minimum of 110° C, placing the device in the all-off state regardless of logic input. During thermal shutdown mode, pin 8 (TSD) will read a nominal 0 V. Normal output of TSD is typically equal to VDD. If presented with a short duration transient such as a lightning event, the thermal shutdown feature will typically not activate. But in an extended power-cross event, the device temperature will rise and the thermal shutdown will activate forcing the switches to the all-off www.ixysic.com 11 CPC7581 INTEGRATED CIRCUITS DIVISION state. At this point the current measured through the break switches (SW1 and SW2) will drop to zero. Once the device enters thermal shutdown it will remain in the all-off state until the temperature of the device drops below the de-activation level of the thermal shutdown circuit. This permits the device to return to normal operation. If the transient has not passed, current will flow at the value allowed by the dynamic DC current limiting of the switches and heating will begin again, reactivating the thermal shutdown mechanism. This cycle of entering and exiting the thermal shutdown mode will continue as long as the fault condition persists. If the magnitude of the fault condition is great enough, the external secondary protector could activate and shunt all current to ground. The TSD pin is a pull-up current source with a nominal value of 300 A biased from VDD. For applications using low-voltage logic devices (lower than VDD), IXYS Integrated Circuits Division recommends the use of an open-drain type output to control TSD. This avoids sinking the TSD bias current to ground during normal operation when the all-off state is not required. 2.5 Ringing Switch Zero-Cross Current Turn Off After the application of a logic input to turn SW4 off, the ringing switch is designed to delay the change in state until the next zero-crossing. Once on, the switch requires a zero-current cross to turn off, and therefore should not be used to switch a pure DC signal. The switch will remain in the on state no matter the logic input until the next zero crossing. These switching characteristics will reduce and possibly eliminate overall system impulse noise normally associated with ringing switches. See IXYS Integrated Circuits Division’s application note AN-144, Impulse Noise Benefits of Line Card Access Switches for more information. The attributes of ringing switch SW4 may make it possible to eliminate the need for a zero-cross switching scheme. A minimum impedance of 300 in series with the ring generator is recommended. 2.6 Power Supplies Both a +5 V supply and battery voltage are connected to the CPC7581. CPC7581 switch state control is 12 powered exclusively by the +5 V supply. As a result, the CPC7581 exhibits extremely low power dissipation during both active and all-off states. The battery voltage is not used for switch control but rather as a supply for the integrated secondary protection circuitry. The integrated SCR is designed to trigger when pin 2 (TBAT) or pin 15 (RBAT) drops 2 to 4 V below the voltage on pin 16 (VBAT). This trigger prevents a fault-induced overvoltage event at the TBAT or RBAT nodes. 2.7 Battery Voltage Monitor The CPC7581 also uses the VBAT voltage to monitor battery voltage. If system battery voltage is lost, the CPC7581 immediately enters the all-off state. It remains in this state until the battery voltage is restored. The device also enters the all-off state if the system battery voltage goes more positive than –10 V, and remains in the all-off state until the battery voltage goes more negative than –15 V. This battery monitor feature draws a small current from the battery (less than 1 A typical) and adds slightly to the device’s overall power dissipation. Due to the nature of the internal protection circuitry, the VBAT pin can be biased via potentials applied to TBAT or RBAT. This allows the CPC7581 switches to operate, but offers no transient protection. The supply voltage applied to VBAT should therefor be the same supply voltage applied to the line driver device. 2.8 Protection 2.8.1 Diode Bridge/SCR The CPC7581 uses a combination of current limited break switches, a diode bridge/SCR clamping circuit, and a thermal shutdown mechanism to protect the SLIC device or other associated circuitry from damage during line transient events such as lightning. During a positive transient condition, the fault current is conducted through the diode bridge to ground via FGND. Voltage is clamped to a diode drop above ground. During a negative transient of 2 to 4 V more negative than the battery, the SCR conducts and faults are shunted to FGND via the SCR or the diode bridge. In order for the SCR to crowbar (or foldback), the on voltage (see “Protection Circuitry Electrical www.ixysic.com R06 CPC7581 INTEGRATED CIRCUITS DIVISION Specifications” on page 9) of the SCR must be less negative than the battery reference voltage. If the battery voltage is less negative than the SCR on voltage, or if the VBAT supply is unable to source the trigger current, the SCR will not crowbar. For power induction or power-cross fault conditions, the positive cycle of the transient is clamped to a diode drop above ground and the fault current directed to ground. The negative cycle of the transient will cause the SCR to conduct when the voltage exceeds the battery reference voltage by two to four volts, steering the current to ground. input-output isolation barrier of the CPC7581. A foldback or crowbar type protector is recommended to minimize stresses on the device. Consult IXYS Integrated Circuits Division’s application note, AN-100, “Designing Surge and Power Fault Protection Circuits for Solid State Subscriber Line Interfaces” for equations related to the specifications of external secondary protectors, fused resistors and PTCs. Note: The CPC7581xB does not contain the protection SCR. 2.8.2 Current Limiting function If a lightning strike transient occurs when the device in the talk state, the current is passed along the line to the integrated protection circuitry and limited by the dynamic current limit response of break switches SW1 and SW2. When a 1000V 10x1000 s pulse (GR-1089-CORE lightning) is applied to the line though a properly clamped external protector, the current seen through the break switches will be a pulse with a typical magnitude of 2.5 A and a duration of less than 0.5 s. If a power-cross fault occurs with the device in the talk state, the current is passed though the break switches SW1 and SW2 on to the integrated protection circuit and is limited by the dynamic DC current limit response of the two break switches. The DC current limit, specified over temperature, is between 80 mA and 425 mA, and the circuitry has a negative temperature coefficient. As a result, if the device is subjected to extended heating due to power cross fault, the measured current through the break switches (SW1 and SW2) will decrease as the device temperature increases. If the device temperature rises sufficiently, the temperature shutdown mechanism will activate and the device will enter the all-off state. 2.9 External Protection Elements The CPC7581 requires only overvoltage secondary protection on the loop side of the device. The integrated protection feature described above negates the need for protection on the other (usually SLIC) side. The secondary protector limits voltage transients to levels that do not exceed the breakdown voltage or R06 www.ixysic.com 13 CPC7581 INTEGRATED CIRCUITS DIVISION 3 Manufacturing Information 3.1 Moisture Sensitivity All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033. Device Moisture Sensitivity Level (MSL) Rating CPC7581BA / CPC7581BB MSL 1 3.2 ESD Sensitivity This product is ESD Sensitive, and should be handled according to the industry standard JESD-625. 3.3 Reflow Profile This product has a maximum body temperature and time rating as shown below. All other guidelines of J-STD-020 must be observed. Device Maximum Temperature x Time CPC7581BA / CPC7581BB 260°C for 30 seconds 3.4 Board Wash IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to remove flux residue is acceptable, and the use of a short drying bake may be necessary. Chlorine-based or Fluorinebased solvents or fluxes should not be used. Cleaning methods that employ ultrasonic energy should not be used. Pb 14 e3 www.ixysic.com R06 CPC7581 INTEGRATED CIRCUITS DIVISION 3.5 Mechanical Dimensions Recommended PCB Land Pattern 10.211 ± 0.254 (0.402 ± 0.010) 1.27 (0.050) PIN 16 10.312 ± 0.381 (0.406 ± 0.015) 7.493 ± 0.127 (0.295 ± 0.005) 9.40 (0.370) 2.00 (0.079) PIN 1 0.406 ± 0.076 (0.016 ± 0.003) 1.270 TYP (0.050 TYP) 0.60 (0.024) 2.337 ± 0.051 (0.092 ± 0.002) 0.649 ± 0.102 (0.026 ± 0.004) 45º 0.203 ± 0.102 (0.008 ± 0.004) 0.889 ± 0.178 (0.035 ± 0.007) 0.254 / +0.051 / -0.025 (0.010 / +0.002 / -0.001) NOTES: 1. Coplanarity = 0.1016 (0.004) max. 2. Leadframe thickness does not include solder plating (1000 microinch maximum). DIMENSIONS mm (inches) 3.6 Tape and Reel Packaging 330.2 DIA. (13.00 DIA.) W=16 (0.630) Top Cover Tape Thickness 0.102 MAX. (0.004 MAX.) B0=10.70 (0.421) K0=3.20 (0.126) A0=10.90 (0.429) P=12.00 (0.472) K1=2.70 (0.106) Embossed Carrier Embossment NOTES: 1. All dimensions carry tolerances of EIA Standard 481-2 2. The tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2 Dimensions mm (inches) For additional information please visit www.ixysic.com IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses or indemnity are expressed or implied. Except as set forth in IXYS Integrated Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty relating to its products, including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized, or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice. Specification: DS-CPC7581-R06 © Copyright 2012, IXYS Integrated Circuits Division All rights reserved. Printed in USA. 12/18/2012 R06 www.ixysic.com 15