NEC NE25339-T1 General purpose dual-gate gaas mesfet Datasheet

GENERAL PURPOSE
DUAL-GATE GaAs MESFET
FEATURES
NE25339
POWER GAIN AND NOISE FIGURE vs.
DRAIN TO SOURCE VOLTAGE
VGS = 1 V, IDS = 10 mA, f = 900 MHz
• SUITABLE FOR USE AS RF AMPLIFIER AND
MIXER IN UHF APPLICATIONS
• LOW CRSS: 0.02 pF (TYP)
GPS
20
10
• LG1 = 1.0 µm, LG2 = 1.5 µm, WG = 800 µm
• ION IMPLANTATION
• AVAILABLE IN TAPE & REEL OR BULK
Noise Figure, NF (dB)
• LOW NF: 1.1 dB TYP AT 900 MHz
Power Gain, GPS (dB)
• HIGH GPS: 20 dB (TYP) AT 900 MHz
5
10
NF
0
0
0
DESCRIPTION
5
10
Drain to Source Voltage, VDS (V)
The NE253 is an 800 µm dual gate GaAs FET designed to
provide flexibility in its application as a mixer, AGC amplifier,
or low noise amplifier. As an example, by shorting the second
gate to the source, higher gain can be realized than with single
gate MESFETs. This device is available in a mini-mold (surface mount) package.
ELECTRICAL CHARACTERISTICS (TA = 25°C)
PART NUMBER
PACKAGE OUTLINE
SYMBOL
NF
GPS
BVDSX
IDSS
PARAMETERS AND CONDITIONS
Noise Figure at VDS = 5 V, VG2S = 1 V, ID = 10 mA,
f = 900 MHz
Power Gain at VDS = 5 V, VG2S = 1 V, IDS = 10 mA,
f = 900 MHz
Drain to Source Breakdown Voltage at VG1S = -4 V,
VG2S = 0, IDS = 20 µA
Saturated Drain Current at VDS = 5 V, VG2S = 0 V, VG1S = 0 V
NE25339
39
UNITS
MIN
dB
dB
16
V
10
mA
10
TYP
MAX
1.1
2.5
20
40
80
VG1S (OFF)
Gate 1 to Source Cutoff Voltage at VDS = 5 V,
VG2S = 0 V, ID = 100 µA
V
-3.5
VG2S (OFF)
Gate 2 to Source Cutoff Voltage at VDS = 5 V,
VG1S = 0 V, ID = 100 µA
V
-3.5
µA
10
IG1SS
Gate 1 Reverse Current at VDS = 0, VG1S = -4V, VG2S = 0
IG2SS
Gate 2 Reverse Current at VDS = 0. VG2S = -4V, VG1S = 0
|YFS|
Forward Transfer Admittance at VDS = 5 V, VG2S = 1 V,
IDS = 10 mA, f = 1.0 kHz
mS
25
35
CISS
Input Capacitance at VDS = 5 V, VG2S = 1 V, ID = 10 mA,
f = 1 MHz
pF
1.0
1.5
2.0
CRSS
Reverse Transfer Capacitance at VDS = 5 V, VG2S = 1 V,
IDS = 10 mA, f = 1 MHz
pF
0.02
0.035
µA
10
California Eastern Laboratories
NE25339
ABSOLUTE MAXIMUM RATINGS1 (TA = 25°C)
SYMBOLS
PARAMETERS
UNITS
RATINGS
VDSX
Drain to Source Voltage
V
10
VG1S
Gate 1 to Source Voltage
V
-4.5
VG2S
Gate 2 to Source Voltage
V
-4.5
Drain Current
mA
80
TCH
Channel Temperature
°C
125
TSTG
Storage Temperature
°C
-55 to +125
mW
200
ID
PT
Total Power Dissipation
Note:
1. Operation in excess of any one of these parameters may result
in permanent damage.
TYPICAL PERFORMANCE CURVES (TA = 25°C)
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
DRAIN CURRENT vs.
GATE 1 TO SOURCE VOLTAGE
100
VDS = 5 V
FREE
AIR
VG2S = 1 V
200
Drain Current, ID (mA)
Total Power Dissipation, PT (mW)
250
150
100
50
0.5 V
-0.5 V
-1.0 V
0
0
0
25
50
75
100
1.8
125
-1.2
-0.6
0
+0.6
+1.2
Ambient Temperature, TA (°C)
Gate 1 to Source Voltage, VG1S (V)
FORWARD TRANSFER ADMITTANCE vs.
GATE 1 TO SOURCE VOLTAGE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
80
Forward Transfer Admittance, |YFS| mS
Forward Transfer Admittance, |YFS| mS
0V
50
VDS = 5 V
f = 1 kHz
VG2S = 1 V
40
0.5 V
0
-0.5 V
0
-1.8
80
VDS = 5 V
f = 1kHz
VGS2
=1V
40
0.5 V
0V
-0.5 V
0
0
-1.2
-0.6
0
+0.6
Gate 1 to Source Voltage, VG1S (V)
50
+1.2
Drain Current, ID (mA)
100
NE25339
TYPICAL PERFORMANCE CURVES (TA = 25°C)
INPUT CAPACITANCE vs.
GATE 2 TO SOURCE VOLTAGE
POWER GAIN AND NOISE FIGURE vs.
GATE 2 TO SOURCE VOLTAGE
30
2.0
10
VG1S = 1 V at ID = mA
VG1S = 1 V at ID = 5 mA
1.0
0
5
-15
-30
VDS = 5 V
f = 1 kHz
NF
0
-45
0
-1.0
0
+1.0
Noise Figure, NF (dB)
15
Power Gain, GPS (dB)
Input Capacitance, CISS (pF)
GPS
-3.0
-2.0
-1.0
0
+1.0
+2.0
Gate 2 to Source Voltage, VG2S (V)
Gate 2 to Source Voltage, VG2S (V)
POWER GAIN AND NOISE FIGURE vs.
DRAIN CURRENT
10
25
Power Gain, GPS (dB)
VDS = 5 V
VG2S = 1 V
f = 900 MHz
15
5
10
NF
5
0
0
0
5
Drain Current, ID (mA)
TEST CIRCUIT DIAGRAM
900 MHz GPS and NF TEST CIRCUIT
VG2S (1 V)
1000pF
47 kΩ
1000 pF
UP TO 10 pF
D
G2
UP TO 10 pF
INPUT
50 Ω
G1
S
UP TO
10 pF
UP TO
10 pF
L1
OUTPUT
50 Ω
L2
RFC
47 kΩ
1000pF
1000pF
L1, L2, 35 X 5 X 0.2 mm
Note: IDS = 10 mA
VG1S
VDD (5 V)
10
Noise Figure, NF (dB)
GPS
20
NE25339
NONLINEAR MODEL
UNITS FOR MODEL PARAMETERS
Parameter
Units
time
capacitance
inductance
resistance
voltage
current
seconds
farads
henries
ohms
volts
amps
FET NONLINEAR MODEL PARAMETERS(1)
Parameters
FET1
FET2
Parameters
FET1
FET2
UGW
100e-6
100e-6
IDSOC
0.07
0.07
NGF
4
4
RDB
1.0e9
1.0e9
IS
8.78e-10
8.78e-10
CBS
0.16e-12
0.16e-12
N
1.33
1.33
GDBM
0.00035
0
RG
0
0
KDB
0
0
RD
0
0
VDSM
1
1
RS
0
0
GMMAXAC
0.0195
0.0394
RIS
0
0
GAMMAAC
0.006
0.06
RID
0
0
KAPAAC
0.95
0.95
TAU
1.0e-12
1.0e-12
PEFFAC
1.67
2.07
CDSO
5.0e-15
5.0e-15
VTOAC
-1.895
-1.895
C11O
0.25e-12
0.5e-12
VTSOAC
-10
-10
C11TH
0.1e-12
0.1e-12
VDELTAC
3
3
0.0394
VINFL
-1.12
-1.12
GMMAX
0.0294
DELTGS
1.2
1.2
GAMMA
0.005
0.006
DELTDS
1
0.1
KAPA
0.8
0.026
1.636
LAMBDA
0.25
0.25
PEFF
1.636
C11DELT
0
0
VTO
-2
-2
C12O
0
0
VTSO
-10
-10
C12SAT
0.01e-12
0.01e-12
VDELT
1.47
1.47
CGDSAT
1.0e-15
1.0e-15
VCH
1
1
KBK
0.03
0.03
VSAT
3
3
VBR
6.5
6.5
VGO
1.47
1.47
NBR
2
2
VDSO
3
3
(1) Libra EEFET3 Model
NE25339
SCHEMATIC
CAP
CpkgG2D
C = 0.15
IND
Ld
L = 1.30e-02
RES
Rd
R = 4.50
CAP
Cg2d
C = 0.15
IND
Lg2
L = 2.50
PORT
P1
port = 3
RES
Rg2
R = 0.2
CAP
CpkgG1G2
C = 0.21
CAP
Cg1d
C = 4.30e-02
IND
Lg1
L = 1.00e-02
PORT
Pgate1
port = 1
RES
Rg1
R = 0.2
CAP
Cg1s
C = 1.00e-02
PORT
Pdrain
port = 2
EEFET3
FET2
UGW=800
N=4
FILE=720 m_t.mdif
MODE=nonlinear
CAP
CpkgDS
C = 0.21
RES
R12
R = 0.10
EEFET3
FET1
UGW=800
N=4
FILE=720 m_b.mdif
MODE=nonlinear
RES
Rs
R = 5.30
CAP
Cg2s
C = 0.25
IND
Ls
L=3
CAP
CpkgG1S
C = 0.15
PORT
P4
port = 4
UNITS
Parameter
capacitance
inductance
resistance
Units
picofarads
nanohenries
ohms
NOTES:
1. This UGW value scales the model parameters on page 1.
2. This N value is the number of gate fingers and scales the
model parameters on page 1.
Frequency:
Bias:
0.1 to 1.5 GHz
VDS = 3 V, Vg1s= -1.45 V, Vg2s= 1 V, ID = 3 mA
NE25339
ORDERING INFORMATION
OUTLINE DIMENSIONS (Units in mm)
OUTLINE 39
(SOT-143)
+0.2
2.8 -0.3
+0.2
1.5 -0.1
2
2.9 ± 0.2 0.95
PART
NUMBER
AVAILABILITY
IDSS RANGE
(mA)
MARKING
NE25339
NE25339-T1
Bulk up to 3 K
3K/Reel
10 - 80
10 - 80
-
+0.10
0.4 -0.05
(LEADS 2, 3, 4)
3
1.9
0.85
4
1
+0.10
0.6 -0.05
+0.2
1.1 -0.1
1. Source
2. Drain
3. Gate 2
4. Gate 1
0.8
0.16 +0.10
-0.06
5˚
5˚
0 to 0.1
EXCLUSIVE NORTH AMERICAN AGENT FOR
RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS
CALIFORNIA EASTERN LABORATORIES • Headquarters • 4590 Patrick Henry Drive • Santa Clara, CA 95054-1817 • (408) 988-3500 • Telex 34-6393 • FAX (408) 988-0279
24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) • Internet: http://WWW.CEL.COM
8/98
DATA SUBJECT TO CHANGE WITHOUT NOTICE
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