AD ADT7408 12-bit digital temperature sensor Datasheet

±2°C Accurate, 12-Bit Digital
Temperature Sensor
ADT7408
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VDD
APPLICATIONS
8
12- / 10-Bit
DECIMATOR
TEMPERATURE
SENSOR
LPF
1-BIT
EVENT#
5
SDA
6
SCL
CAPABILITY
REGISTER
ALARM TEMP
UPPER
BOUNDARY TRIP
REGISTER
1-BIT
DAC
ADDRESS
POINTER
REGISTER
MANUFACTURER’S
ID REGISTER
ADT7408
7
CONFIGURATION
REGISTER
–
∑-∆
CLK
AND TIMING
GENERATION
DIGITAL COMPARATOR
+
+
REFERENCE
–
FACTORY
RESERVED
REGISTER
ALARM TEMP
LOWER
BOUNDARY TRIP
REGISTER
CRITICAL TEMP
REGISTER
TEMPERATURE
REGISTER
A0 1
A1 2
Memory module temperature monitoring
Isolated sensors
Environmental control systems
Computer thermal monitoring
Thermal protection
Industrial process control
Power system monitors
SMBus/I²C INTERFACE
A2 3
4
Vss
Figure 1.
GENERAL DESCRIPTION
The ADT7408 is the first digital temperature sensor that complies
with JEDEC standard JC-42.4 for the mobile platform memory
module. The ADT7408 contains a band gap temperature sensor
and a 12-bit ADC to monitor and digitize the temperature to a
resolution of 0.0625°C.
There is an open-drain EVENT# output that is active when the
monitoring temperature exceeds a critical programmable limit or
when the temperature falls above or below an alarm window.
This pin can operate in either comparator or interrupt mode.
There are three slave device address pins that allow up to eight
ADT7408s to be used in a system that monitors temperature of
various components and subsystems.
Rev. A
The ADT7408 is specified for operation at supply voltages from
3.0 V to 3.6 V. Operating at 3.3 V, the average supply current is
less than 240 μA typical. The ADT7408 offers a shutdown mode
that powers down the device and gives a shutdown current of 3 A
typical. The ADT7408 is rated for operation over the −20°C to
+125°C temperature range. The ADT7408 is available in a leadfree, 8-lead LFCSP, 3 mm × 3 mm (JEDEC MO-229 WEED-4)
package.
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
05716-001
12-bit temperature-to-digital converter
±2°C accuracy
Operation from −20°C to +125°C
Operation from 3 V to 3.6 V
240 A typical average supply current
Selectable 1.5°C, 3°C, 6°C hysteresis
SMBus-/I2C®-compatible interface
Dual-purpose event pin: comparator or interrupt
8-lead LFCSP, 3 mm × 3 mm (JEDEC MO-229 WEED-4)
package
Complies with JEDEC standard JC-42.4 memory module
Thermal sensor component specification
ADT7408* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
DISCUSSIONS
View a parametric search of comparable parts.
View all ADT7408 EngineerZone Discussions.
DOCUMENTATION
SAMPLE AND BUY
Data Sheet
Visit the product page to see pricing options.
• ADT7408: ±2°C Accurate, 12-Bit Digital Temperature
Sensor Data Sheet
TECHNICAL SUPPORT
DESIGN RESOURCES
Submit a technical question or find your regional support
number.
• ADT7408 Material Declaration
• PCN-PDN Information
DOCUMENT FEEDBACK
• Quality And Reliability
Submit feedback for this data sheet.
• Symbols and Footprints
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
ADT7408
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Address Pointer Register (Write Only).................................... 10
Applications ....................................................................................... 1
Capability Register (Read Only) .............................................. 10
Functional Block Diagram .............................................................. 1
Configuration Register (Read/Write) ...................................... 11
General Description ......................................................................... 1
Temperature Trip Point Registers ............................................ 13
Revision History ............................................................................... 2
ID Registers ................................................................................. 14
Specifications..................................................................................... 3
Temperature Data Format ......................................................... 15
Timing Characteristics ................................................................ 4
Event Pin Functionality ............................................................. 16
Timing Diagram ........................................................................... 4
Serial Interface ............................................................................ 17
Absolute Maximum Ratings ............................................................ 5
SMBus/I2C Communications ................................................... 18
ESD Caution .................................................................................. 5
Applications information .............................................................. 21
Pin Configuration and Function Descriptions ............................. 6
Thermal Response Time ........................................................... 21
Typical Performance Characteristics ............................................. 7
Self-Heating Effects .................................................................... 21
Theory of Operation ........................................................................ 8
Supply Decoupling ..................................................................... 21
Circuit Information ...................................................................... 8
Temperature Monitoring ........................................................... 21
Converter Details.......................................................................... 8
Outline Dimensions ....................................................................... 22
Modes of Operation ..................................................................... 8
Ordering Guide .......................................................................... 22
Registers ........................................................................................... 10
REVISION HISTORY
6/2016—Rev. 0 to Rev. A
Changed CP-8-2 to CP-8-13 ........................................ Throughout
Changes to Figure 4 .......................................................................... 6
Updated Outline Dimensions ....................................................... 22
Changes to Ordering Guide .......................................................... 22
3/2006—Revision 0: Initial Version
Rev. A | Page 2 of 22
Data Sheet
ADT7408
SPECIFICATIONS
All specifications TA = −20°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted.
Table 1.
Parameter
TEMPERATURE SENSOR AND ADC
Local Sensor Accuracy (C Grade)
ADC Resolution
Temperature Resolution
Temperature Conversion Time
Long Term Drift
EVENT# OUTPUT (OPEN DRAIN)
Output Low Voltage, VOL
Pin Capacitance
High Output Leakage Current
Rise Time 1
Fall Time1
RON Resistance (Low Output)1
DIGITAL INPUTS
Input Current
Input Low Voltage
Input High Voltage
SCL, SDA Glitch Rejection1
Pin Capacitance1
DIGITAL OUTPUT (OPEN DRAIN)
Output Low Current
Output Low Voltage
Output High Voltage
Output Capacitance1
POWER REQUIREMENTS
Supply Voltage
Average Supply Current
Supply Current
Shutdown Mode at 3.3 V
Average Power Dissipation
1
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
±0.5
±1
±1
12
0.0625
60
0.081
±2.0
±3.0
±4.0
°C
°C
°C
Bits
°C
ms
°C
75°C ≤ TA ≤ 95°C, 3.0 V ≤ VDD ≤ 3.6 V active range
40°C ≤ TA ≤ 125°C, 3.0 V ≤ VDD ≤ 3.6 V monitor range
−20°C ≤ TA ≤ 125°C, 3.0 V ≤ VDD ≤ 3.6 V
V
pF
µA
ns
ns
Ω
IOL = 3 mA
µA
V
V
ns
pF
VIN = 0 V to VDD
3.0 V ≤ VDD ≤ 3.6 V
3.0 V ≤ VDD ≤ 3.6 V
Input filtering suppresses noise spikes of less than 50 ns
mA
V
V
pF
SDA forced to 0.6 V
3.0 V ≤ VDD ≤ 3.6 V at IOPULL_UP = 350 µA
125
0.4
10
0.1
30
30
15
IOH
tLH
tHL
IIH, IIL
VIL
VIH
−1
1
+1
0.8
2.1
50
10
IOL
VOL
VOH
COUT
VDD
IDD
IDD_CONV
6
0.4
2.1
10
3.0
PD
3.3
240
360
3
790
3.6
500
550
20
V
µA
µA
µA
µW
Guaranteed by design and characterization, not production tested.
Rev. A | Page 3 of 22
Drift over 10 years, if part is operated at 55°C
EVENT# = 3.6 V
Supply and temperature dependent
Device current while converting
VDD = 3.3 V, normal mode at 25°C
ADT7408
Data Sheet
TIMING CHARACTERISTICS
TA = −20°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted.
Table 2.
Parameter1
SCL Clock Frequency
Bus Free Time Between a Stop (P) and Start (S) Condition
Hold Time After (Repeated) Start Condition
Repeated Start Condition Setup Time
High Period of the SCL Clock
Low Period of the SCL Clock
Fall Time of Both SDA and SCL Signals
Rise Time of Both SDA and SCL Signals
Data Setup Time
Data Hold Time
Setup Time for Stop Condition
Capacitive Load for Each Bus Line, CB
1
Symbol
fSCL
tBUF
tHD:STA
tSU:STA
tHIGH
tLOW
tF
tR
tSU:DAT
tHD:DAT
tSU:STO
Min
10
4.7
4.0
4.7
4.0
4.7
Typ
Max
100
50
300
1000
250
300
4.0
400
Unit
kHz
μs
μs
μs
μs
μs
ns
ns
ns
ns
μs
pF
Test Conditions/Comments
After this period, the first clock is generated.
Guaranteed by design and characterization, not production tested.
TIMING DIAGRAM
tF
tR
VIH
SCL
tHD:STA
VIL
tHIGH
tLOW
tR
VIH
tHD:DAT
tSU:STA
tSU:DAT
tSU:STO
tF
VIL
P
S
S
Figure 2. SMBus/I2C Timing Diagram
Rev. A | Page 4 of 22
P
05716-002
tBUF
SDA
Data Sheet
ADT7408
ABSOLUTE MAXIMUM RATINGS
Table 3.
60 – 150 SECONDS
RAMP UP
3°C/SECOND MAX
260 – 5/+0°C
217°C
85°C/W
Refer to Figure 3
150°C – 200°C
Power Dissipation PMAX = (TJMAX − TA)/θJA, where TA is the ambient
temperature. Thermal resistance value relates to the package being used on
a standard 2-layer PCB, which gives a worst-case θJA. Some documents may
publish junction to case, thermal resistance θJC, but it refers to a component
that is mounted on an ideal heat sink. As a result, junction to ambient,
thermal resistance is more practical for air cooled, PCB mounted
components.
RAMP DOWN
6°C/SECOND
MAX.
TIME (Seconds)
60 – 180 SECONDS
20 – 40 SECONDS
480 SECONDS MAX.
Figure 3. LFCSP Pb-Free Reflow Profile Based on JEDEC J-STD-20C
ESD CAUTION
Rev. A | Page 5 of 22
05716-003
1
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3 V
−55°C to +150°C
−65°C to +160°C
150°C
TEMPERATURE (°C)
Parameter
VDD to VSS
SDA Input Voltage to VSS
SDA Output Voltage to VSS
SCL Input Voltage to VSS
EVENT# Output Voltage to VSS
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature, TJMAX
Thermal Resistance1
θJA, Junction-to-Ambient (Still Air)
IR Reflow Soldering Profile
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ADT7408
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
8 VDD
A1 2
A2 3
VSS 4
ADT7408
TOP VIEW
(Not to scale)
7 EVENT#
6 SCL
5 SDA
05716-004
A0 1
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
Mnemonic
A0
A1
A2
VSS
SDA
6
SCL
7
8
EVENT#
VDD
Description
SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD.
SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD.
SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD.
Negative Supply or Ground.
SMBus/I2C Serial Data Input/Output. Serial data to be loaded into the registers of this device and read from these
registers is provided on this pin. Open-drain configuration; it needs a pull-up resistor.
Serial Clock Input. This is the clock input for the serial port. The serial clock is used to clock data into and clock data
out from any register of the ADT7408. Open-drain configuration needs a pull-up resistor.
Active Low. Open-drain event output pin. Driven low on comparator level or alert interrupt.
Positive Supply Power. Decouple the supply to ground.
Rev. A | Page 6 of 22
Data Sheet
ADT7408
TYPICAL PERFORMANCE CHARACTERISTICS
5.0
0.4
VDD = 3.3V
4.0
0.2
0.1
0
–0.1
–0.2
–0.4
–40
05716-015
–0.3
–20
0
20
40
60
80
100
120
3.5
3.0
2.5
2.0
1.5
1.0
05716-016
SHUTDOWN CURRENT (µA)
TEMPERATURE ERROR (°C)
TA = 85°C
4.5
0.3
0.5
0
3.0
140
3.1
3.2
Figure 5. Temperature Accuracy
0.25
300
250
AVERAGE 3.3V
200
150
100
05716-017
50
20
40
60
80
100
120
140
TEMPERATURE (°C)
275
250
225
200
175
05716-019
AVERAGE SUPPLY CURRENT (µA)
TA = 85°C
3.2
3.3
3.4
3.5
3.6
3.8
3.9
4.0
0.20
0.15
0.10
0.05
0
0
1
2
3
4
5
Figure 9. Temperature Accuracy vs. Supply Ripple Frequency
300
3.1
3.7
SUPPLY RIPPLE FREQUENCY (MHz)
Figure 6. Supply Current vs. Temperature
150
3.0
3.6
05716-018
TEMPERATURE ERROR (°C)
AVERAGE SUPPLY CURRENT (µA)
CONVERTING 3.3V
350
0
3.5
TA = 85°C
VDD = 3.3V ± 10%
A 0.1µF CAPACITOR IS CONNECTED AT THE VDD PIN.
400
–20
3.4
Figure 8. Shutdown Current vs. Supply Voltage
450
0
–40
3.3
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
3.7
3.8
3.9
4.0
SUPPLY VOLTAGE (V)
Figure 7. Supply Current vs. Supply Voltage
Rev. A | Page 7 of 22
6
ADT7408
Data Sheet
THEORY OF OPERATION
CIRCUIT INFORMATION
MODES OF OPERATION
The ADT7408 is a 12-bit digital temperature sensor presented
in 13 bits, including the sign bit format (see the bit map in the
Temperature Value Register (Read Only) section). Its output is
twos complement in that Bit D12 is the sign bit and Bit D0 to
Bit D11 are data bits. An on-board sensor generates a voltage
precisely proportional to absolute temperature, which is
compared to an internal voltage reference and input to a
precision digital modulator. Overall accuracy for the ADT7408
is ±2°C from +75°C to +95°C, ±3°C from +40°C to +125°C, and
±4°C from −20°C to +125°C, with excellent transducer linearity.
The serial interface is SMBus-/I2C-compatible, and the opendrain output of the ADT7408 is capable of sinking 6 mA.
The conversion clock for the part is internally generated.
No external clock is required except when reading from and
writing to the serial port. In normal mode, the internal clock
oscillator runs an automatic conversion sequence that initiates
a conversion every 100 ms. At this time, the part powers up its
analog circuitry and performs a temperature conversion. This
temperature conversion typically takes 60 ms, after which time
the analog circuitry of the part automatically shuts down. The
analog circuitry powers up again 40 ms later, when the 100 ms
timer times out and the next conversion begins. Because the
SMBus/I2C circuitry never shuts down, the result of the most
recent temperature conversion is always available in the
temperature value register.
The on-board temperature sensor has excellent accuracy and
linearity over the entire rated temperature range without
needing correction or calibration by the user.
A first-order, ∑-Δ modulator, also known as the charge balance
type analog-to-digital converter (ADC), digitizes the sensor
output. This type of converter uses time domain oversampling and
a high accuracy comparator to deliver 12 bits of effective
accuracy in an extremely compact circuit.
CONVERTER DETAILS
The Σ-Δ modulator consists of an input sampler, a summing
network, an integrator, a comparator, and a 1-bit DAC, as shown
in Figure 10. This architecture creates a negative feedback loop that
minimizes the integrator output by changing the duty cycle of
the comparator output in response to input voltage changes.
There are two simultaneous but different sampling operations
in the device. The comparator samples the output of the integrator
at a much higher rate than the input sampling frequency, that is,
oversampling. Oversampling spreads the quantization noise
over a much wider band than that of the input signal, improving
overall noise performance and increasing accuracy.
The modulated output of the comparator is encoded using a
circuit technique that results in SMBus/I2C temperature data.
Σ-∆ MODULATOR
INTEGRATOR
VOLTAGE REF
AND VPTAT
COMPARATOR
+
–
1-BIT
DAC
1-BIT
LPF DIGITAL
TEMPERATURE
12-BIT VALUE REGISTER
FILTER
05716-005
CLOCK
GENERATOR
Figure 10. First-Order, Σ-Δ Modulator
In normal conversion mode, the internal clock oscillator is reset
after every read or write operation. This causes the device to
start a temperature conversion, the result of which is typically
available 60 ms later. Similarly, when the part is taken out of
shutdown mode, the internal clock oscillator starts, and a
conversion is initiated. The conversion result is typically available
60 ms later. Reading from the device before a conversion is complete does not stop the ADT7408 from converting; the part does
not update the temperature value register immediately after the
conversion but waits until communication to the part is finished.
This read operation provides the previous result. It is possible to
miss a conversion result if the SCL frequency is very slow
(communication is greater than 40 ms), because the next
conversion will have started. There is a 40 ms window between
the end of one conversion and the start of the next conversion
for the temperature value register to be updated with a new
temperature value.
The measured temperature value is compared with the
temperature set at the alarm temperature upper boundary trip
register, the alarm temperature lower boundary trip register,
and the critical temperature trip register. If the measured value
exceeds these limits, then the EVENT# pin is activated. This
EVENT# output is programmable for interrupt mode, comparator
mode, and the output polarity via the configuration register.
+
–
The ADT7408 can be placed in shutdown mode via the
configuration register, in which case the on-chip oscillator is
shut down, and no further conversions are initiated until the
ADT7408 is taken out of shutdown mode by writing 0 to Bit D8
in the configuration register. The conversion result from the last
conversion prior to shutdown can still be read from the ADT7408,
even when it is in shutdown mode.
The thermal sensor continuously monitors the temperature and
updates the temperature data 10 times per second. Temperature
data is latched internally by the device and can be read by
software from the bus host at any time.
Rev. A | Page 8 of 22
Data Sheet
ADT7408
SMBus/I2C slave address selection pins allow up to eight such
devices to co-exist on the same bus. This means that up to eight
memory modules can be supported, given that each module has
one slave device address slot.
After initial power-on, the configuration registers are set to the
default values. Software can write to the configuration register
to set bits as per the bit definitions in the Registers section.
Rev. A | Page 9 of 22
ADT7408
Data Sheet
REGISTERS
The ADT7408 contains 16 accessible registers, shown in Table 5.
The address pointer register is the only register that is eight bits;
the other registers are 16 bits wide. On power-up, the address
pointer register is loaded with 0x00 and points to the capability
register.
ADDRESS POINTER REGISTER (WRITE ONLY)
This 8-bit write only register selects which of the 16-bit registers
is accessed in subsequent read/write operations. Address space
between 0x08 and 0x0F is reserved for factory usage.
Table 5. Registers
Pointer
Address
Not Applicable
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08 to 0x0F
MSB
D15
RFU
D14
RFU
Register Name
Address pointer
Capability
Configuration
Alarm
temperature
upper boundary
trip
Alarm
temperature
lower boundary
trip
Critical
temperature trip
Temperature value
Manufacturer ID
Device ID/revision
Vendor defined
D13
RFU
D12
RFU
D11
RFU
Power-On
Default
0x00
0x001D
0x0000
0x0000
Read/Write
Write
Read
Read/Write
Read/Write
0x0000
Read/Write
0x0000
Read/Write
Undefined
0x11D4
0x080X
0x0000
Read
Read
Read
Reserved
D10
RFU
D9
RFU
D8
RFU
D7
RFU
MSB
D7
0
D6
0
D5
0
D4
0
D3
Register
select
D2
Register
select
Table 6. Address Pointer Selected Registers
D2
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
Register Selected
Capability
Configuration
Alarm temperature upper boundary trip
Alarm temperature lower boundary trip
Critical temperature trip
Temperature value
Manufacturer ID
Device ID/revision
CAPABILITY REGISTER (READ ONLY)
This 16-bit, read-only register indicates the capabilities of the
thermal sensor, as shown in Table 7 and the following bit map.
Note that RFU means reserved for future use.
D6
RFU
D5
RFU
D4
TRES1
D3
TRES0
D2
Wider
range
D1
Higher
precision
Table 7. Capability Mode Description
Bit(s)
D0
(Alarm/Critical Trips)
D1
(Higher Precision)
D2
(Wider Range)
[D4:D3]
(Temperature Resolution)
[D15:D5]
D1
Register
select
LSB
D0
Register
select
Function
Basic capability.
D0
Trips Capability
1
Alarm and critical trips capability.
Accuracy.
D1
Accuracy Capability
0
Default accuracy ±2°C over the active range and ±3°C over the monitor range.
Wider range.
D2
Temperature Range Capability
1
Can read temperature below 0°C and set sign bit accordingly (default).
Temperature resolution.
[D4:D3] Temperature Resolution
01
0.25°C LSB.
11
0.0625°C LSB (default).
Reserved for future use; must be 0.
Rev. A | Page 10 of 22
LSB
D0
Alarm/critical
trips
Data Sheet
ADT7408
CONFIGURATION REGISTER (READ/WRITE)
This 16-bit read/write register stores various configuration modes for the ADT7408, as shown in Table 8 and the following bit map. Note
that RFU means reserved for future use.
MSB
D15
RFU
D14
RFU
D13
RFU
D12
RFU
D11
RFU
D10 D9
Hysteresis
D8
Shutdown
mode
D7
Critical
lock bit
D6
Alarm
lock bit
D5
Clear
event
D4
Event
output
status
D3
Event
output
control
D2
Critical
event
only
D1
Event
polarity
LSB
D0
Event
mode
Table 8. Configuration Mode Description
Bit(s)
D0
D1
D2
D3
D4
D5
D6
D7
D8
Description
Event mode.
0: comparator output mode (default).
1: interrupt mode.
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Event polarity.
0: active low (default).
1: active high.
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Critical event only.
0: event output on alarm or critical temperature event (default).
1: event only if temperature is above the value in the critical temperature trip register.
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Event output control.
0: event output disabled (default).
1: event output enabled.
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Event output status (read only).
0: event output condition is not being asserted by this device.
1: event output pin is being asserted by this device due to alarm window or critical trip condition.
The actual cause of an event can be determined from the read of the temperature value register. Interrupt events can be cleared
by writing to the clear event bit. Writing to this bit has no effect on the output status because it is a read function only.
Clear event (write only).
0: no effect.
1: clears an active event in interrupt mode.
Writing to this register has no effect in comparator mode. When read, this bit always returns 0. Once the DUT temperature
is greater than the critical temperature, an event cannot be cleared (see Figure 12).
Alarm window lock bit.
0: alarm trips are not locked and can be altered (default).
1: alarm trip register settings cannot be altered.
This bit is initially cleared. When set, this bit returns a 1 and remains locked until cleared by internal power on reset. These bits
can be written with a single write and do not require double writes.
Critical trip lock bit.
0: critical trip is not locked and can be altered (default).
1: critical trip register settings cannot be altered.
This bit is initially cleared. When set, this bit returns a 1 and remains locked until cleared by internal power on reset. These bits
can be written with a single write and do not require double writes.
Shutdown mode.
0: TS enabled (default).
1: TS shut down.
When shut down, the thermal sensing device and ADC are disabled to save power. No events are generated. When either lock bit
is set, this bit cannot be set until unlocked. However, it can be cleared at any time.
Rev. A | Page 11 of 22
ADT7408
Description
Hysteresis enable.
00: disable hysteresis.
01: enable hysteresis at 1.5°C.
10: enable hysteresis at 3°C.
11: enable hysteresis at 6°C.
TH
TH – HYST
TL
TL – HYST
BELOW WINDOW BIT
05716-006
Bit(s)
D10:D9
Data Sheet
ABOVE WINDOW BIT
Figure 11. Hysteresis
Rev. A | Page 12 of 22
Data Sheet
ADT7408
TEMPERATURE TRIP POINT REGISTERS
There are three temperature trip point registers. They are the alarm temperature upper boundary trip register, the alarm temperature
lower boundary trip register, and the critical temperature trip register.
Alarm Temperature Upper Boundary Trip Register (Read/Write)
The value is the upper threshold temperature value for alarm mode. The data format is twos complement with one LSB = 0.25°C. RFU
(reserved for future use) bits are not supported and always report 0. Interrupts respond to the programmed boundary values. If boundary
values are being altered in-system, the user should turn off interrupts until a known state can be obtained to avoid superfluous interrupt
activity. The format of this register is shown in the following bit map:
D15
0
D14
0
D13
0
Sign
MSB
D12
D11
D10
D9
D8
D7
D6
D5
Alarm window upper boundary temperature
D4
D3
LSB
D2
D1
RFU
D0
RFU
Alarm Temperature Lower Boundary Trip Register (Read/Write)
The value is the lower threshold temperature value for alarm mode. The data format is twos complement with one LSB = 0.25oC. RFU bits
are not supported and always report 0. Interrupts respond to the programmed boundary values. If boundary values are being altered in-system,
the user should turn off interrupts until a known state can be obtained to avoid superfluous interrupt activity. The format of this register
is shown in the following bit map:
D15
0
D14
0
D13
0
Sign
MSB
D12
D11
D10
D9
D8
D7
D6
D5
Alarm window upper boundary temperature
D4
D3
LSB
D2
D1
RFU
D0
RFU
Critical Temperature Trip Register (Read/Write)
The value is the critical temperature. The data format is twos complement with one LSB = 0.25oC. RFU bits are not supported and always
report 0. The format of this register is shown in the following bit map:
D15
0
D14
0
D13
0
Sign
MSB
D12
D11
D10
D9
D8
D7
D6
Critical temperature trip point
D5
D4
D3
LSB
D2
D1
RFU
D0
RFU
Temperature Value Register (Read Only)
This 16-bit, read-only register stores the trip status and the temperature measured by the internal temperature sensor, as shown in Table 9. The
temperature is stored in 13-bit, twos complement format with the MSB being the temperature sign bit and the 12 LSBs representing
temperature. One LSB = 0.0625oC. The most significant bit has a resolution of 128oC.
When reading from this register, the eight MSBs (Bit D15 to Bit D8) are read first, and then the eight LSBs (Bit D7 to Bit D0) are read.
The trip status bits represent the internal temperature trip detection and are not affected by the status of the event or configuration bits,
for example, event output control, clear event. If both above and below are 0, then the current temperature is exactly within the alarm
window boundaries, as defined in the configuration register. The format and descriptions are shown in Table 9 and the following bit map:
D15
Above
critical
trip
D14
Above
alarm
window
D13
Below
alarm
window
Sign
MSB
D12
D11
D10
D9
D8
D7
D6
Temperature
Rev. A | Page 13 of 22
D5
D4
D3
D2
D1
LSB
D0
ADT7408
Data Sheet
Table 9. Temperature Register Trip Status Description
Bit
D13
(Below Alarm Window)
D14
(Above Alarm Window)
D15
(Above Critical Trip)
Definition
Below alarm window.
D13
Temperature Alarm Status
0
Temperature is equal to or above the alarm window lower boundary temperature.
1
Temperature is below the alarm window lower boundary temperature.
Above alarm window
D14
Temperature Alarm Status
0
Temperature is equal to or below the alarm window upper boundary temperature.
1
Temperature is above the alarm window upper boundary temperature.
Above critical trip
D15
Critical Trip Status
0
Temperature is below the critical temperature setting.
1
Temperature is equal to or above the critical temperature setting.
ID REGISTERS
Manufacturer ID Register (Read Only)
This manufacturer ID matches that assigned to a vendor within the PCI SIG. This register can be used to identify the manufacturer of the
device in order to perform manufacturer-specific operations. Manufacturer IDs can be found at www.pcisig.com. The format of this
register is shown in the following bit map:
D15
0
D14
0
D13
0
D12
1
D11
0
D10
0
D9
0
D8
1
D7
1
D16
1
D5
0
D4
1
D3
0
D2
1
D1
0
D0
0
Device ID and Revision Register (Read Only)
This device ID and device revision are assigned by the device manufacturer. The device revision starts at 0 and is incremented by 1
whenever an update to the device is issued by the manufacturer. The format of this register in shown in the following bit map:
D15
0
D14
0
D13
0
D12
0
D11
1
D10
0
D9
0
D8
0
D7
0
Rev. A | Page 14 of 22
D6
0
D5
0
D4
0
D3
0
D2
0
D1
0
D0
1
Data Sheet
ADT7408
TEMPERATURE DATA FORMAT
The values used in the temperature register and three temperature
trip point registers are in twos complement format. The
temperature register has a 12-bit resolution with 256°C range
with 1 LSB = 0.0625°C (256°C/212); see Table 10. The temperature
data in the three temperature trip point registers (alarm upper,
alarm lower, and critical) is a 10-bit format with 256°C range
with 1 LSB = 0.25°C (see the bit maps in the Alarm Temperature
Lower Boundary Trip Register (Read/Write) section, the Critical
Temperature Trip Register (Read/Write) section, and the
Temperature Value Register (Read Only) section.) Bit D12 in all
these registers represents the sign bit such that 0 = positive
temperature and 1 = negative temperature. In twos complement
format, the data bits are inverted and add 1 if Bit D12 (the sign bit)
is negative.
Temperature Conversion Formulas
12-Bit Temperature Data Format
Positive Temperature = ADC Code(d)/16
Negative Temperature = (ADC Code(d) − 4096)/16
(1)
(2)
where d is the 12-bit digital output in decimal.
Note that Bit D12 (the sign bit) is not included in the ADC
code, but the sign is inserted in the final result.
Table 10 tabulates some temperature results vs. digital outputs.
10-Bit Temperature Data Format
Positive Temperature = ADC Code(d)/4
Negative Temperature = (ADC Code(d) − 1024)/4
(3)
(4)
Similarly, Bit D12 (the sign bit) is not included in the ADC
code, but the sign is inserted in the final result. This ADC code
contains DB2 to DB11. DB0 to DB1 are not in this calculation.
Although one LSB of the ADC corresponds to 0.0625°C, the
ADC can theoretically measure a temperature range of 255°C
(−128°C to +127°C). The ADT7408 is guaranteed to measure a
low value temperature limit of −55°C to a high value temperature
limit of +125°C.
Reading back the temperature from the temperature value
register requires a 2-byte read.
Designers accustomed to using a 9-bit temperature data format
can still use the ADT7408 by ignoring the last three LSBs of the
12-bit temperature value.
Table 10. 12-Bit Temperature Data Format
Digital Output (Binary),
D12 to D0
1 1100 1001 0000
1 1100 1110 0000
1 1110 0110 1111
1 1111 1111 1111
0 0000 0000 0000
0 0000 0000 0001
0 0000 1010 0000
0 0001 1001 0000
0 0011 0010 0000
0 0100 1011 0000
0 0110 0100 0000
0 0111 1101 0000
Rev. A | Page 15 of 22
Digital Output (Hex)
C90
CE0
E6F
FFF
000
0x001
0x0A0
0x190
0x320
0x4B0
0x640
0x7D0
Temperature
−55°C
−50°C
−25°C
−0.0625°C
0°C
+0.0625°C
+10°C
+25°C
+50°C
+75°C
+100°C
+125°C
ADT7408
Data Sheet
EVENT PIN FUNCTIONALITY
Critical Trip
Figure 12 shows the three differently defined outputs of EVENT#
corresponding to the temperature change. EVENT# can be
programmed to be one of the three output modes in the
configuration register.
The device can be programmed in such a way that the EVENT#
output is triggered only when the temperature exceeds critical
trip point. The critical temperature setting is programmed in
the critical temperature register. When the temperature sensor
reaches the critical temperature value in this register, the device
is automatically placed in comparator mode, meaning that the
critical event output cannot be cleared through software by
setting the clear event bit.
If while in interrupt mode the temperature reaches the critical
temperature, the device switches to the comparator mode
automatically and asserts the EVENT# output. When the
temperature drops below the critical temperature, the part
switches back to either interrupt mode or comparator mode, as
programmed in the configuration register.
Interrupt Mode
After an event occurs, software can write a 1 to the clear event
bit in the configuration register to de-assert the EVENT#
interrupt output, until the next trigger condition occurs.
Note that Figure 12 is drawn with no hysteresis, but the values
programmed into Configuration Register 0x01, Bits[10:9] affect
the operation of the event trigger points. See Figure 11 for the
explanation of hysteresis functionality.
Comparator Mode
Reads/writes on the device registers do not affect the EVENT#
output in comparator mode. The EVENT# signal remains
asserted until the temperature drops outside the range or until
the range is reprogrammed such that the current temperature is
outside the range.
Event Thresholds
All event thresholds use hysteresis as programmed in the
Configuration Register 0x01, Bits[10:9] to set when they
deassert.
Alarm Window Trip
The device provides a comparison window with an upper
temperature trip point in the alarm upper boundary register
and a lower trip point in the alarm lower boundary register.
When enabled, the EVENT# output is triggered whenever entering
or exiting (crossing above or below) the alarm window.
TEMPERATURE
CRITICAL
HYSTERESIS AFFECTS
THESE TRIP POINTS
ALARM
WINDOW
TIME
S/W CLEARS EVENT
EVENT# IN “INTERRUPT”
EVENT# IN “COMPARATOR” MODE
Figure 12. Temperature, Trip, and Events
Rev. A | Page 16 of 22
05716-007
EVENT# IN “CRITICAL TEMP ONLY” MODE
1. EVENT# CANNOT BE CLEARED ONCE THE DUT TEMPERATURE
IS GREATER THAN THE CRITICAL TEMPERATURE
Data Sheet
ADT7408
SERIAL INTERFACE
The serial bus protocol operates as follows:
Control of the ADT7408 is carried out via the SMBus-/I2Ccompatible serial interface. The ADT7408 is connected to this
bus as a slave and is under the control of a master device.
1.
Figure 13 shows a typical SMBus/I2C interface connection.
PULLUP
VDD
VDD
ADT7408
10kΩ
PULLUP
VDD
10kΩ
10kΩ
2.
EVENT#
SCL
A0
SDA
A2
05716-008
A1
GND
Figure 13. Typical SMBus/I2C Interface Connection
Serial Bus Address
Like all SMBus-/I2C-compatible devices, the ADT7408 has a 7-bit
serial address. The four MSBs of this address for the ADT7408 are
set to 0011. Pin 1, Pin 2, and Pin 3 (A0, A1, and A2) set the
three LSBs. These pins can be configured either low or high,
permanently or dynamically, to give eight different address
options. Table 11 shows the different bus address options
available. Recommended pull-up resistor value on the SDA
and SCL lines is 2.2 kΩ to 10 kΩ.
3.
4.
Table 11. SMBus/I2C Bus Address Options
Binary, A6 to A0
0011 0 0 0
0011 0 0 1
0011 0 1 0
0011 0 1 1
0011 1 0 0
0011 1 0 1
0011 1 1 0
0011 1 1 1
Hex Address
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
The ADT7408 has been designed with a SMBus/I2C timeout.
The SMBus/I2C interface times out after 75 ms to 100 ms of no
activity on the SDA line. After this timeout the ADT7408 resets
the SDA line back to its idle state (SDA set to high impedance)
and waits for the next start condition.
The master initiates data transfer by establishing a start
condition, defined as a high-to-low transition on the serial
data line SDA, while the serial clock line, SCL, remains
high. This indicates that an address/data stream follows.
All slave peripherals connected to the serial bus respond to
the start condition and shift in the next eight bits,
consisting of a 7-bit address (MSB first) plus a R/W bit.
The R/W bit determines whether data is written to, or read
from, the slave device.
The peripheral with the address corresponding to the
transmitted address responds by pulling the data line low
during the low period before the ninth clock pulse, known
as the acknowledge bit. All other devices on the bus now
remain idle while the selected device waits for data to be
read from or written to it. If the R/W bit is a 0, then the
master writes to the slave device. If the R/W bit is a 1, the
master reads from the slave device.
Data is sent over the serial bus in sequences of nine clock
pulses: eight bits of data followed by an acknowledge bit
from the receiver of data. Transitions on the data line must
occur during the low period of the clock signal and remain
stable during the high period, because a low to high
transition when the clock is high can be interpreted as a
stop signal.
When all data bytes have been read or written, stop
conditions are established. In write mode, the master pulls
the data line high during the 10th clock pulse to assert a
stop condition. In read mode, the master device pulls the
data line high during the low period before the ninth clock
pulse. This is known as no acknowledge. The master then
takes the data line low during the low period before the
10th clock pulse, then high during the 10th clock pulse to
assert a stop condition.
Any number of bytes of data can be transferred over the serial
bus in one operation. However, it is not possible to mix read
and write in one operation because the type of operation is
determined at the beginning and cannot subsequently be
changed without starting a new operation.
The I2C address set up by the three address pins is not latched
by the device until after this address has been sent twice. On the
eighth SCL cycle of the second valid communication, the serial
bus address is latched in. This is the SCL cycle directly after the
device has seen its own I2C serial bus address. Any subsequent
changes on this pin have no effect on the I2C serial bus address.
Rev. A | Page 17 of 22
ADT7408
Data Sheet
SMBUS/I2C COMMUNICATIONS
The data byte has the most significant bit first. At the end of a
read, the ADT7408 accepts either acknowledge (ACK) or no
acknowledge (NO ACK) from the master. No acknowledge is
typically used as a signal for the slave that the master has read
its last byte. It typically takes the ADT7408 100 ms to measure
the temperature.
The pointer register selects the data registers in the ADT7408.
At power-up, the pointer register is set to 0x00, the location for
the capability register. The pointer register latches the last
location to which it was set. Each data register falls into one
of the following three types of user accessibility:



Writing Data to a Register
Read only
Write only
Write/read same address
With the exception of the pointer register, all other registers are
16 bits wide, so two bytes of data are written to these registers.
Writing two bytes of data to these registers consists of the serial
bus address, the data register address written to the pointer
register, followed by the two data bytes written to the selected
data register (see Figure 14). If more than the required number
of data bytes is written to a register, then the register ignores
these extra data bytes. To write to a different register, another
start or repeated start is required.
A write to the ADT7408 always includes the address byte and
the pointer byte. A write to any register other than the pointer
register requires two data bytes.
Reading data from the ADT7408 occurs in one of the following
two ways:

If the location latched in the pointer register is correct,
then the read simply consists of an address byte, followed
by retrieving the two data bytes.
If the pointer register needs to be set, then an address byte,
pointer byte, repeat start, and another address byte
accomplish a read.
1
9
1
9
SCL
SDA
A6
A5
A4
A3
A2
A1
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
ACK
BY
TS
START BY
MASTER
ACK
BY
TS
FRAME 1
SERIAL BUS ADDRESS BYTE
STOP
BY
MASTER
FRAME 2
POINTER BYTE
1
9
1
9
SCL
(CONTINUED)
SDA
(CONTINUED)
D15
D14
D13
D12
D11
D10
D9
D8
FRAME 3
MOST SIGNIFICANT DATA BYTE
D7
ACK
BY
TS
D6
D5
D4
D3
D2
D1
FRAME 4
LEAST SIGNIFICAN DATA BYTE
D0
ACK
BY
TS
STOP
BY
MASTER
05716-009

Figure 14. Writing to the Address Pointer Register, Followed by Two Bytes of Data
Rev. A | Page 18 of 22
Data Sheet
ADT7408
Reading Data From the ADT7408
The write operation consists of the serial bus address followed
by the pointer byte. No data is written to any of the data
registers. Because the location latched in the pointer register is
correct, then the read consists of an address byte, followed by
retrieving the two data bytes (see Figure 16).
Reading data from the ADT7408 can take place in one of the
following two ways:
Writing to the Pointer Register for a Subsequent Read
To read data from a particular register, the pointer register must
contain the address of the data register. If it does not, the
correct address must be written to the address pointer register
by performing a single-byte write operation (see Figure 15).
1
Reading from Any Pointer Register
On the other hand, if the pointer register needs to be set, then
an address byte, pointer byte, repeat start, and another address
byte accomplish a read (see Figure 17).
9
1
9
SDA
A6
START
BY MASTER
A5
A4
A3
A2
A1
A0
D7
R/W
D6
D5
D4
ACK
BY
TS
FRAME 1
SERIAL BUS ADDRESS BYTE
D3
D2
D1
D0
ACK
BY
TS
FRAME 2
POINTER BYTE
STOP
BY
MASTER
Figure 15. Writing to the Address Pointer Register to Select a Register for a Subsequent Read Operation
1
9
1
9
SCL
SDA
A6
START
BY
MASTER
A5
A4
A3
A2
A1
A0
R/W
D15
D14
ACK
BY
TS
FRAME 1
SERIAL BUS ADDRESS BYTE
D13
D12
D11
D10
D9
FRAME 2
MOST SIGNIFICANT DATA BYTE
1
D8
ACK
BY
MASTER
9
SCL
(CONTINUED)
D7
D6
D5
D4
D3
D2
D1
D0
NO ACK
BY
MASTER
STOP
BY
MASTER
FRAME 3
LEAST SIGNIFICANT DATA BYTE
Figure 16. Reading Back Data from the Register with the Preset Pointer
Rev. A | Page 19 of 22
05716-011
SDA
(CONTINUED)
05716-010
SCL
ADT7408
Data Sheet
1
9
1
9
SCL
SDA
A6
A5
A4
START
BY
MASTER
A3
A2
A1
A0
R/W
D15
D14
D13
ACK
BY
TS
FRAME 1
SERIAL BUS ADDRESS BYTE
1
D12
D11
D10
D9
ACK
BY
MASTER
FRAME 2
POINTER BYTE
9
D8
1
9
SCL
(CONTINUED)
SDA
A6
(CONTINUED)
REPEAT START
BY MASTER
A5
A4
A3
A2
A1
R/W
A0
D15
D14
D13
D12
D11
D10
D9
ACK
BY
TS
FRAME 3
SERIAL BUS ADDRESS BYTE
FRAME 4
POINTER BYTE
1
D8
ACK
BY
MASTER
9
SCL
(CONTINUED)
D7
D6
D5
D4
D3
D2
D1
D0
NO ACK
BY
MASTER
STOP
BY
MASTER
FRAME 5
LEAST SIGNIFICANT DATA BYTE
Figure 17. A Write to the Pointer Register Followed by a Repeat Start and an Immediate Data-Word Read
Rev. A | Page 20 of 22
05716-012
SDA
(CONTINUED)
Data Sheet
ADT7408
APPLICATIONS INFORMATION
SELF-HEATING EFFECTS
The temperature measurement accuracy of the ADT7408 may
be degraded in some applications due to self-heating. Errors can
be introduced from the quiescent dissipation and power dissipated
when converting. The magnitude of these temperature errors is
dependent on the thermal conductivity of the ADT7408 package,
the mounting technique, and the effects of airflow. At 25°C,
static dissipation in the ADT7408 is typically 778 μW operating
at 3.3 V. In the 8-lead LFCSP package mounted in free air, this
accounts for a temperature increase due to self-heating of
ΔT = PDISS × θJA = 778 μW × 85°C/W = 0.066°C
Current dissipated through the device must be kept to a minimum
by applying shutdown when the device can be put in the idle
state, because it has a proportional effect on the temperature error.
SUPPLY DECOUPLING
Decouple the ADT7408 with a 0.1 μF ceramic capacitor between
VDD and GND. This is particularly important when the
ADT7408 is mounted remotely from the power supply. Precision
analog products, such as the ADT7408, require a well-filtered
power source. Because the ADT7408 operates from a single
supply, it might seem convenient to tap into the digital logic
power supply.
Unfortunately, the logic supply is often a switch-mode design,
which generates noise in the 20 kHz to 1 MHz range. In addition,
fast logic gates can generate glitches hundreds of mV in
amplitude due to wiring resistance and inductance.
If possible, power the ADT7408 directly from the system power
supply. This arrangement, shown in Figure 18, isolates the
analog section from the logic switching transients. Even if a
separate power supply trace is not available, however, generous
supply bypassing reduces supply line, induced errors.
TTL/CMOS
LOGIC
CIRCUITS
0.1µF
ADT7408
POWER
SUPPLY
05176-013
The time required for a temperature sensor to settle to a specified
accuracy is a function of the thermal mass of the sensor and
the thermal conductivity between the sensor and the object
being sensed. Thermal mass is often considered equivalent to
capacitance. Thermal conductivity is commonly specified using
the symbol Q and can be thought of as thermal resistance. It
is commonly specified in units of degrees per watt of power
transferred across the thermal joint. Thus, the time required for
the ADT7408 to settle to the desired accuracy is dependent on
the package selected, the thermal contact established in that
particular application, and the equivalent power of the heat source.
In most applications, the settling time is best determined
empirically.
Place this decoupling capacitor as close as possible to the ADT7408
VDD pin.
Figure 18. Using Separate Traces to Reduce Power Supply Noise
TEMPERATURE MONITORING
The ADT7408 is ideal for monitoring the thermal environment
within electronic equipment. For example, the surface-mounted
package accurately reflects the exact thermal conditions that
affect nearby integrated circuits.
The ADT7408 measures and converts the temperature at the
surface of its own semiconductor chip. When the ADT7408 is
used to measure the temperature of a nearby heat source, the
thermal impedance between the heat source and the ADT7408
must be considered. Often, a thermocouple or other temperature
sensor is used to measure the temperature of the source, while
the temperature is monitored by reading back from the ADT7408
temperature value register.
Once the thermal impedance is determined, the heat source
temperature can be inferred from the ADT7408 output. As
much as 60% of the heat transferred from the heat source to the
thermal sensor on the ADT7408 die is discharged via the copper
tracks, the package pins, and the bond pads. Of the pins on the
ADT7408, the GND pin (VSS pin) transfers most of the heat.
Therefore, when the temperature of a heat source is being
measured, thermal resistance between the ADT7408 VSS pin and
the heat source should be reduced as much as possible.
An example of the unique properties of the ADT7408 are shown
in monitoring a high power dissipation DIMM module. Ideally,
the ADT7408 device must be mounted in the middle between
the major heat sources of the two memory chips (see Figure 19).
The ADT7408 produces a linear temperature output, while
needing only two input/output pins and requiring no external
characterization.
BOTTOM
MIDDLE
TOP
RIGHT
LEFT
To achieve the temperature accuracy specifications, local supply
bypassing consisting of a 0.1 μF ceramic capacitor is critical.
Rev. A | Page 21 of 22
SO-DIMM THERMAL SENSOR LOCATIONS
Figure 19. Locations of ADT7408 on DIMM Module
05716-014
THERMAL RESPONSE TIME
ADT7408
Data Sheet
OUTLINE DIMENSIONS
1.84
1.74
1.64
PIN 1 INDEX
AREA
SIDE VIEW
0.30
0.25
0.20
1
4
BOTTOM VIEW
TOP VIEW
SEATING
PLANE
1.55
1.45
1.35
EXPOSED
PAD
0.50
0.40
0.30
0.80
0.75
0.70
0.50 BSC
8
5
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.203 REF
PIN 1
INDICATOR
(R 0.15)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-229-WEED-4
05-11-2016-A
3.10
3.00 SQ
2.90
Figure 20. 8-Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
(CP-8-13)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADT7408CCPZ-REEL7
1
2
Temperature Range
−20°C to +125°C
Temperature Accuracy2
±2°C
Package Description
8-Lead LFCSP
Z = RoHS Compliant Part.
Temperature accuracy is over the 75°C to 95°C temperature range.
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
© 2006–2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05716-0-6/16(A)
Rev. A | Page 22 of 22
Package
Option
CP-8-13
Ordering
Quantity
1500
Branding
T1M
Similar pages