LINER LTC1756EGN Smart card interface Datasheet

LTC1755/LTC1756
Smart Card Interface
U
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
■
DESCRIPTIO
The LTC®1755/LTC1756 universal Smart Card interfaces
are fully compliant with ISO 7816-3 and EMV specifications. The parts provide the smallest and simplest interface circuits between a host microcontroller and general
purpose Smart Cards.
Fully ISO 7816-3 and EMV Compliant
(Including Auxiliary I/O Pins)
Buck-Boost Charge Pump Generates 3V or 5V
2.7V to 6.0V Input Voltage Range (LTC1755)
Very Low Operating Current: 60µA
> 10kV ESD on All Smart Card Pins
Dynamic Pull-Ups Deliver Fast Signal Rise Times
Soft-Start Limits Inrush Current at Turn On
3V ↔ 5V Signal Level Translators
Shutdown Current: < 1µA
Short-Circuit and Overtemperature Protected
Alarm Output Indicates Fault Condition
Multiple Devices May Be Paralleled for
Multicard Applications (LTC1755)
Available in 16- and 24-Pin SSOP Packages
An internal charge pump DC/DC converter delivers regulated 3V or 5V to the Smart Card, while on-chip level
shifters allow connection to a low voltage controller. All
Smart Card contacts are rated for 10kV ESD, eliminating
the need for external ESD protection devices.
Input voltage may range from 2.7V to 6.0V, allowing direct
connection to a battery. Internal soft-start mitigates startup problems that may result when the input power is
provided by another regulator. Multiple devices may be
paralleled and connected to a single controller for multicard
applications.
U
APPLICATIO S
■
■
■
■
Battery life is maximized by 60µA operating current and
1µA shutdown current. The narrow SSOP packages minimize PCB area for compact portable systems.
Handheld Payment Terminals
Pay Telephones
ATMs
Key Chain Readers
Smart Card Readers
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
■
TYPICAL APPLICATIO
3.3V
SMART CARD
PRESENT SWITCH
1
2
3
4
C3
10µF
GND
VCC
AUX1
SMART CARD
AUX2
I/O
RST
CLK
C2
10µF
5
6
7
8
9
10
11
12
PRES
5V/3V
PWR
CARD
CS
ALARM
NC/NO
READY
GND
DVCC
VIN LTC1755 C –
VCC
C+
AUX1
AUX1IN
AUX2
AUX2IN
I/O
DATA
RST
RIN
CLK
CIN
24
23
22
21
20
19
18
C1
0.68µF
µCONTROLLER
17
16
15
14
13
17556 TA01
1
LTC1755/LTC1756
W W
W
AXI U
U
ABSOLUTE
RATI GS
(Note 1)
VIN to GND (LTC1755) ............................. – 0.3V to 6.5V
VIN to GND (LTC1756) ............................. – 0.3V to 6.0V
DVCC to GND (LTC1755) .......................... – 0.3V to 5.5V
VCC to GND .............................................. – 0.3V to 5.5V
Digital Inputs to GND
(LTC1755) .............................. – 0.3V to DVCC + 0.3V
Digital Inputs to GND
(LTC1756) ................................. – 0.3V to VIN + 0.3V
CLK, RST, I/O, AUX1,
AUX2 to GND .............................. – 0.3V to VCC + 0.3V
VCC Short-Circuit Duration ............................... Indefinite
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
U
U
W
PACKAGE/ORDER I FOR ATIO
TOP VIEW
PRES
1
24 5V/3V
PWR
2
23 CARD
TOP VIEW
LTC1755EGN
CS
3
22 ALARM
PRES
1
16 5V/3V
NC/NO
4
21 READY
PWR
2
15 CARD
GND
5
20 DVCC
GND
3
14 READY
VIN
6
19 C –
VIN
4
13 C –
C+
VCC
7
18
VCC
5
12 C +
AUX1
8
17 AUX1IN
I/O
6
11 DATA
AUX2
9
16 AUX2IN
RST
7
10 RIN
15 DATA
CLK
8
9
I/O 10
RST 11
14 RIN
CLK 12
13 CIN
GN PACKAGE
24-LEAD NARROW PLASTIC SSOP
TJMAX = 125°C, θJA = 150°C/W
Consult factory for Industrial and Military grade parts.
2
ORDER PART
NUMBER
ORDER PART
NUMBER
CIN
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
TJMAX = 125°C, θJA = 135°C/W
LTC1756EGN
PART MARKING
1756
LTC1755/LTC1756
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full specified
temperature range, otherwise specificatons are at TA = 25°C.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
LTC1755 (VIN = 2.7V to 6V, DVCC = 2V to 5.5V, unless otherwise noted)
VIN Operating Voltage
DVCC Operating Voltage
●
2.7
●
2.0
6
V
5.5
V
IVIN Operating Current
ACTIVE State, IVCC = 0
●
50
100
µA
IDVCC Operating Current
ACTIVE State, DVCC = 3V
●
10
20
µA
IVIN Shutdown Current
IDLE State, DVCC = 0V, VIN ≤ 3.6V
IDLE State, DVCC = 0V, 3.6V < VIN ≤ 6V
IDLE State, DVCC = 5.5V, VIN ≤ 6V
●
●
●
1
10
20
µA
µA
µA
VCC Output Voltage
5V/3V = DVCC
5V/3V = 0V
●
●
4.75
2.80
5.25
3.20
V
V
IVCC Output Current
5V/3V = 0V
5V/3V = DVCC
3V ≤ VIN ≤ 6.0V
3V ≤ VIN ≤ 6.0V
●
●
55
65
mA
mA
5V/3V = 0V
5V/3V = DVCC
2.7V ≤ VIN ≤ 6.0V
2.7V ≤ VIN ≤ 6.0V
●
●
55
40
mA
mA
VCC Turn-On Time
COUT = 10µF,
PWR to
READY, 50% to 50%
VCC Discharge Time to 0.4V
IVCC = 0mA, VCC = 5V, COUT = 10µF
5.00
3.00
●
2.7
12
ms
●
100
250
µs
5.5
V
LTC1756 (VIN = 2.7V to 5.5V, unless otherwise noted)
VIN Operating Voltage
●
2.7
µA
2.5
10
µA
µA
5.25
3.20
V
V
ACTIVE State, IVCC = 0
●
IVIN Shutdown Current
IDLE State, VIN ≤ 3.6V
IDLE State, 3.6V < VIN ≤ 5.5V
●
●
VCC Output Voltage
5V/3V = VIN
5V/3V = 0V
●
●
4.75
2.80
IVCC Output Current
5V/3V = 0V
5V/3V = VIN
3V ≤ VIN ≤ 5.5V
3V ≤ VIN ≤ 5.5V
●
●
55
65
mA
mA
5V/3V = 0V
5V/3V = VIN
2.7V ≤ VIN ≤ 5.5V
2.7V ≤ VIN ≤ 5.5V
●
●
55
40
mA
mA
VCC Turn-On Time
COUT = 10µF,
PWR to
READY, 50% to 50%
VCC Discharge Time to 0.4V
IVCC = 0mA, VCC = 5V, COUT = 10µF
75
150
IVIN Operating Current
5.00
3.00
●
2.7
12
ms
●
100
250
µs
3
LTC1755/LTC1756
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full specified
temperature range, otherwise specificatons are at TA = 25°C. DVCC = 2V to 5.5V, unless otherwise noted (Note 4).
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Controller Inputs/Outputs DATA, AUX1IN, AUX2IN, DVCC = 3V
High Input Voltage Threshold (VIH)
(Note 4)
●
DVCC – 0.6 0.5 • DVCC
Low Input Voltage Threshold (VIL)
(Note 4)
●
0.5 • DVCC
High Level Output Voltage (VOH)
Source Current = 20µA (Note 4)
●
Low Level Output Voltage (VOL)
Sink Current = – 500µA (Note 3)
●
Output Rise/Fall Time
Loaded with 30pF, 10% to 90%
●
Input Current (IIH/IIL)
CS = DVCC
●
High Input Voltage Threshold (VIH)
(Note 4)
●
Low Input Voltage Threshold (VIL)
(Note 4)
●
V
0.3
V
0.7 • DVCC
V
0.3
–1
V
0.5
µs
1
µA
RIN, CIN, PWR, CS, 5V/3V, NC/NO
Input Current (IIH/IIL)
0.7 • DVCC 0.5 • DVCC
V
0.5 • DVCC 0.2 • DVCC
●
–1
●
250
V
µA
1
READY, ALARM, CARD
Pull-Up Current (IOH)
Low Level Output Voltage (VOL)
Sink Current = – 20µA
nA
0.3
●
V
Smart Card Inputs/Outputs I/O, AUX1, AUX2, VCC = 3V or 5V
High Input Voltage Threshold (VIH)
IIH(MAX) = ±20µA
●
Low Input Voltage Threshold (VIL)
IIL(MAX) = 1mA
●
High Level Output Voltage (VOH)
Source Current = 20µA
DATA, AUX1IN, AUX2IN = DVCC
●
Low Level Output Voltage (VOL)
Sink Current = – 1mA
DATA, AUX1IN, AUX2IN = 0V (Note 3)
●
Rise/ Fall Time
Loaded with 30pF, 10% to 90%
●
Short-Circuit Current
Shorted to VCC
●
High Level Output Voltage (VOH)
Source Current = 100µA
●
Low Level Output Voltage (VOL)
Sink Current = – 200µA
●
0.3
V
CLK Rise/Fall Time
CLK Loaded with 30pF
●
16
ns
CLK Frequency
CLK Loaded with 30pF
●
5
High Level Output Voltage (VOH)
Source Current = 200µA
Source Current = 50µA
●
●
0.8 • VCC
VCC – 0.5V
Low Level Output Voltage (VOL)
Sink Current = – 200µA
●
0.3
V
RST Rise/Fall Time
Loaded with 30pF, 10% to 90%
●
0.5
µs
High Input Voltage Threshold (VIH)
(Note 4)
●
Low Input Voltage Threshold (VIL)
(Note 4)
●
PRES Pull-Up Current
VPRES = 0V
●
0.5
1
µA
PRES Debounce Time
Proportional to the 0.68µF Charge Pump Capacitor
●
40
80
ms
0.6 • VCC
0.5 • VCC
0.5 • VCC
V
0.8
V
0.8 • VCC
V
0.3
3.5
V
0.5
µs
7.5
mA
CLK
VCC – 0.5
V
MHz
RST
V
V
PRES
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC1755/LTC1756 are guaranteed to meet performance
specifications from 0°C to 70°C. Specifications over the – 40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
4
0.7 • DVCC 0.5 • DVCC
0.5 • DVCC 0.2 • DVCC
Note 3: The DATA, AUX1IN, AUX2IN, AUX1, AUX2 and I/O pull-down
drivers must sink up to 250µA sourced by the internal current sources.
Note 4: On the LTC1756, DVCC is internally connected to the VIN pin.
Specifications that call out DVCC should be referred to VIN instead.
V
V
LTC1755/LTC1756
U W
TYPICAL PERFOR A CE CHARACTERISTICS
100
150
IL = 35mA
TA = 25°C
I/O, AUX1, AUX2 Short-Circuit
Current vs Temperature
I/O, AUX1, AUX2 SHORT-CIRCIUT CURRENT (mA)
Card Detection Debounce Period
vs Temperature
Power Efficiency vs Input Voltage
CFLY = 0.68µF
125
DEBOUNCE DELAY (ms)
EFFICIENCY (%)
75
VCC = 3V
50
VCC = 5V
25
100
VIN = 6V
75
VIN = 3.3V
VIN = 2.7V
50
25
0
3
0
–50
6
4
5
VIN INPUT VOLTAGE (V)
0
25
50
TEMPERATURE (°C)
–25
17556 G01
12
DVCC = 5.5V
4
–25
DVCC = 2V
0
25
50
TEMPERATURE (°C)
75
VPRES = 0V
TA = 25°C
8
6
4
4
3
DVCC INPUT VOLTAGE (V)
2
17556 G04
OSCILLATOR FREQUENCY (kHz)
VIN = 3.3V
VIN = 2.7V
700
600
–25
0
25
50
TEMPERATURE (°C)
75
100
17556 G07
TA = 25°C
TA = 85°C
20
15
5
5
1
2
6
3
4
5
DVCC INPUT VOLTAGE (V)
VIN Supply Current
vs Temperature
70
1000
TA = 85°C
900
TA = 25°C
800
TA = – 40°C
700
7
17556 G02
1100
800
500
–50
TA = –40°C
25
Oscillator Frequency
vs Input Voltage
1100
900
VPRES = 0V
17556 G05
Oscillator Frequency
vs Temperature
100
10
0
100
VIN = 5V
75
30
2
1000
0
25
50
TEMPERATURE (°C)
–25
DVCC Input Current vs DVCC Voltage
SUPPLY CURRENT (µA)
0
–50
3.3
–50
35
INPUT CURRENT (µA)
PULL-UP CURRENT (µA)
6
DVCC = 3V
3.4
17556 G03
10
8
2
3.5
PRES Pin Pull-Up Current vs DVCC
10
PULL-UP CURRENT (µA)
100
VCC = 5V
VIN = 3V
17556 G02
CARD, READY, ALARM Pull-Up
Current vs Temperature
OSCILLATOR FREQUENCY (kHz)
75
3.6
VIN = 3.3V
ICC = 0
60
50
600
500
2.5
3.0
5.0
3.5
4.0
4.5
VIN INPUT VOLTAGE (V)
5.5
17556 G07
40
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
17556 G09
5
LTC1755/LTC1756
U W
TYPICAL PERFOR A CE CHARACTERISTICS
DVCC, VIN Supply Current
In Shutdown
9.0
VIN Shutdown Current
vs Input Voltage
1.0
VIN = 3V
TA = 25°C
6.0
4.5
DVCC
3.0
VIN
0
1
5
3
4
DVCC INPUT VOLTAGE (V)
2
6
17556 G10
U
U
U
PI FU CTIO S
0.6
0.4
0.2
1.5
0
DVCC = 0
TA = 25°C
0.8
INPUT CURRENT (µA)
INPUT CURRENT (µA)
7.5
0
0
1
2
3
4
INPUT VOLTAGE (V)
5
6
17556 G11
LTC1755/LTC1756
PRES (Pin 1): (Input) Connects to the Smart Card acceptor’s
PRESENT indicator switch to detect if a card is inserted.
This pin has a pull-up current source so that a grounded
switch can be detected with no external components. The
pull-up current source is nonlinear, delivering higher
current when the PRES pin is above 1V but very little
current below 1V. This helps resist false card indications
due to leakage current. The activation state of the PRES pin
can be set by the NC/NO pin so that both normally open
(NO) and normally closed (NC) switches are easily recognized (see NC/NO pin description).
CS (Pin 3, LTC1755 Only): (Input) The CS pin enables the
three bidirectional I/O channels of the LTC1755. When the
I/O channels are disabled the Smart Card pins (I/O, AUX1,
AUX2) are forced to logic one and the controller pins
(DATA, AUX2IN, AUX1IN) are high impedance. CS can be
brought low along with PWR when the device is first
enabled, however communication with the Smart Card is
inhibited until VCC reaches its final value as indicated by a
low on the READY pin. CS does not affect the charge
pump, CLK or RST channels. On the LTC1756, CS is
internally connected to the PWR pin.
DVCC sets the logic reference level for the PRES pin.
DVCC sets the logic reference level for the CS pin.
PWR (Pin 2): (Input) A low on the PWR pin places the
LTC1755/LTC1756 in the ACTIVE state enabling the charge
pump. The READY pin indicates when the card supply
voltage (VCC) has reached its final value and communication with the Smart Card is possible. The reset and clock
channels are enabled after READY goes low. The three I/
O channels are also enabled only after READY goes low,
however they may be disabled separately via the CS pin
(CS is not available on the LTC1756).
NC/NO (Pin 4, LTC1755 Only): (Input) This pin controls
the activation level of the PRES pin. When it is high (DVCC)
the PRES pin is active high. When it is low (GND) the PRES
pin is active low. In either case the presence of a Smart
Card is indicated by a low on the CARD output. When a
ground side normally open (NO) switch is used the NC/NO
pin should be grounded. When a ground side normally
closed (NC) switch is used the NC/NO pin should be
connected to DVCC. The LTC1756 is permanently configured to accept a normally open switch.
The falling edge of PWR latches the state of the 5V/3V pin.
After PWR is low, changes on the 5V/3V pin are ignored.
6
LTC1755/LTC1756
U
U
U
PI FU CTIO S
LTC1755/LTC1756
Note: If a normally closed switch is used, a small current
(several microamperes) will flow through the switch whenever a Smart Card is not present. For ultralow power
consumption in shutdown, a normally open switch is
optimum.
DVCC sets the logic reference level for the NC/NO pin.
GND (Pins 5/3): Ground Reference for the IC. This pin
should be connected to a low impedance ground plane.
Bypass capacitors for VIN and VCC should be in close
proximity to the GND pin.
VIN (Pins 6/4): Supply Voltage for the Charge Pump. May
be between 2.7V and 6V. A 10µF low ESR ceramic bypass
capacitor is required on this pin for optimum performance.
VCC (Pins 7/5): Regulated Smart Card Supply Voltage.
This pin should be connected to the Smart Card VCC
contact. The 5V/3V pin determines the VCC output voltage.
The VCC pin is protected against short circuits by comparing the actual output voltage with an internal reference
voltage. If VCC is below its correct level (for as little as 5µs)
the LTC1755/LTC1756 switch to the Alarm state (see the
State Diagram). The VCC pin requires a 10µF charge
storage capacitor to ground. For optimum performance a
low ESR ceramic capacitor should be used.
During the Idle and Alarm states the VCC pin is rapidly
discharged to ground to comply with the deactivation
requirements of the EMV and ISO-7816 specifications.
AUX1 (Pin 8, LTC1755 Only): (Input/Output) Smart Card
Side Auxiliary I/O Pin. This pin is used for auxiliary
bidirectional data transfer between the microcontroller
and the Smart Card. It has the same characteristics as the
I/O pin.
AUX2 (Pin 9, LTC1755 Only): (Input/Output) Smart Card
Side Auxiliary I/O Pin. This pin is used for auxiliary
bidirectional data transfer between the microcontroller
and the Smart Card. It has the same characteristics as the
I/O pin.
I/O (Pins 10/6): (Input/Output) Smart Card Side Data I/O
Pin. This pin is used for bidirectional data transfer between
the microcontroller and the Smart Card. It should be connected to the Smart Card I/O contact. The Smart Card I/O
pin must be able to sink up to 250µA when driving the I/O
pin low due to the pull-up current source. The I/O pin becomes a low impedance to ground during the Idle state. It
does not become active until READY goes low indicating
that VCC is stable.
Once READY is low the I/O pin is protected against short
circuits to VCC by current limiting to 5mA maximum.
The DATA-I/O channel is bidirectional for half-duplex
transmissions. Its idle state is H-H. Once an L is detected
on one side of the channel the direction of transmission is
established. Specifically, the side which received an L first
is now the input, and the opposite side is the output.
Transmission from the output side back to the input side
is inhibited, thereby preventing a latch condition. Once the
input side releases its L, both sides return to H, and the
channel is now ready for a new L to be transmitted in either
direction. If an L is forced externally on the output side, and
it persists until after the L on the input side is released, this
illegal input will not be transmitted to the input side
because the transmission direction will not have changed.
The direction of transmission can only be established from
the idle (H-H) state and is determined by the first receipt
of an L on either side.
RST (Pins 11/7): (Output) Level-Shifted Reset Output Pin.
This pin should be connected to the Smart Card RST
contact. The RST pin becomes a low impedance to ground
during the Idle state (see the State Diagram). The reset
channel does not become active until the READY signal
goes low indicating that VCC is stable.
Short-circuit protection is provided on the RST pin by
comparing RST with RIN. If these signals differ for several
microseconds then the LTC1755/LTC1756 switch to the
Alarm state. This fault checking is only performed after the
VCC pin has reached its final value (as indicated by the
READY pin).
CLK (Pins 12/8): (Output) Level-Shifted Clock Output Pin.
This pin should be connected to the Smart Card CLK
contact. The CLK pin becomes a low impedance to ground
during the Idle state (see the State Diagram). The clock
channel does not become active until the READY signal
goes low indicating that VCC is stable.
Short-circuit protection is provided on the CLK pin by
comparing CLK with CIN. If these signals differ for several
7
LTC1755/LTC1756
U
U
U
PI FU CTIO S
LTC1755/LTC1756
microseconds then the LTC1755/LTC1756 switch to the
Alarm state. This fault checking is only performed after the
VCC pin has reached its final value (as indicated by the
READY pin).
The clock channel is optimized for signal integrity in order
to meet the stringent duty cycle requirements of the EMV
specification. Therefore, to reduce power in low power
applications, clock stop mode is recommended when data
is not being exchanged.
CIN (Pins 13/9): (Input) Clock Input Pin from the Microcontroller. During the Active state this signal appears on
the CLK pin after being level-shifted and buffered.
DVCC sets the logic reference level for the CIN pin.
DVCC (Pin 20, LTC1755 Only): Supply Voltage for the
Microcontroller Side Digital Input and Input/Output Pins
(Typically 3V). If the charge pump input pin (VIN) is
powered from the same source as the microcontroller,
then DVCC should be connected directly to VIN. In this case
only one (10µF) input bypass capacitor is needed for the
LTC1755. If the DVCC pin is powered separately then it
should be bypassed separately with a 0.1µF capacitor. The
DVCC pin may be between 2V and 5.5V.
The DVCC pin is monitored for adequate voltage. If DVCC
drops below approximately 1.5V the LTC1755 automatically enters the Idle state. On the LTC1756, DVCC is
connected internally to VIN.
DVCC sets the logic reference level for the RIN pin.
READY (Pins 21/14): (Output) Readiness Indicator of the
Smart Card Supply Voltage (VCC). When the LTC1755/
LTC1756 are placed in the Active state the soft-start
feature slowly ramps the VCC voltage. A low on the READY
pin indicates that VCC has reached its final value.
DATA (Pins 15/11): (Input/Output) Microcontroller Side
Data I/O Pin. This pin is used for bidirectional data transfer
between the microcontroller and the Smart Card. The
microcontroller data pin must be open drain and must be
able to sink up to 250µA when driving the DATA pin low
due to the pull-up current source. The DATA pin becomes
high impedance during the Idle state or when CS is high
(see the State Diagram). It does not become active until the
READY signal goes low indicating that VCC is stable.
The READY pin also indicates if the LTC1756 is in Alarm
mode. The LTC1756 detects faults such as VCC underrange
for at least 5µs, overtemperature shutdown, CLK or RST
invalid output levels and card removal during Active
state. CLK or RST invalid and overtemperature faults are
detected only after VCC has reached its final value. VCC
underrange and card removal during Active faults are
detected at any time during the Active period (i.e., once
PWR = 0V).
AUX2IN (Pin 16, LTC1755 Only): (Input/Output) Microcontroller Side Auxiliary I/O pin. This pin is used for
bidirectional auxiliary data transfer between the microcontroller and the Smart Card. It has the same characteristics as the DATA pin.
If the LTC1756 has been activated normally and VCC, the
card voltage, has reached its final value then READY will
go low indicating normal operation. If, following this, a
fault occurs and the LTC1756 enters the Alarm state, the
READY pin will return high.
AUX1IN (Pin 17, LTC1755 Only): (Input/Output) Microcontroller Side Auxiliary I/O Pin. This pin is used for
bidirectional auxiliary data transfer between the microcontroller and the Smart Card. It has the same characteristics as the DATA pin.
In the event that a fault precedes the activation of VCC,
such as a direct short circuit from VCC to GND, the
LTC1756 will attempt to operate until the fault is detected
and then automatically shut down and enter the Alarm
state. In this case the READY pin will never go low after the
command to start the smart card is given (i.e., PWR = 0V).
RIN (Pins 14/10): (Input) Reset Input Pin from the Microcontroller. During the Active state this signal appears on
the RST pin after being level-shifted and buffered.
C +, C – (Pins 18/12, 19/13): Charge Pump Flying Capacitor Terminals. Optimum values for the flying capacitor
range from 0.68µF to 1µF. Best performance is achieved
with a low ESR X7R ceramic capacitor.
8
If the LTC1755/LTC1756 enter the Alarm state they can
only be cleared by returning the PWR pin high.
LTC1755/LTC1756
U
U
U
PI FU CTIO S
LTC1755/LTC1756
The READY pin is configured as an open-drain pull-down
with a weak pull-up current source. This permits wiredOR connections of multiple LTC1755/LTC1756s to a
single microcontroller.
ALARM (Pin 22, LTC1755 Only): (Output) A low on this
pin indicates that a fault has occurred and that the LTC1755
is in the Alarm state (see the State Diagram). Possible
faults include VCC underrange for at least 5µs, overtemperature shutdown, CLK or RST invalid output levels, and
card removal during the Active state.
CLK or RST invalid and overtemperature faults are detected only after VCC has reached its final value (as
indicated by the READY pin). VCC underrange and card
removal during Active faults are detected at any time
during the Active period (i.e., once PWR = 0V).
The ALARM pin is configured as an open-drain pull-down
with a weak pull-up current source. This permits wiredOR connections of multiple LTC1755s to a single microcontroller.
CARD (Pin 23/15): (Output) Level-Shifted and Debounced
PRES Signal from the Smart Card Acceptor Switch. When
a valid card indication appears, this pin communicates the
presence of the Smart Card to the microcontroller. The
CARD pin has an open-drain active pull-down with a weak
pull-up current source for logic-OR connections. The
debounce circuit ensures that a card has been present for
a continuous period of at least 40ms before asserting
CARD low. The CARD pin returns high within 50µs of card
removal. The PRES pin, in conjunction with the NC/NO pin,
determines if a card is present.
5V/3V (Pin 24/16): (Input) Controls the output voltage
(VCC) of the DC/DC converter during the Active state. A
valid high sets VCC to 5V. A valid low sets VCC to 3V. The
5V/3V pin is latched on the falling edge of the PWR pin.
When PWR is low, changes on the 5V/3V pin are ignored.
To change the voltage on VCC the LTC1755/LTC1756 must
first be returned to the Idle state by bringing the PWR pin
high.
DVCC sets the logic reference level for the 5V/3V pin.
9
LTC1755/LTC1756
W
BLOCK DIAGRA
DVCC
PRES
5V/3V
τ
PWR
CARD
CS
(LTC1755 ONLY)
ALARM
(LTC1755 ONLY)
NC/NO
(LTC1755 ONLY)
READY
DC/DC CONVERTER
AND
CONTROL LOGIC
GND
DVCC
(LTC1755 ONLY,
CONNECTED INTERNALLY
TO VIN ON LTC1756)
VIN
C–
VCC
C+
*
*
AUX1
(LTC1755 ONLY)
AUX1IN
(LTC1755 ONLY)
*
*
AUX2
(LTC1755 ONLY)
AUX2IN
(LTC1755 ONLY)
*
*
I/O
DATA
RST
RIN
CLK
CIN
*DYNAMIC PULL-UP CURRENT SOURCE
10
17556 BD
LTC1755/LTC1756
U
W
U U
APPLICATIO S I FOR ATIO
10kV ESD Protection
All Smart Card pins (CLK, RST, I/O, AUX1, AUX2, VCC and
GND) can withstand over 10kV of human body model ESD
in situ. In order to ensure proper ESD protection, careful
board layout is required. The GND pin should be tied
directly to a ground plane. The VCC capacitor should be
located very close to the VCC pin and tied immediately to
the ground plane.
Capacitor Selection
The style and value of capacitors used with the LTC1755/
LTC1756 determine several parameters such as output
ripple voltage, charge pump strength, Smart Card switch
debounce time and VCC discharge rate.
Due to the switching nature of a capacitive charge pump,
low equivalent series resistance (ESR) capacitors are
recommended for the capacitors at VIN and VCC. Whenever the flying capacitor is switched to the VCC charge
storage capacitor, considerable current flows. The product of this high current and the ESR of the output capacitor
can generate substantial voltage spikes on the VCC output.
These spikes may cause problems with the Smart Card or
may interfere with the regulation loop of the LTC1755/
LTC1756. Therefore, ceramic or tantalum capacitors are
recommended rather than higher ESR aluminum capacitors. Between ceramic and tantalum, ceramic capacitors
generally have the lowest ESR. Some manufacturers have
developed low ESR tantalum capacitors but they can be
expensive and may still have higher ESR than ceramic
types. Thus, while they cannot be avoided, ESR spikes will
typically be lowest when using ceramic capacitors.
For ceramic capacitors there are several different materials available to choose from. The choice of ceramic
material is generally based on factors such as available
capacitance, case size, voltage rating, electrical performance and cost. For example, capacitors made of Y5V
material have high packing density, which provides high
capacitance for a given case size. However, Y5V capacitors tend to lose considerable capacitance over the – 40°C
to 85°C temperature range. X7R ceramic capacitors are
more stable over temperature but don’t provide the high
packing density. Therefore, large capacitance values are
generally not available in X7R ceramic.
The value and style of the flying capacitor are important
not only for the charge pump but also because they
provide the large debounce time for the Smart Card
detection channel. A 0.68µF X7R capacitor is a good
choice for the flying capacitor because it provides fairly
constant capacitance over temperature and its value is not
prohibitively large.
The charge storage capacitor on the VCC pin determines
the ripple voltage magnitude and the discharge time of the
Smart Card voltage. To minimize ripple, generally, a large
value is needed. However, to meet the VCC discharge rate
specification, the value should not exceed 20µF. A 10µF
capacitor can be used but the ripple magnitude will be
higher leading to worse apparent DC load regulation.
Typically a 15µF to 18µF Y5V ceramic capacitor is the best
choice for the VCC charge storage capacitor. For best
performance, this capacitor should be connected as close
as possible to the VCC and GND pins. Note that most of the
electrostatic discharge (ESD) current on the Smart Card
pins is absorbed by this capacitor.
The bypass capacitor at VIN is also important. Large dips
on the input supply due to ESR may cause problems with
the internal circuitry of the LTC1755/LTC1756. A good
choice for the input bypass capacitor is a 10µF Y5V style
ceramic
Dynamic Pull-Up Current Sources
The current sources on the bidirectional pins (DATA,
AUX2IN, AUX1IN, I/O, AUX2 and AUX1) are dynamically
activated to achieve a fast rise time with a relatively small
static current (Figure 1). Once a bidirectional pin is relinquished, a small start-up current begins to charge the
node. An edge rate detector determines if the pin is
VCC OR DVCC
+
VREF
ISTART
–
δV
δt
17556 F01
BIDIRECTIONAL PIN
Figure 1. Dynamic Pull-Up Current Sources
11
LTC1755/LTC1756
U
W
U U
APPLICATIO S I FOR ATIO
released by comparing its slew rate with an internal
reference value. If a valid transition is detected, a large
pull-up current enhances the edge rate on the node. The
higher slew rate corroborates the decision to charge the
node thereby effecting a dynamic form of hysteresis. Once
the node has reached the power supply voltage the internal
comparator requires several hundred nanoseconds to
reset. Pulling down on the pin before the reset delay
expires will result in a momentary contention and a higher
current flow. Therefore, the comparator delay sets the
upper limit on the maximum data rate of the bidirectional
channels to about 500kHz.
The dynamic pull-up current sources are designed to
trigger with as much as 50pF of capacitive load on the
bidirectional pins. At approximately 90pF (or greater), the
edge rate on the node will be insufficient to trigger the edge
rate detector and the node will only ramp up at a rate given
by the ISTART current source and the load capacitance. In
these instances the edge rate of the bidirectional pin may
not meet the requirements of existing smart card standards. Therefore, it is recommended that the sum of both
explicit and parasitic capacitances on the bidirectional
pins be kept below 50pF.
If excessive capacitance (either explicit or parasitic) is
present on the bidirectional pins, the starting pull-up
current must also be increased. This can be accomplished
with a pull-up resistor to the respective supply. For the
smart card side (I/O, AUX1 and AUX2), the pull-up resistor should be connected to VCC. For the microcontroller
side (DATA, AUX1IN and AUX2IN), the pull-up resistor
should be connected to DVCC on the LTC1755 (VIN on the
LTC1756). To maintain an edge rate of approximately
5V/µs, the following expression for RPULL-UP should be
applied:
RPULL−UP =
VSUPPLY – 1V
(CPAR – 50pF)(5 • 106 )
where CPAR is the extra capacitance on the bidirectional
pin and VSUPPLY is the minimum local supply for the
bidirectional pin. For example, on the smart card side, 3V
should be assumed for VSUPPLY.
Note that the addition of a pull-up resistor will give a higher
output voltage when the bidirectional pin pulls down. Care
should be taken so that the VIL or VOL specifications are not
compromised with this technique.
Bidirectional Channels
As described in Pin Functions (Pins 10/6), the bidirectional channels allow transmission in only one direction at
a time. Figure 2 shows a simplified block diagram of one
of the three bidirectional channels. The three channels
operate in an identical fashion.
Figure 3 shows an example of normal transmit and receive
operations as well as the two possible collision scenarios.
If a channel is activated from one direction and an L is
imposed in the other direction before both sides return H
a collision results. The result of the collision is that the
receiving side (Slave Side) will remain low until it is
released, but the transmitting side (first side to go low or
Master Side), will be allowed to return high if released. The
colliding L externally imposed on the slave side will not be
transmitted back through the channel.
CS
READY
CHARGE
PUMP
VCC
DVCC
DATA
TO
MICROCONTROLLER
I/O
BIDIRECTIONAL
LATCH
TO
SMART CARD
3.5mA
17756 F02
Figure 2. Bidirectional Channel Simplified Block Diagram
12
LTC1755/LTC1756
U
W
U U
APPLICATIO S I FOR ATIO
I2CTM Compatibility
Some smart cards still require I2C compatibility. In the I2C
format it is permissible to impose an L before the signal
line has returned H. This is used, for example, as an
acknowledge signal. Such a scenario will cause a collision
as shown in Figure 3.
Figure 4 shows an analog level translation technique that
can be used along with the LTC1755 to support I2C smart
cards. In this technique it is important to connect the gate
of the external MOSFET to the lower of the two supplies
(i.e., the lower of VCC or DVCC). If DVCC is operating from
a fixed 5V supply, the gate of MN1 should be connected to
VCC. If DVCC is operating from a regulated 3.3V supply, the
gate of MN1 should be connected to DVCC. In the latter
case, the gate may need to be connected to a digital signal
ranging from 0V to DVCC so that it can be disabled when
the LTC1755 is in shutdown. Otherwise, the the LTC1755
will try to assert an L on the microcontroller side of the
channel when it is in shutdown.
less than 10µA. If DVCC is 0V the current drops below 1µA.
When a Smart Card is present the LTC1755/LTC1756
operate with a quiescent current of only 60µA, thus the
majority of power is consumed by charge pump losses
and the card itself. If the card can be made to consume less
power during idle times a significant power savings will be
achieved. Whenever possible Clock Stop Mode should be
used (or alternatively a very low “idling” clock speed).
Furthermore, in the Active state, the bidirectional pins
should all be relinquished whenever possible since there
is some static current flow when a bidirectional pin is
pulled down.
I2C is a trademark of Philips Electronics N.V.
5V
POWER
VCC
TO
SMART CARD
I/O
TO
MICROCONTROLLER
LTC1755
R1
20k
*
MN1
DATA
17556 F04
2N7002T1 (MOTOROLA)
TN2460T (TEMIC/SILICONIX)
Supporting Synchronous and Asyncronous Cards
In synchronous/asynchronous applications it is necessary to switch the CLK pin of the card socket from a free
running asynchronous clock to a controlled syncronous
clock. To avoid glitches and pulses shorter than the
minimum allowed pulse width, the circuit shown in Figure
5 should be used as a clock selection circuit. Note that for
this circuit to be effective the SYNC input should be held
constant while switching the ASYNC\SYNC control signal.
DVCC
*CONNECT GATE TO VCC FOR DVCC = 5V APPLICATIONS
CONNECT GATE TO DVCC OR DVCC LOGIC LEVEL SIGNAL
FOR DVCC ≤ 3.3V APPLICATONS
Figure 4. I2C Level Translation Technique
ASYNC SYNC
D
Q
Q
D
Q
Q
ASYNC IN
SYNC IN
TO CIN
Low Power Operation
17556 F05
The LTC1755/LTC1756 are inherently low power devices.
When there is no Smart Card present the supply current is
Figure 5. Glitchless Clock Selection Circuit
DATA
I/O
NORMAL
TRANSMIT
NORMAL
RECEIVE
I/O PULLED LOW DURING
TRANSMIT MODE (COLLISION)
DATA PULLED LOW DURING
RECEIVE MODE (COLLISION)
17556 F03
Figure 3. Possible Bidirectional Channel Scenarios
13
LTC1755/LTC1756
U
W
U U
APPLICATIO S I FOR ATIO
Overtemperature Fault Protection
An overtemperature circuit disables the chip and activates
the ALARM pin if the IC’s junction temperature exceeds
150°C.
deactivation sequence. Once PWR is brought high the builtin deactivation sequence occurs as shown in Figure 7.
In the event of a fault, the LTC1755/LTC1756 automatically
implement the built-in deactivation sequence.
Self-Start Mode
PC Board Layout
By connecting the CARD pin to the PWR pin, the LTC1755/
LTC1756 can be made to start up automatically when a
Smart Card is detected (Figure 6). In this mode, the READY
pin becomes an interrupt signal indicating to the microcontroller that a Smart Card is present and that VCC, the
charge pump voltage, is at its final value. The Smart Card
remains powered as long as it is detected by the PRES pin.
When the Smart Card is removed the LTC1755/LTC1756
will automatically be deactivated by the fault detection
circuitry.
For best performance, the VIN and VCC capacitors should
be placed as close to the LTC1755/LTC1756 as possible.
This will help reduce ringing due to inductance on the VIN
and VCC pins that could cause problems with the LTC1755/
LTC1756 control circuitry or Smart Card. Figure 8 illustrates a possible layout technique using only a single layer
of the PC board.
Deactivation Sequence
VCC, RST, CLK, I/O AUX2, AUX1 = L
For maximum flexibility the Smart Card can be deactivated
either manually or automatically. In manual mode the deactivation is controlled by explicitly manipulating the
LTC1755/LTC1756 input and control pins (DATA, AUX1IN,
AUX2IN, RIN and CIN followed by PWR and CS). In automatic mode the PWR pin is used to perform the built-in
READY, ALARM, DATA, AUX2IN, AUX1IN = Z
CARD
State Definitions
IDLE/DEACTIVATION
CARD = PRES ⊕ NC/NO
Once the LTC1755/LTC1756 enter the Idle/Deactivation
state the deactivation sequence begins. The deactivation
sequence will continue until VCC is discharged to approximately 1V. An activation command (PWR = 0V) will only be
acknowledged once this occurs.
PWR
ALARM/DEACTIVATION
TO
MICROCONTROLLER
READY
Same as Idle/Deactivation except:
1755 F06
ALARM = L
Figure 6. Self-Start Mode
DEACTIVATION DIRECTIVE
GND
VCC
RST
RST = RIN
CLK
CLK = CIN
I/O
AUX2
AUX1
I/O = DATA
VIN
1755 F07
Figure 7. Deactivation Sequence
14
VCC
17556 F08
Figure 8. Optimum Bypass Capacitor Placement
LTC1755/LTC1756
U
W
U U
APPLICATIO S I FOR ATIO
The only possible next state is Idle/Deactivation which is
achieved by disabling the LTC1755/LTC1756 via the PWR
pin (i.e., PWR = DVCC).
The alarm indication can be cleared by rapidly cycling the
PWR pin. However, a new activation cycle will not begin
until VCC is or has dropped below approximately 1V.
FAULT TIMEOUT
Same as Active except:
The duration of a fault is being measured. If the fault
duration exceeds 5µs then the Alarm/Deactivation state
follows. If the fault duration is less than 5µs, then the
device is returned to the Active state.
ACTIVE
POWER OFF
VCC = 3V or 5V (as determined by the 5V/3V pin)
PWR = 0V
IDLE
RST = RIN, CLK = CIN
ACTIVE
PWR = DVCC
DEACTIVATION
PRES ≠ NC/NO
NO
FAULT
PWR = DVCC
I/O, AUX2, AUX1, DATA, AUX2IN, AUX1IN = Ready for
data (after READY becomes low)
ALARM
CARD = PRES ⊕ NC/NO
FAULT
TIMEOUT
FAULT > 5µs
or
PRES ≠ NC/NO
DEACTIVATION
ALARM = H
FAULT
1755 F09
Figure 9. LTC1755/LTC1756 State Diagram
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 – 0.196*
(4.801 – 4.978)
0.015 ± 0.004
× 45°
(0.38 ± 0.10)
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.009
(0.229)
REF
16 15 14 13 12 11 10 9
0.004 – 0.0098
(0.102 – 0.249)
0° – 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.229 – 0.244
(5.817 – 6.198)
0.0250
(0.635)
BSC
0.008 – 0.012
(0.203 – 0.305)
0.150 – 0.157**
(3.810 – 3.988)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
GN16 (SSOP) 1098
1
2 3
4
5 6
7
8
GN Package
24-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.337 – 0.344*
(8.560 – 8.738)
0.015 ± 0.004
× 45°
(0.38 ± 0.10)
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.004 – 0.0098
(0.102 – 0.249)
24 23 22 21 20 19 18 17 16 15 1413
0.033
(0.838)
REF
0° – 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.008 – 0.012
(0.203 – 0.305)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.0250
(0.635)
BSC
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
GN24 (SSOP) 1098
1
2 3
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
4
5 6
7
8
9 10 11 12
15
LTC1755/LTC1756
U
TYPICAL APPLICATIO
Asynchronous Smart Card Interface
3.3V
SMART CARD
PRESENT SWITCH
1
2
N.O.
3
C3
10µF
GND
VCC
I/O
C2
10µF
4
5
6
PRES
5V/3V
PWR
CARD
GND
READY
VIN
I/O
15
14
C–
13
C+
12
LTC1756
VCC
16
DATA
C1
0.68µF
µCONTROLLER
11
SMART CARD
RST
CLK
7
8
RST
RIN
CLK
CIN
10
9
17556 TA02
RELATED PARTS
PART NUMBER
LTC1514/LTC1515
LTC1516
LTC1555/LTC1556
LTC1754-5
LTC1986
16
DESCRIPTION
Micropower Step-Up/Step-Down Inductorless
DC/DC Converters
Micropower Regulated 5V Charge Pump
SIM Power Supply and Level Translator
5V Charge Pump with Shutdown in SOT-23
3V/5V SIM Power Supply in SOT-23
Linear Technology Corporation
COMMENTS
Regulated Output Up to 50mA, VIN from 2V to 10V, SO-8 Package
5V/50mA Output from 2V to 5V Input, S0-8 Package
Step-Up/Step-Down Charge Pump + Generates 3V or 5V
VIN from 2.7V to 5.5V, 50mA Output with VIN ≥ 3V
VIN from 2.6V to 4.4V, 3V/5V Output at 10mA
sn17556a 17556fs LT/LCG 0800 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1999