Ordering number : ENA1628D LV5232VH Bi-CMOS IC 16ch LED Driver http://onsemi.com Overview The LV5232VH is a semiconductor integrated circuit that incorporates a serial input and serial or parallel output 16-stage shift register that features a CMOS structure based on Bi-CMOS process technology. The LV5232VH also contains an n-channel CMOS construction high-withstand-voltage, large-current drive 16-stage parallel output driver. The protection circuit of the output malfunction is built into. Function • Serial input and serial or parallel output • Enable input for output control • Serial output enables cascade connection • Low supply current (30μA typ. during standby ICC≤40μA) • Serial input/output levels compatible with typical CMOS devices • High-withstand-voltage LED driver with open drain output High withstand voltage (VDS < 42V) High-current drive (IO max = 100mA) • Operating temperature range Ta = -25 to 75°C • Output malfunction protection circuit Reset input pin , VCC decrease voltage confirmation Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Symbol Conditions Ratings Unit VCC max SVCC 6 Output voltage VO max LEDO1 to LEDO16 off Output current IO max Allowable power dissipation Pd max Operating temperature Topr -25 to +75 °C Storage temperature Tstg -40 to +125 °C Ta ≤ 25°C * V 42 V 100 mA 1100 mW * Specified board : 114.3mm × 76.1mm × 1.6mm, glass epoxy board. Caution 1) Absolute maximum ratings represent the values which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Recommended supply voltage VCC SVCC 5.0 Operating supply voltage range VCC op SVCC 3.0 to 5.5 V Output applied voltage VO 42 V Output current IO 100 mA Duty = 45% to 55% V ORDERING INFORMATION See detailed ordering and shipping information on page 9 of this data sheet. Semiconductor Components Industries, LLC, 2013 September, 2013 90413NK 20130821-S00001/52913NK 20130514-S00002 No.A1628-1/9 LV5232VH Electrical Characteristics at Ta = 25°C, VCC = 5.0V Ratings Parameter Symbol Conditions Unit min Quiescent current drain ICC1 LEDO driver off (standby) LEDO output on resistance Ron IO = 30mA OFF leak current Ileak VO = 42V Driver output malfunction Vt typ max 30 40 2.58 μA Ω 5 0 10 μA 2.70 2.82 V prevention voltage Control circuit block H level 1 VINH1 Input H level VCC × 0.8 L level 1 VINL1 Input L level 0 H level 2 VOUTH1 SOUT IO = -1mA L level 2 VOUTL1 SOUT IO = 1mA V VCC × 0.2 VCC -0.3 0 V V 0.3 V Package Dimensions unit : mm (typ) 3222A 15.0 28 0.5 5.6 7.6 15 14 1 0.8 2.0 0.2 0.3 (1.5) 1.7max (0.7) 0.1 2.7 HSOP28(275mil) Pd max -- Ta 1.5 1.0 0.55 0.5 0 0 25 50 75 100 No.A1628-2/9 LV5232VH SGND XRESET SCK SDATAIN LEDO16 8 9 10 11 12 13 14 LEDO15 LEDO1 PGND4 LEDO2 7 15 PGND1 6 LEDO14 LEDO12 5 16 LEDO3 LEDO11 4 17 LEDO13 PGND3 3 18 LEDO4 LEDO10 2 19 Heat sink &GND LEDO9 1 20 21 Heat sink &GND LATCH LEDO5 22 LEDO6 23 PGND2 24 LEDO7 25 LEDO8 26 SOUT 27 SVCC 28 XEN Pin Assignment Top view Pin Descriptions Pin No. 1 Pin name I/O SVCC Description Power supply 2 SOUT O shift register output (final-stage shift register) 3 LEDO8 O LEDO8 Latch output (LEDO8 of shift register) 4 LEDO7 O LEDO7 Latch output (LEDO7 of shift register) 5 PGND2 6 LEDO6 O LEDO6 Latch output (LEDO6 of shift register) 7 LEDO5 O LEDO5 Latch output (LEDO5 of shift register) 8 LEDO4 O LEDO4 Latch output (LEDO4 of shift register) 9 LEDO3 O LEDO3 Latch output (LEDO3 of shift register) 10 PGND1 11 LEDO2 O LEDO2 Latch output (LEDO2 of shift register) 12 LEDO1 O LEDO1 Latch output (LEDO1 of shift register) 13 SDATAIN I Serial Input 14 XRESET I 15 SGND 16 SCK I Clock input (for shift register) 17 LEDO16 O LEDO16 Latch output (LEDO16 of shift register) 18 LEDO15 O 19 PGND4 20 LEDO14 O LEDO14 Latch output (LEDO14 of shift register) 21 LEDO13 O LEDO13 Latch output (LEDO13 of shift register) 22 LEDO12 O LEDO12 Latch output (LEDO12 of shift register) 23 LEDO11 O 24 PGND3 25 PGND10 O LEDO10 Latch output (LEDO10 of shift register) 26 PGND9 O LEDO9 Latch output (LEDO9 of shift register) 27 LATCH I GND Heat sink GND Reset input (shift register and latch) GND LEDO15 Latch output (LEDO15 of shift register) GND Heat sink LEDO11 Latch output (LEDO11 of shift register) GND Latch input When the latch input is held low, the LED0 output status is retained. When a high-level is input, the LED0 outputs change when the status of the shift register changes. 28 XEN I Enable inputs (LEDO1 to LEDO16) When a high-level is input, all the LED0 outputs are turned off. When a low-level is input, the shift register data is output to LED0. No.A1628-3/9 LV5232VH Block Diagram SCK SDATAIN LATCH XEN SVCC SVCC_protection XRESET LEDO1 D Q C Q R D Q C Q R LEDO2 D Q C Q R D Q C Q R D Q C Q R D Q C Q R LEDO3 LEDO4 LEDO13 LEDO14 D Q C Q R D Q C Q R LEDO15 D Q C Q R D Q C Q R LEDO16 D Q C Q R D Q C Q R LEDO1 LEDO2 LEDO3 LEDO4 D Q C Q R SOUT LEDO5 LEDO6 LEDO7 LEDO8 LEDO9 LEDO10 LEDO11 LEDO12 LEDO13 LEDO14 LEDO15 LEDO16 PGND3 Heat sink & GND PGND1 PGND2 SGND PGND4 No.A1628-4/9 LV5232VH Pin Functions Pin No. Pin Name 13 SDATAIN 16 SCK Pin function Equivalent Circuit Pull-down input SVCC SDATAIN/ SCK SGND 14 XRESET 27 LATCH 28 XEN Pull-up input SVCC XRESET/ LATCH/ XEN SGND 2 SOUT SOUT output SVCC SOUT SGND 3 LEDO8 4 LEDO7 6 LEDO6 7 LEDO5 8 LEDO4 9 LEDO3 11 LEDO2 12 LEDO1 17 LEDO16 18 LEDO15 20 LEDO14 21 LEDO13 22 LEDO12 23 LEDO11 25 LEDO10 26 LEDO9 LEDO outputs LEDO1/LEDO2/LEDO3/LEDO4/ LEDO5/LEDO6/LEDO7/LEDO8/ LEDO9/LEDO10/LEDO11/LEDO12/ LEDO13/LEDO14/LEDO15/LEDO16 LEDO1 to LEDO16 SVCC SGND PGND No.A1628-5/9 LV5232VH Function The LV5232VH consists of 1) an 16-stage D-type flip-flop and 2) an 16-stage D-type flip-flop connected to the output of 1). When data is supplied to the serial data input (SDATAIN) and the clock pulse is supplied to the clock input (SCK), the serial data input signal is input to the internal shift register and the data already in the shift register shifted sequentially when the clock changes from low to high. The serial output (SOUT) is used to connect multiple LV5232VH to expand the number of bits and is connected to the SDATAIN of the next stage. (Cascade connection supported.) For parallel output, when the output control enable input (XEN) is low, the latch input (LATCH) changes from low to high and the clock pulse input changes from low to high, the serial data input signal is output to LEDO1, and the output is shifted sequentially. For parallel outputs (LEDO2 to LEDO16), the signals whose polarities inverted from those of the serial data input (SDATAIN) are output. When the EN input is high, outputs LEDO1 through LEDO16 all turn off. When the reset input is low, outputs LEDO1 through LEDO16 and SOUT outputs all turn off. The power must be turned on after checking that the reset input is low. To prevent the malfunction, the output load protection circuit is built into. The output of LEDO1 to LEDO16 is compulsorily turned off when becoming below the voltage with a constant there is VCC. Timing conditions Parameter symbol Conditions min typ SCK Duty = 50% max unit Clock frequency fs1 10 Clock pulse width twck SCK 50 ns Latch pulse width twla LATCH 50 ns Data set up time ts1 SDATAIN setup time relative to the rise of SCK 25 ns Data hold time th1 SDATAIN data hold time relative to the rise of SCK 25 ns Clock latch time tla1 Input conditions 1 ton SCK and SDATAIN rise time 100 ns Input conditions 2 toff SCL and SDATAIN fall time 100 ns 100 MHz ns twck SCK 2.5V 90% 2.5V 90% 10% ts1 10% th1 ton SDATAIN 2.5V toff 2.5V twla tla1 LATCH 2.5V 2.5V No.A1628-6/9 LV5232VH SOUT output timings Parameter symbol Conditions min typ max unit SOUT delay time 1 tdso1 The time from a SCK falling edge to SOUT rising edge 50 MHz SOUT delay time 2 tdso2 The time from a SCK falling edge to SOUT falling edge 50 ns SCK 2.5V 2.5V tdso1 tdso2 2.5V 2.5V SOUT LEDO output timings Parameter symbol LEDO delay time 1 tdled1 Conditions min The time from an XEN rising edge to LEDO rising edge typ max unit 100 ns 100 ns 200 ns 200 ns 200 ns CL = 30pF, IO = 100mA, VO = 42V LEDO delay time 2 tdled2 The time from an XEN falling edge to LEDO falling edge CL = 30pF, IO = 100mA, VO = 42V LEDO rise time trled LEDO rise time CL = 30pF, IO = 100mA, VO = 42V LEDO fall time tfled LEDO fall time CL = 30pF, IO = 100mA, VO = 42V LEDO delay time 3 tdled3 The time from a LATCH rising edge to LEDO falling edge CL = 30pF, IO = 100mA, VO = 42V XEN 2.5V 2.5V tdled2 tdled1 90% LEDO 90% 90% 10% 10% trled tfled tdled3 2.5V LATCH No.A1628-7/9 LV5232VH Application Circuit Example max:42V 5V SVCC CPU SVCC LEDO1 SDATAIN SDATAIN SCK SCK LATCH LATCH LEDO16 XEN SOUT XRESET SGND PGND1 PGND2 PGND3 PGND4 Heat sink & GND XRESET LEDO16 SOUT SGND PGND1 PGND2 PGND3 PGND4 Heat sink & GND XEN To SDATAIN LEDO1 Temperature properties graph IO -- LEDO 100 IO -- LEDO 100 Output current, IO - mA Output current, IO - mA 75 C 80 70 duty cycle 100% 60 0 2 4 90 80 70 duty cycle 80% 60 6 8 10 12 14 16 Number of output ports, LEDO C 50 C 50 C 90 75 Ta = 25 C Ta = 25 C 0 2 4 6 8 10 12 14 16 Number of output ports, LEDO IO -- LEDO 100 Ta = 25 C 50 C Output current, IO - mA 75 C 90 80 70 duty cycle 50% 60 0 2 4 6 8 10 12 14 16 Number of output ports, LEDO No.A1628-8/9 LV5232VH ORDERING INFORMATION Device LV5232VH-TLM-H Package HSOP28 (275mil) (Pb-Free / Halogen Free) LV5232VH-MPB-H HSOP28 (275mil) (Pb-Free / Halogen Free) Shipping (Qty / Packing) 2000 / Tape & Reel 30 / Fan-Fold ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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