Electrical Specifications Subject to Change LTC5590 Dual 600MHz to 1.7GHz High Dynamic Range Downconverting Mixer Description Features n n n n n n n n n n n n n n Conversion Gain: 8.7dB at 900MHz IIP3: 26dBm at 900MHz Noise Figure: 9.7dB at 900MHz 15.6dB NF Under 5dBm Blocking High Input P1dB; 14.1dBm at 5V 53dB Channel-to-Channel Isolation 1.25W Power Consumption at 3.3V Low Current Mode for <800mW Consumption Enable Pins for Each Channel 50Ω Single-Ended RF and LO Inputs LO Input Matched In All Modes 0dBm LO Drive Level Small Package and Solution Size –40°C to 105°C Operation The LTC®5590 is part of a family of dual-channel high dynamic range, high gain downconverting mixers covering the 600MHz to 4GHz RF frequency range. The LTC5590 is optimized for 600MHz to 1.7GHz RF applications. The LO frequency must fall within the 700MHz to 1.5GHz range for optimum performance. A typical application is a LTE or GSM receiver with a 700MHz to 915MHz RF input and high side LO. The LTC5590’s high conversion gain and high dynamic range enable the use of lossy IF filters in high selectivity receiver designs, while minimizing the total solution cost, board space and system-level variation. A low current mode is provided for additional power savings and each of the mixer channels has independent shutdown control. Applications n n n High Dynamic Range Dual Downconverting Mixer Family 3G/4G Wireless Infrastructure Diversity Receivers (LTE, CDMA, GSM) MIMO Infrastructure Receivers High Dynamic Range Downmixer Applications PART NUMBER RF RANGE LO RANGE LTC5590 600MHz to 1.7GHz 700MHz to 1.5GHz LTC5591 1.3GHz to 2.3GHz 1.4GHz to 2.1GHz LTC5592 1.6GHz to 2.7GHz 1.7GHz to 2.5GHz LTC5593 2.3GHz to 4GHz 2.4GHz to 3.6GHz L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Wideband Receiver 190MHz SAW 1µF 22pF 150nH IFA+ RF 700MHz TO 915MHz LNA IF AMP BIAS 10pF SYNTH IF AMP 1nF VCC 22pF 1nF 190MHz SAW 24 NF 23 9 GC 8 22 21 TC = 25°C LO = 1090MHz RF = 900 ±30MHz TEST CIRCUIT IN FIGURE 1 5 160 VCCB 150nH 26 25 10 6 ENB (0V/3.3V) BIAS IFB– IIP3 12 7 ENB 150nH 22pF LO LO 1090MHz LO AMP IFB+ VCCIF ENA (0V/3.3V) RFA RFB 27 13 VCC 3.3V 1µF 180mA 11 ENA LO AMP LNA 22pF VCCA IFA– IMAGE BPF 100pF RF 700MHz TO 915MHz ADC 170 180 200 190 IF FREQUENCY (MHz) IIP3 (dBm) IMAGE BPF 100pF IF AMP 1nF 150nH GAIN (dB), NF (dB) 1nF VCCIF 3.3V or 5V 200mA Wideband Conversion Gain NF and IIP3 vs IF Frequency (Mixer Only, Measured on Evaluation Board) 190MHz BPF 20 210 19 220 5590 TA01b 190MHz BPF IF AMP ADC 5590 TA01a 5590p 1 LTC5590 Absolute Maximum Ratings Pin Configuration (Note 1) Mixer Supply Voltage (VCC)......................................4.0V IF Supply Voltage (VCCIF)..........................................5.5V Enable Voltage (ENA, ENB)...............–0.3V to VCC + 0.3V Power Select Voltage (ISEL) .............–0.3V to VCC + 0.3V LO Input Power (1GHz to 3GHz)..............................9dBm LO Input DC Voltage................................................ ±0.1V RFA, RFB Input Power (1GHz to 3GHz).................15dBm RFA, RFB Input DC Voltage..................................... ±0.1V Operating Temperature Range (TC)......... –40°C to 105°C Storage Temperature Range................... –65°C to 150°C Junction Temperature (TJ)..................................... 150°C VCCA IFBA IFA– IFA+ IFGNDA GND TOP VIEW 24 23 22 21 20 19 RFA 1 18 ISEL CTA 2 17 ENA GND 3 16 LO 25 GND GND 4 15 GND 13 GND VCCB IFBB 9 10 11 12 IFB– 8 IFB+ 7 GND 14 ENB RFB 6 IFGNDB CTB 5 UH PACKAGE 24-LEAD (5mm × 5mm) PLASTIC QFN TJMAX = 150°C, θJC = 7°C/W EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC5590IUH#PBF LTC5590IUH#TRPBF 5590 24-Lead (5mm × 5mm) Plastic QFN –40°C to 105°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ DC Electrical Characteristics unless otherwise noted. Test circuit shown in Figure 1. (Note 2) PARAMETER VCC = 3.3V, VCCIF = 3.3V, ENA = ENB = High, ISEL = Low, TC = 25°C, CONDITIONS MIN TYP MAX UNITS VCCA, VCCB Supply Voltage (Pins 12, 19) 3.1 3.3 3.5 V VCCIFA, VCCIFB Supply Voltage (Pins 9, 10, 21, 22) 3.1 3.3 5.3 V Mixer Supply Current (Pins 12, 19) 188 TBD mA IF Amplifier Supply Current (Pins 9, 10, 21, 22) 191 TBD mA Total Supply Current (Pins 9, 10, 12, 19, 21, 22) 379 TBD mA 500 µA Power Supply Requirements (VCCA, VCCB, VCCIFA, VCCIFB) Total Supply Current – Shutdown ENA = ENB = Low Enable Logic Input (ENA, ENB) High = On, Low = Off ENA, ENB Input High Voltage (On) 2.5 V ENA, ENB Input Low Voltage (Off) ENA, ENB Input Current –0.3V to VCC + 0.3V –20 0.3 V 30 µA Turn On Time 1 µs Turn Off Time 1.5 µs 5590p 2 LTC5590 DC Electrical Characteristics unless otherwise noted. Test circuit shown in Figure 1. (Note 2) PARAMETER VCC = 3.3V, VCCIF = 3.3V, ENA = ENB = High, ISEL = Low, TC = 25°C, CONDITIONS MIN TYP MAX UNITS Low Current Mode Logic Input (ISEL) High = Low Power, Low = Normal Power Mode ISEL Input High Voltage 2.5 V ISEL Input Low Voltage ISEL Input Current –0.3V to VCC + 0.3V –20 0.3 V 30 µA Low Current Mode Current Consumption (ISEL = High) Mixer Supply Current (Pins 12, 19) 123 TBD mA IF Amplifier Supply Current (Pins 9, 10, 21, 22) 116 TBD mA Total Supply Current (Pins 9, 10, 12, 19, 21, 22) 239 TBD mA AC Electrical Characteristics VCC = 3.3V, VCCIF = 3.3V, ENA = ENB = High, ISEL = Low, TC = 25°C, PLO = 0dBm, PRF = –3dBm (∆f = 2MHz for two tone IIP3 tests), unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4) PARAMETER CONDITIONS MIN LO Input Frequency Range TYP MAX UNITS 700 to 1500 MHz 1100 to 1700 600 to 1100 MHz MHz 5 to 500 MHz RF Input Frequency Range Low Side LO High Side LO IF Output Frequency Range Requires External Matching RF Input Return Loss ZO = 50Ω, 700MHz to 1600MHz >12 dB LO Input Return Loss ZO = 50Ω, 700MHz to 1500MHz >12 dB IF Output Impedance Differential at 190MHz 300Ω||2.3pF R||C LO Input Power fLO = 700MHz to 1500MHz –4 0 6 dBm LO to RF Leakage fLO = 700MHz to 1500MHz <–36 dBm LO to IF Leakage fLO = 700MHz to 1500MHz <–26 dBm RF to LO Isolation fRF = 600MHz to 1700MHz >57 dB RF to IF Isolation fRF = 600MHz to 1700MHz >17 dB Channel-to-Channel Isolation fRF = 600MHz to 1700MHz 53 dB High Side LO Downmixer Application: ISEL = Low, RF = 700MHz to 1100MHz, IF = 190MHz, fLO = fRF + fIF PARAMETER CONDITIONS MIN TYP Conversion Gain RF = 700MHz RF = 900MHz RF = 1100MHz TBD 8.6 8.7 8.5 dB dB dB Conversion Gain Flatness RF = 900 ±30MHz, LO = 1090MHz, IF = 190 ±30MHz ±0.25 dB –0.006 dB/°C 25.3 26.0 24.8 dBm dBm dBm Conversion Gain vs Temperature TC = –40ºC to 105ºC, RF = 1950MHz Input 3rd Order Intercept RF = 700MHz RF = 900MHz RF = 1100MHz SSB Noise Figure RF = 700MHz RF = 900MHz RF = 1100MHz TBD 9.3 9.7 9.9 MAX TBD UNITS dB dB dB 5590p 3 LTC5590 AC Electrical Characteristics VCC = 3.3V, VCCIF = 3.3V, ENA = ENB = High, TC = 25°C, PLO = 0dBm, PRF = –3dBm (∆f = 2MHz for two tone IIP3 tests), unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3) High Side LO Downmixer Application: ISEL = Low, RF = 700MHz to 1100MHz, IF = 190MHz, fLO = fRF + fIF PARAMETER CONDITIONS MIN SSB Noise Figure Under Blocking fRF = 900MHz, fLO = 1090MHz, fBLOCK = 800MHz PBLOCK = 5dBm PBLOCK = 10dBm 2LO-2RF-Output Spurious Product (fRF = fLO – fIF/2) TYP MAX UNITS 15.6 21.2 dB dB fRF = 995MHz at –10dBm, fLO = 1090MHz, fIF = 190MHz –77 dBc 3LO-3RF Output Spurious Product (fRF = fLO – fIF/3) fRF = 1026.67MHz at –10dBm, fLO = 1090MHz, fIF = 190MHz –77 dBc Input 1dB Compression fRF = 900MHz, VCCIF = 3.3V fRF = 900MHz, VCCIF = 5V 10.7 14.1 dBm dBm Low Power Mode, High Side LO Downmixer Application: ISEL = High, RF = 700MHz to 1100MHz, IF = 190MHz, fLO = fRF + fIF PARAMETER CONDITIONS MIN TYP MAX UNITS Conversion Gain RF = 900MHz 7.7 dB Input 3rd Order Intercept RF = 900MHz 21.5 dBm SSB Noise Figure RF = 900MHz 9.9 dB Input 1dB Compression RF = 900MHz, VCCIF = 3.3V RF = 900MHz, VCCIF = 5V 10.4 10.9 dBm dBm Low Side LO Downmixer Application: ISEL = Low, RF = 1100MHz to 1600MHz, IF = 190MHz, fLO = fRF – fIF PARAMETER CONDITIONS Conversion Gain RF = 1200MHz RF = 1400MHz RF = 1600MHz Conversion Gain Flatness MIN TYP MAX UNITS 8.6 8.4 7.7 dB dB dB RF = 1600 ±30MHz, LO = 1790MHz, IF = 190 ±30MHz ±0.22 dB Conversion Gain vs Temperature TC = –40ºC to 105ºC, RF = 1600MHz –0.008 dB/°C Input 3rd Order Intercept RF = 1200MHz RF = 1400MHz RF = 1600MHz 27.5 27.3 27.2 dBm dBm dBm SSB Noise Figure RF = 1200MHz RF = 1400MHz RF = 1600MHz 9.9 9.7 10.4 dB dB dB SSB Noise Figure Under Blocking fRF = 1400MHz, fLO = 1210MHz, fBLOCK = 1500MHz PBLOCK = 5dBm PBLOCK = 10dBm 15.0 20.8 dB dB 2RF-2LO Output Spurious Product (fRF = fLO + fIF/2) fRF = 1305MHz at –10dBm, fLO = 1210MHz, fIF = 190MHz –72 dBc 3RF-3LO Output Spurious Product (fRF = fLO + fIF/3) fRF = 1273.33MHz at –10dBm, fLO = 1210MHz, fIF = 190MHz –72 dBc Input 1dB Compression RF = 1400MHz, VCCIF = 3.3V RF = 1400MHz, VCCIF = 5V 11.0 14.4 dBm dBm Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC5590 is guaranteed functional over the case operating temperature range of –40°C to 105°C. (θJC = 7°C/W) Note 3: SSB Noise Figure measured with a small-signal noise source, bandpass filter and 6dB matching pad on RF input, bandpass filter and 6dB matching pad on the LO input, and no other RF signals applied. Note 4: Channel A to channel B isolation is measured as the relative IF output power of channel B to channel A, with the RF input signal applied to channel A. The RF input of channel B is 50Ω terminated and both mixers are enabled. 5590p 4 LTC5590 Typical AC Performance Characteristics High Side LO VCC = 3.3V, VCCIF = 3.3V, ENA = ENB = High, ISEL = Low, TC = 25°C, PLO = 0dBm, PRF = –3dBm (–3dBm/tone for two-tone IIP3 tests, ∆f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain and IIP3 vs RF Frequency 17 16 26 16 15 15 14 14 –40°C 25°C 85°C 105°C 20 16 12 11 11 10 14 10 9 9 8 8 7 7 GC 8 6 600 700 6 1200 800 900 1000 1100 RF FREQUENCY (MHz) 6 600 45 40 700 800 900 1000 1100 RF FREQUENCY (MHz) 30 600 1200 700 800 900 1000 1100 RF FREQUENCY (MHz) 1200 5590 G03 5590 G02 700Mhz Conversion Gain, IIP3 and NF vs LO Input Power 1100MHz Conversion Gain, IIP3 and NF vs LO Input Power 900MHz Conversion Gain, IIP3 and NF vs LO Input Power 28 22 28 22 20 26 20 26 20 24 18 24 18 24 16 22 16 22 IIP3 22 12 10 16 14 8 NF 12 10 6 6 –6 –4 4 –2 2 0 LO INPUT POWER (dBm) 6 18 14 12 16 10 14 8 NF 12 6 GC 8 2 8 20 10 4 GC –40°C 25°C 85°C 6 0 –6 –4 4 –2 2 0 LO INPUT POWER (dBm) 6 18 IIP3 20 18 Conversion Gain, IIP3 and NF vs Supply Voltage (Single Supply) 4 10 2 8 0 6 –6 28 26 20 26 24 18 24 18 24 14 8 NF 12 6 GC 10 GC (dB), IIP3 (dBm) 10 22 18 12 10 14 8 NF 12 10 2 8 6 0 3.6 6 5590 G07 14 16 8 3.5 3.2 3.1 3.4 3.3 VCC, VCCIF SUPPLY VOLTAGE (V) –40°C 25°C 85°C 20 4 3 16 6 GC 4 2 3 4 3.5 5 4.5 VCCIF SUPPLY VOLTAGE (V) 0 5.5 5590 G08 SSB NF (dB) 12 SSB NF (dB) 14 IIP3 GC (dB), IIP3 (dBm), P1dB (dBm) 22 16 4 –2 2 0 LO INPUT POWER (dBm) 6 0 Conversion Gain, IIP3 and RF Input P1dB vs Temperature 28 18 –4 5590 G06 20 20 4 2 Conversion Gain, IIP3 and NF vs Supply Voltage (Dual Supply) 16 6 GC 22 –40°C 25°C 85°C 8 NF 12 26 IIP3 12 10 14 28 22 14 16 5590 G05 5590 G04 16 –40°C 25°C 85°C SSB NF (dB) 20 18 14 IIP3 SSB NF (dB) –40°C 25°C 85°C GC (dB), IIP3 (dBm) 22 26 GC (dB), IIP3 (dBm) 28 SSB NF (dB) GC (dB), IIP3 (dBm) 50 35 5590 G01 GC (dB), IIP3 (dBm) 55 12 12 10 –40°C 25°C 85°C 105°C 13 13 GC (dB) 18 Channel Isolation vs RF Frequency 60 ISOLATION (dB) IIP3 22 SSB NF (dB) 24 IIP3 (dBm) SSB NF vs RF Frequency 28 IIP3 22 VCCIF = 3.3V VCCIF = 5V 20 18 16 14 P1dB 12 10 8 6 –40 GC 20 –10 80 50 CASE TEMPERATURE (°C) 110 5590 G09 5590p 5 LTC5590 Typical AC Performance Characteristics High Side LO VCC = 3.3V, VCCIF = 3.3V, ENA = ENB = High, ISEL = Low, TC = 25°C, PLO = 0dBm, PRF = –3dBm (–3dBm/tone for two-tone IIP3 tests, ∆f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. Single-Tone IF Output Power, 2 × 2 and 3 × 3 Spurs vs RF Input Power 20 20 10 10 –20 –30 –40 –50 IM3 –60 IM5 –10 –20 –30 –40 –50 LO = 1090MHz PLO = 0dBm –60 –70 –6 –9 3 –3 0 RF INPUT POWER (dBm/TONE) –80 –12 6 3LO-3RF RF = 1026.67MHz 2LO-2RF RF = 995MHz –70 –80 –12 –6 0 –3 RF INPUT POWER (dBm) –9 18 RF = 900MHz BLOCKER = 800MHz 16 14 –15 5 –10 –5 0 RF BLOCKER POWER (dBm) 10 6 –3 3 0 LO INPUT POWER (dBm) RF Isolation vs RF Frequency –10 60 RF-LO 50 –20 LO-IF –30 –40 LO-RF 40 30 RF-IF 20 10 –60 800 5590 G13 TBD –6 5590 G12 70 –50 8 –20 3LO-3RF RF = 1026.67MHz –80 0 12 10 2LO-2RF RF = 995MHz –75 LO Leakage vs LO Frequency LO LEAKAGE (dBm) SSB NF (dBc) 20 –70 5590 G11 PLO = –3dBm PLO = 0dBm PLO = 3dBm PLO = 6dBm 22 RF = 900MHz PIN = –10dBm LO = 1090MHz –65 –85 6 3 5590 G10 SSB Noise Figure vs RF Blocker Power 24 RELATIVE SPUR LEVEL (dBc) –10 –60 IFOUT RF = 900MHz 0 IFOUT 2 × 2 and 3 × 3 Spur Suppression vs LO Input Power ISOLATION (dB) 0 OUTPUT POWER (dBm) OUTPUT POWER/TONE (dBm) 2-Tone IF Output Power, IM3 and IM5 vs RF Input Power 900 1000 1100 1200 1300 LO FREQUENCY (MHz) 1400 0 600 800 900 1000 1100 RF FREQUENCY (MHz) 1200 5590 G15 5590 G14 TBD 700 TBD 5590p 6 LTC5590 Typical AC Performance Characteristics Low Power Mode, High Side LO VCC = 3.3V, VCCIF = 3.3V, ENA = ENB = High, ISEL = High, TC = 25°C, PLO = 0dBm, PRF = –3dBm (–3dBm/tone for two-tone IIP3 tests, ∆f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain and IIP3 vs RF Frequency 16 22 15 21 14 9 10 8 15 14 7 13 6 GC 12 600 700 8 6 600 700 800 900 1000 1100 RF FREQUENCY (MHz) 5590 G19 22 14 10 8 NF GC 6 –40°C 25°C 85°C 16 12 14 10 12 8 6 10 4 8 2 6 NF GC –4 –6 4 –2 2 0 LO INPUT POWER (dBm) 5590 G22 6 20 16 18 14 NF 16 10 6 10 4 8 2 6 24 22 18 22 20 16 20 16 12 3 3.5 3.2 3.1 3.4 3.3 VCC, VCCIF Supply Voltage (V) 16 12 10 12 10 4 8 2 3.6 6 5590 G25 14 14 6 GC 8 6 8 NF 10 18 8 NF 6 GC 3 4 5 4 3.5 4.5 VCC, VCCIF Supply Voltage (V) 2 5.5 5590 G26 SSB NF (dB) 10 14 SSB NF (dB) 12 –40°C 25°C 85°C GC (dB), IIP3 (dBm), P1dB (dBm) 20 GC (dB), IIP3 (dBm) 24 18 14 6 2 Conversion Gain, IIP3 and RF Input P1dB vs Temperature 20 16 4 –2 2 0 LO INPUT POWER (dBm) 5590 G24 22 18 6 4 –4 –6 8 –40°C 25°C 85°C GC 24 IIP3 12 14 12 Conversion Gain, IIP3 and NF vs Supply Voltage (Dual Supply) –40°C 25°C 85°C 18 IIP3 5590 G23 Conversion Gain, IIP3 and NF vs Supply Voltage (Single Supply) GC (dB), IIP3 (dBm) 14 20 SSB NF (dB) 12 16 IIP3 20 18 SSB NF (dB) GC (dB), IIP3 (dBm) 18 12 IIP3 6 1100MHz Conversion Gain, IIP3 and NF vs LO Input Power 22 SSB NF (dB) –40°C 25°C 85°C 4 –2 2 0 LO INPUT POWER (dBm) 3 –6 –9 0 –3 RF INPUT POWER (dBm/tone) 5590 G21 18 16 –4 IM5 –80 –12 1200 24 14 –6 –60 20 20 6 –50 24 18 8 IM3 –40 20 GC (dB), IIP3 (dBm) IIP3 10 –30 900MHz Conversion Gain, IIP3 and NF vs LO Input Power 24 16 RF1 = 899MHz RF2 = 901MHz LO = 1090MHz 5590 G20 700MHz Conversion Gain, IIP3 and NF vs LO Input Power 22 –10 –20 –70 5 1200 800 900 1000 1100 RF FREQUENCY (MHz) 0 GC (dB), IIP3 (dBm) 16 10 IFOUT 10 12 SSB NF (dB) IIP3 (dBm) 11 –40°C 25°C 85°C 105°C 17 GC (dB) 18 14 12 20 –40°C 25°C 85°C 105°C 13 IIP3 19 16 OUTPUT POWER (dBm/tone) 23 20 2-Tone IF Output Power, IM3 and IM5 vs RF Input Power SSB NF vs RF Frequency 20 18 IIP3 VCCIF = 3.3V VCCIF = 5V 16 14 12 10 8 6 –40 P1dB GC 80 20 –10 50 CASE TEMPERATURE (°C) 110 5590 G27 5590p 7 LTC5590 Typical AC Performance Characteristics Low Side LO VCC = 3.3V, VCCIF = 3.3V, ENA = ENB = High, ISEL = Low, TC = 25°C, PLO = 0dBm, PRF = –3dBm (–3dBm/tone for two-tone IIP3 tests, ∆f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain and IIP3 vs RF Frequency 16 15 15 14 14 13 13 12 12 IIP3 –40°C 25°C 85°C 105°C 18 11 10 16 GC 11 10 9 9 12 8 8 10 7 7 14 8 1100 1200 6 1700 1300 1400 1500 1600 RF FREQUENCY (MHz) 6 1100 1200 20 26 1300 1400 1500 1600 RF FREQUENCY (MHz) 12 8 NF GC –6 –4 2 –2 0 LO INPUT POWER (dBm) 4 6 IIP3 10 0 6 –6 30 20 26 –4 2 –2 0 LO INPUT POWER (dBm) 4 8 NF GC 3 3.4 3.5 3.1 3.2 3.3 VCC, VCCIF SUPPLY VOLTAGE (V) 6 IIP3 –40°C 25°C 85°C 12 14 0 6 10 0 3.6 6 4 GC –6 –4 2 –2 0 LO INPUT POWER (dBm) 24 30 20 26 16 8 NF GC 4 4.5 5 3.5 4 VCCIF SUPPLY VOLTAGE (V) 4 6 0 Conversion Gain, IIP3 and RF Input P1dB vs Temperature 12 3 8 NF 5590 G33 18 14 16 18 10 –40°C 25°C 85°C 22 4 5590 G34 20 IIP3 22 4 0 5.5 5590 G35 SSB NF (dB) 12 GC (dB), IIP3 (dBm) 24 18 6 26 Conversion Gain, IIP3 and NF vs Supply Voltage (Dual Supply) 22 10 20 24 5590 G32 –40°C 25°C 16 85°C 14 30 8 NF GC 4 SSB NF (dB) GC (dB), IIP3 (dBm) IIP3 24 12 14 10 5590 G30 16 18 Conversion Gain, IIP3 and NF vs Supply Voltage (Single Supply) 30 0 5 –10 –5 RF BLOCKER LEVEL (dBm) 1600MHz Conversion Gain, IIP3 and NF vs LO Input Power –40°C 25°C 85°C 22 5590 G31 26 –15 SSB NF (dB) 18 6 8 –20 1700 SSB NF (dB) 22 GC (dB), IIP3 (dBm) 30 SSB NF (dB) GC (dB), IIP3 (dBm) 24 –40°C 25°C 16 85°C 10 14 1400MHz Conversion Gain, IIP3 and NF vs LO Input Power 30 14 16 5590 G29 1200MHz Conversion Gain, IIP3 and NF vs LO Input Power IIP3 RF = 1400MHz BLOCKER = 1500MHz 10 5590 G28 26 18 12 GC (dB), IIP3 (dBm) 20 20 PLO = –3dBm PLO = 0dBm PLO = 3dBm PLO = 6dBm 22 GC (dB), IIP3 (dBm), P1dB (dBm) 22 GC (dB) IIP3 (dBm) 24 24 –40°C 25°C 85°C 105°C SSB NF (dB) 16 28 SSB NF (dB) 30 26 SSB Noise Figure vs RF Blocker Level SSB NF vs RF Frequency IIP3 VCCIF = 3.3V VCCIF = 5V 22 18 14 P1dB 10 6 –40 GC 50 80 –10 20 CASE TEMPERATURE (°C) 110 5590 G36 5590p 8 LTC5590 Typical DC Performance Characteristics ENA = ENB = High, test circuit shown in Figure 1. ISEL = Low 196 VCCIF Supply Current vs Supply Voltage (IF Amplifier) 260 VCCIF = VCC 240 105°C 192 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 194 85°C 190 188 25°C 186 –40°C 184 480 105°C 3 3.1 3.3 3.4 3.5 3.2 VCC SUPPLY VOLTAGE (V) 440 200 25°C 180 160 120 3.6 460 85°C 220 –40°C 140 182 180 VCC = 3.3V Total Supply Current vs Temperature (VCC + VCCIF) SUPPLY CURRENT (mA) VCC Supply Current vs Supply Voltage (Mixer and LO Amplifier) VCC = 3.3V, VCCIF = 5V (DUAL SUPPLY) 420 400 380 VCC = VCCIF = 3.3V (SINGLE SUPPLY) 360 340 320 300 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 VCCIF SUPPLY VOLTAGE (V) 280 –40 5.4 20 50 80 –10 CASE TEMPERATURE (°C) 5590 G38 5590 G37 110 5590 G39 ISEL = High VCC Supply Current vs Supply Voltage (Mixer and LO Amplifier) 170 VCCIF = VCC 85°C 124 25°C 122 120 –40°C 3 3.1 3.3 3.4 3.5 3.2 VCC SUPPLY VOLTAGE (V) 25°C 110 –40°C 90 118 116 85°C 130 3.6 5590 G40 70 Total Supply Current vs Temperature (VCC + VCCIF) 280 105°C 150 105°C 126 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 128 300 VCC = 3.3V SUPPLY CURRENT (mA) 130 VCCIF Supply Current vs Supply Voltage (IF Amplifier) 260 240 220 VCC = 3.3V, VCCIF = 5V (DUAL SUPPLY) VCC = VCCIF = 3.3V (SINGLE SUPPLY) 200 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 VCCIF SUPPLY VOLTAGE (V) 5.4 5590 G41 180 –40 20 50 80 –10 CASE TEMPERATURE (°C) 110 5590 G42 5590p 9 LTC5590 Pin Functions RFA, RFB (Pins 1, 6): Single-Ended RF Inputs for Channels A and B. These pins are internally connected to the primary sides of the RF input transformers, which have low DC resistance to ground. Series DC-blocking capacitors should be used to avoid damage to the integrated transformer when DC voltage is present at the RF inputs. The RF inputs are impedance matched when the LO input is driven with a 0±6dBm source between 700MHz and 1.5GHz and the channels are enabled. CTA, CTB (Pins 2, 5): RF Transformer Secondary CenterTap on Channels A and B. These pins may require bypass capacitors to ground to optimize IIP3 performance. Each pin has an internally generated bias voltage of 1.2V and must be DC-isolated from ground and VCC. GND (Pins 3, 4, 7, 13, 15, 24, Exposed Pad Pin 25): Ground. These pins must be soldered to the RF ground plane on the circuit board. The exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. IFGNDB, IFGNDA (Pins 8, 23): DC Ground Returns for the IF Amplifiers. These pins must be connected to ground to complete the DC current paths for the IF amplifiers. Chip inductors may be used to tune LO-IF and RF-IF leakage. Typical DC current is 95mA for each pin. IFB+, IFB–, IFA–, IFA+ (Pins 9, 10, 21, 22): Open-Collector Differential Outputs for the IF Amplifiers of Channels B and A. These pins must be connected to a DC supply through impedance matching inductors, or transformer center-taps. Typical DC current consumption is 48mA into each pin. IFBB, IFBA (Pins 11, 20): Bias Adjust Pins for the IF Amplifiers. These pins allow independent adjustment of the internal IF buffer currents for channels B and A, respectively. The typical DC voltage on these pins is 2.2V. If not used, these pins must be DC isolated from ground and VCC. VCCB and VCCA (Pins 12, 19): Power Supply Pins for the LO Buffers and Bias Circuits. These pins must be connected to a regulated 3.3V supply with bypass capacitors located close to the pins. Typical current consumption is 94mA per pin. ENB, ENA (Pins 14, 17): Enable Pins. These pins allow Channels B and A, respectively, to be independently enabled. An applied voltage of greater than 2.5V activates the associated channel while a voltage of less than 0.3V disables the channel. Typical input current is less than 10μA. These pins must not be allowed to float. LO (Pin 16): Single-Ended Local Oscillator Input. This pin is internally connected to the primary side of the LO input transformer and has a low DC resistance to ground. Series DC-blocking capacitors should be used to avoid damage to the integrated transformer when DC voltage present at LO input. The LO input is internally matched to 50Ω for all states of ENA and ENB. ISEL (Pin 18): Low Current Select Pin. When this pin is pulled low (<0.3V), both mixer channels are biased at the normal current level for best RF performance. When greater than 2.5V is applied, both channels operate at reduced current, which provides reasonable performance at lower power consumption. 5590p 10 LTC5590 Block Diagram 24 GND 23 22 IFGNDA IFA+ 21 IFA– 20 19 IFBA VCCA IF AMP 1 2 BIAS ISEL ENA RFA LO AMP PASS MIX CTA LO 18 17 16 3 GND 4 GND CTB 5 6 GND 15 LO AMP PASS MIX RFB ENB IF AMP 14 BIAS GND 13 7 GND IFB+ IFGNDB 8 9 IFB– 10 IFBB 11 VCCB 12 5590 BD 5590p 11 LTC5590 Test Circuit T1A 4:1 IFA 50Ω C7A L1A VCCIF 3.3V TO 5V 200mA C6 RFA 50Ω VCC 3.3V 180mA C5A 24 C1A 23 GND IFGNDA 22 21 IFA+ – IFA C3A 20 19 IFBA VCCA ISEL 18 ISEL (0V/3.3V) 2 CTA ENA 17 ENA (0V/3.3V) 3 GND LO 16 LTC5590 4 GND GND 15 5 CTB ENB 14 GND DC1710A BOARD BIAS STACK-UP GND (NELCO N4000-13) 0.062” 0.015” C4 1 RFA C2 RFB 50Ω RF 0.015” L2A LO 50Ω ENB (0V/3.3V) C1B 6 RFB GND 13 GND IFGNDA IFB+ 7 8 9 IFB– IFBB VCCB 10 11 12 5590 TC01 C3B C5B L1B L2B C7B 4:1 T1B IFB 50Ω L1, L2 vs IF FREQUENCIES REF DES VALUE SIZE COMMENTS IF (MHz) L1, L2 (nH) C1A, C1B 100pF 0402 AVX 140 270 C2 10pF 0402 AVX 190 150 22pF 0402 AVX 240 100 C3A, C3B C5A, C5B 300 56 C4, C6 1µF 0603 AVX 380 33 C7A, C7B 1000pF 0402 AVX 450 22 L1, L2 150nH 0603 T1A, T2B TC1-1W-7ALN+ Coilcraft Mini-Circuits Figure 1. Standard Downmixer Test Circuit Schematic (190MHz) 5590p 12 LTC5590 Applications Information Introduction The LTC5590 consists of two identical mixer channels driven by a common LO input signal. Each high linearity mixer consists of a passive double-balanced mixer core, IF buffer amplifier, LO buffer amplifier and bias/enable circuits. See the Pin Functions and Block Diagram sections for a description of each pin. Each of the mixers can be shutdown independently to reduce power consumption and low current mode can be selected that allows a trade-off between performance and power consumption. The RF and LO inputs are single-ended and are internally matched to 50Ω. Low side or high side LO injection can be used. The IF outputs are differential. The evaluation circuit, shown in Figure 1, utilizes bandpass IF output matching and an IF transformer to realize a 50Ω single-ended IF output. The evaluation board layout is shown in Figure 2. The secondary winding of the RF transformer is internally connected to the channel A passive mixer core. The centertap of the transformer secondary is connected to Pin 2 (CTA) to allow the connection of bypass capacitor, C8A. The value of C8A is LO frequency-dependent and is not required for most applications, though it can improve IIP3 in some cases. When used, it should be located within 2mm of Pin 2 for proper high frequency decoupling. The nominal DC voltage on the CTA pin is 1.2V. For the RF inputs to be properly matched, the appropriate LO signal must be applied to the LO input. A broadband input match is realized with C1A = 100pF. The measured input return loss is shown in Figure 4 for LO frequencies of 0.7GHz, 1.09GHz and 1.5GHz. These LO frequencies correspond to lower, middle and upper values in the LO range. As shown in Figure 4, the RF input impedance is dependent on LO frequency, although a single value of C1A is adequate to cover the 700MHz to 1.5GHz RF band. LTC5590 RFA TO CHANNEL A MIXER C1A 1 2 RFA CTA C8A 5590 F03 Figure 3. Channel A RF Input Schematic 5590 F02 RF Inputs The RF inputs of channels A and B are identical. The RF input of channel A, shown in Figure 3, is connected to the primary winding of an integrated transformer. A 50Ω match is realized when a series external capacitor, C1A, is connected to the RF input. C1A is also needed for DC blocking if the source has DC voltage present, since the primary side of the RF transformer is internally DC-grounded. The DC resistance of the primary is approximately 4.5Ω. –5 RETURN LOSS (dB) Figure 2. Evaluation Board Layout 0 LO = 700MHz LO = 1090MHz LO = 1500MHz –10 –15 –20 C1 = 100pF –25 600 700 800 900 1000 1100 1200 1300 1400 FREQUENCY (MHz) 5590 F04 Figure 4. RF Port Return Loss 5590p 13 LTC5590 Applications Information Table 1. RF Input Impedance and S11 (at Pin 1, No External Matching, fLO = 1.09GHz) FREQUENCY (GHz) RF INPUT IMPEDANCE S11 MAG ANGLE 0.6 34.2 + j24.5 0.33 107 0.7 41.3 + j22.4 0.26 97 0.8 48.5 + j18.1 0.18 84 0.9 54.3 + j10.1 0.10 61 1.0 54.2 – j4.6 0.06 –45 1.1 38.4 – j16 0.22 –116 1.2 29.3 – j9.4 0.29 –149 1.3 27.7 – j4.5 0.29 –165 1.4 27.4 – j1.6 0.29 –175 1.5 27.8 – j0.1 0.28 –180 1.6 29.4 + j0.2 0.26 179 1.7 31.2 –j0.5 0.23 –178 LTC5590 BIAS ISEL ENA TO MIXER B ENB BIAS 0 BOTH CHANNELS ON ONE CHANNEL ON BOTH CHANNELS OFF –5 –10 –15 –20 C2 = 10pF –25 700 800 900 1000 1100 1200 1300 1400 1500 FREQUENCY (MHz) 5590 F06 17 Figure 6. LO Input Return Loss C2 LO 16 14 5590 F05 Figure 5. LO Input Schematic LO Input The LO input, shown in Figure 5, is connected to the primary winding of an integrated transformer. A 50Ω impedance match is realized at the LO port by adding an external series capacitor, C2. This capacitor is also needed for DC blocking if the LO source has DC voltage present, since the primary side of the LO transformer is DC-grounded internally. The DC resistance of the primary is approximately 4.5Ω. 14 The LO port is always 50Ω matched when VCC is applied, even when one or both of the channels is disabled. This helps to reduce frequency pulling of the LO source when the mixer is switched between different operating states. Figure 6 illustrates the LO port return loss for the different operating modes. 18 TO MIXER A LO The secondary of the transformer drives a pair of high speed limiting differential amplifiers for channels A and B. The LTC5590’s LO amplifiers are optimized for the 700MHz to 1.5GHz LO frequency range; however, LO frequencies outside this frequency range may be used with degraded performance. RETURN LOSS (dB) The RF input impedance and input reflection coefficient, versus RF frequency, are listed in Table 1. The reference plane for this data is Pin 1 of the IC, with no external matching, and the LO is driven at 1.09GHz. The nominal LO input level is 0dBm, though the limiting amplifiers will deliver excellent performance over a ±6dBm input power range. Table 2 lists the LO input impedance and input reflection coefficient versus frequency. Table 2. LO Input Impedance vs Frequency (at Pin 16, No External Matching, ENA = ENB = High) FREQUENCY (GHz) INPUT IMPEDANCE S11 MAG ANGLE 0.7 29.7 + j34.7 0.46 97 0.8 39.9 + j34.1 0.37 86 0.9 48.7 + j26.6 0.26 78 1.0 50.8 + j15.1 0.15 78 1.1 46.5 + j6.2 0.07 116 1.2 39.9 + j2.5 0.12 165 1.3 34.0 + j1.4 0.19 174 1.4 29.2 + j2.1 0.26 173 1.5 25.6 + j3.8 0.33 168 5590p LTC5590 Applications Information IF Outputs The IF amplifiers in channels A and B are identical. The IF amplifier for channel A, shown in Figure 7, has differential open collector outputs (IFA+ and IFA–), a DC ground return pin (IFGNDA), and a pin for adjusting the internal bias (IFBA). The IF outputs must be biased at the supply voltage (VCCIFA), which is applied through matching inductors L1A and L2A. Alternatively, the IF outputs can be biased through the center tap of a transformer (T1A). The common node of L1A and L2A can be connected to the center tap of the transformer. Each IF output pin draws approximately 48mA of DC supply current (96mA total). An external load resistor, R2A, can be used to improve impedance matching if desired. IFGNDA (Pin 23) must be grounded or the amplifier will not draw DC current. Inductor L3A may improve LO-IF and RF-IF leakage performance in some applications, but is otherwise not necessary. Inductors should have small resistance for DC. High DC resistance in L3A will reduce the IF amplifier supply current, which will degrade RF performance. T1A 23 IGNDA 0.9nH IF A– 0.9nH RIF CIF Figure 8. IF Output Small-Signal Model R1A (OPTION TO REDUCE DC POWER) C5A R2A 21 20 IFBA IFA– VCCA IF AMP LTC5590 21 IFA+ L2A VCCIFA 22 IFA+ 22 LTC5590 5590 F08 C7A L3A (OR SHORT) 100mA At IF frequencies, the IF output impedance can be modeled as 300Ω in parallel with 2.3pF. The equivalent small-signal model, including bondwire inductance, is shown in Figure 8. Frequency-dependent differential IF output impedance is listed in Table 3. This data is referenced to the package pins (with no external components) and includes the effects of IC and package parasitics. IFA 4:1 L1A For optimum single-ended performance, the differential IF output must be combined through an external IF transformer or a discrete IF balun circuit. The evaluation board (see Figures 1 and 2) uses a 4:1 IF transformer for impedance transformation and differential to single-ended conversion. It is also possible to eliminate the IF transformer and drive differential filters or amplifiers directly. 4mA Bandpass IF Matching The bandpass IF matching configuration, shown in Figures 1 and 7, is best suited for IF frequencies in the 90MHz to 500MHz range. Resistor R2A may be used to reduce the IF output resistance for greater bandwidth and inductors L1A and L2A resonate with the internal IF output capacitance at the desired IF frequency. The value of L1A, L2A can be estimated as follows: L1A = L2A = BIAS 1 (2πfIF ) 2 • 2 • CIF 5590 F07 Figure 7. IF Amplifier Schematic with Bandpass Match where CIF is the internal IF capacitance (listed in Table 3). 5590p 15 LTC5590 Applications Information Values of L1A and L2A are tabulated in Figure 1 for various IF frequencies. The measured IF output return loss for bandpass IF matching is plotted in Figure 9. T1A VCCIFA 3.1 TO 5.3V C7A C5A L1A Table 3. IF Output Impedance vs Frequency L2A R2A DIFFERENTIAL OUTPUT IMPEDANCE (RIF || XIF (CIF)) FREQUENCY (MHz) IFA 50Ω 4:1 90 403 || – j610 (2.9pF) 140 384 || – j474 (2.4pF) 190 379 || – j381 (2.2pF) 240 380 || – j316 (2.1pF) 300 377 || – j253 (2.1pF) 380 376 || – j210 (2.0pF) 450 360 || – j177 (2.0pF) C9A 22 IFA+ 21 LTC5590 IFA– 5590 F10 Figure 10. IF Output with Lowpass Matching 0 –5 180nH RETURN LOSS (dB) 0 RETURN LOSS (dB) –5 –10 270nH –15 100nH –25 68nH 82nH + 1k –15 –20 100nH –25 150nH –20 –10 –30 56nH 50 22nH 33nH 100 200 150 FREQUENCY (MHz) 250 5590 F11 50 100 150 200 250 300 350 400 450 500 FREQUENCY (MHz) 5590 F09 Figure 9. IF Output Return Loss with Bandpass Matching Figure 11. IF Output Return Loss with Lowpass Matching has been laid out to accommodate this matching topology with only minor modifications. Lowpass IF Matching IF Amplifier Bias For IF frequencies below 90MHz, the inductance values become unreasonably high and the lowpass topology shown in Figure 9 is preferred. This topology also can provide improved RF to IF and LO to IF isolation. VCCIFA is supplied through the center tap of the 4:1 transformer. A lowpass impedance transformation is realized by shunt elements R2A and C9A (in parallel with the internal RIF and CIF), and series inductors L1A and L2A. Resistor R2A is used to reduce the IF output resistance for greater bandwidth, or it can be omitted for the highest conversion gain. The final impedance transformation to 50Ω is realized by transformer T1A. The measured return loss is shown in Figure 11 for different values of inductance (C9A = OpF). The case with 82nH inductors and R2A = 1k is also shown. The LTC5590 demo board (see Figure 2) The IF amplifier delivers excellent performance with VCCIF = 3.3V, which allows a single supply to be used for VCC and VCCIF . At VCCIF = 3.3V, the RF input P1dB of the mixer is limited by the output voltage swing. For higher P1dB, in this case, resistor R2A (Figure 7) can be used to reduce the output impedance and thus the voltage swing, thus improving P1dB. The trade-off for improved P1dB will be lower conversion gain. With VCCIF increased to 5V the P1dB increases by over 3dB, at the expense of higher power consumption. Mixer P1dB performance at 900MHz is tabulated in Table 4 for VCCIF values of 3.3V and 5V. For the highest conversion gain, high-Q wire-wound chip inductors are recommended for L1A and L2A. Low cost multilayer chip inductors may be substituted, with a slight reduction in conversion gain. 5590p 16 LTC5590 Applications Information Table 4. Performance Comparison with VCCIF = 3.3V and 5V (RF = 900MHz, High Side LO, IF = 190MHz) VCCIF (V) R2A (Ω) ICCIF (mA) GC (dB) P1dB (dBm) IIP3 (dBm) NF (dB) 3.3 Open 191 8.7 10.7 26.0 9.7 1k 191 7.5 11.4 26.0 9.75 5 Open 200 8.7 14.1 25.5 9.8 The IFBA pin (Pin 20) is available for reducing the DC current consumption of the IF amplifier, at the expense of IIP3. The nominal DC voltage at Pin 20 is 2.1V, and this pin should be left open-circuited for optimum performance. The internal bias circuit produces a 4mA reference for the IF amplifier, which causes the amplifier to draw approximately 100mA. If resistor R1A is connected to Pin 20 as shown in Figure 7, a portion of the reference current can be shunted to ground, resulting in reduced IF amplifier current. For example, R1A = 1k will shunt away 1.5mA from Pin 20 and the IF amplifier current will be reduced by 38% to approximately 62mA. Table 5 summarizes RF performance versus IF amplifier current. Table 5. Mixer Performance with Reduced IF Amplifier Current RF = 900MHz, High Side LO, IF = 190MHz, VCC = VCCIF = 3.3V R1 ICCIF (mA) GC (dB) IIP3 (dBm) P1dB (dB) NF (dB) Open 95.5 8.7 26.0 10.7 9.7 4.7kΩ 86.5 8.7 25.6 10.6 9.7 2.2kΩ 78.3 8.6 25.0 10.6 9.6 1kΩ 68.6 8.5 24.1 10.5 9.6 RF = 1400MHz, Low Side LO, IF = 190MHz, VCC = VCCIF = 3.3V R1 ICCIF (mA) GC (dB) IIP3 (dBm) P1dB (dBm) NF (dB) Open 95.5 8.4 27.3 11 9.7 4.7kΩ 86.4 8.5 26.8 10.9 9.6 2.2kΩ 78.2 8.5 26.2 10.9 9.6 1kΩ 68.5 8.4 25.1 10.8 9.6 When ISEL is set low (<0.3V), both channels operate at nominal DC current. When ISEL is set high (>2.5V), the DC current in both channels is reduced, thus reducing power consumption. The performance in low power mode and normal power mode are compared in Table 6. LTC5590 VCCA 19 ISEL 18 500Ω BIAS A VCCB BIAS B 5590 F13 Figure 12. ISEL Interface Schematic Table 6. Performance Comparison Between Different Power Modes RF = 900MHz, High Side LO, IF = 190MHz, VCC = VCCIF = 3.3V ISEL ICCIF (mA) GC (dB) IIP3 (dBm) P1dB (dBm) NF (dB) Low 376 8.7 26.0 10.7 9.7 High 239 7.7 21.5 10.4 9.9 Enable Interface Figure 13 shows a simplified schematic of the ENA pin interface (ENB is identical). To enable channel A, the ENA voltage must be greater than 2.5V. If the enable function is not required, the enable pin can be connected directly to VCC. The voltage at the enable pin should never exceed the power supply voltage (VCC) by more than 0.3V. If this LTC5590 VCCA 19 ENA 17 ESD CLAMP 500Ω Low Current Mode Both mixer channels can be set to low current mode using the ISEL pin. This allows flexibility to select a reduced current mode of operation when lower RF performance is acceptable, reducing power consumption by 36%. Figure 12 shows a simplified schematic of the ISEL pin interface. 5590 F13 Figure 13. ISEL Interface Schematic 5590p 17 LTC5590 Applications Information should occur, the supply current could be sourced through the ESD diode, potentially damaging the IC. The Enable pins must be pulled high or low. If left floating, the on/off state of the IC will be indeterminate. If a three-state condition can exist at the enable pins, then a pull-up or pull-down resistor must be used. Supply Voltage Ramping Fast ramping of the supply voltage can cause a current glitch in the internal ESD protection circuits. Depending on the supply inductance, this could result in a supply volt- age transient that exceeds the maximum rating. A supply voltage ramp time of greater than 1ms is recommended. Spurious Output Levels Mixer spurious output levels versus harmonics of the RF and LO are tabulated in Tables 7 and 8 for frequencies up to 10GHz. The spur levels were measured on a standard evalution board using the test circuit shown in Figure 1. The spur frequencies can be calculated using the following equation: fSPUR = (M • fRF) – (N • fLO) Table 7. IF Output Spur Levels (dBc), High Side LO (RF = 900MHz, PRF = –3dBm, PLO = 0dBm, VCC = VCCIF = 3.3V, TC = 25°C) 0 1 2 3 4 M 5 6 7 8 9 10 *Less than –100dBc 0 –31.8 –68.6 * * * * * * * * 1 –40.0 0 –63.0 * * * * * * * * 2 –42 –49.0 –78.6 * * * * * * * * 3 –54.8 –47.4 –73.9 –81.5 –78.0 * * * * * * N 4 –55.7 –72.2 –87.7 * * * * * * * * 5 –66.5 –64.0 –87.8 * * * * * * * * 6 –81.37 –88.5 82.3 * * * * * * * * 7 –73.07 –70.3 * * * * * * * * * 8 –74.33 –81.6* * * * * * * * * * 9 –72.53 –81.2* * * * * * * * * * 10 5 –71.3 –67.5 –86.4 * * * * * * –95.59 –94.52 6 –67.39 –78.3 –83.2 * * * * * * * * 7 –85.33 –73.42 * * * * * * * * * 8 –69.93 * –93.16 * * * * * * * * 9 10 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * Table 8. IF Output Spur Levels (dBc), Low Side LO (RF = 1400MHz, PRF = –3dBm, PLO = 0dBm, VCC = VCCIF = 3.3V, TC = 25°C) 0 1 2 3 4 M 5 6 7 8 9 10 *Less than –100dBc 0 –40.8 –77.5 * * * * * 1 –46.2 0 –74.4 –88.74 * * * * * 2 –42.2 –44.5 –69.3 * * * * * * 3 –55.9 –52.2 –71.7 –76.8 * * * * –93.69 * N 4 –56.9 –75.0 * –89.21 * * * * * * * 5590p 18 LTC5590 Package Description UH Package UH Package 24-Lead Plastic QFN (5mm × 5mm) 24-Lead LTC Plastic (5mm × 5mm) (Reference DWGQFN # 05-08-1747 Rev A) (Reference LTC DWG # 05-08-1747 Rev A) 0.75 ±0.05 5.40 ±0.05 3.90 ±0.05 3.20 ± 0.05 3.25 REF 3.20 ± 0.05 PACKAGE OUTLINE 0.30 ± 0.05 0.65 BSC RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 ± 0.10 R = 0.05 TYP 0.75 ± 0.05 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD R = 0.150 TYP 23 PIN 1 NOTCH R = 0.30 TYP OR 0.35 × 45° CHAMFER 24 0.55 ± 0.10 PIN 1 TOP MARK (NOTE 6) 1 2 5.00 ± 0.10 3.25 REF 3.20 ± 0.10 3.20 ± 0.10 (UH24) QFN 0708 REV A 0.200 REF NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.30 ± 0.05 0.65 BSC 5590p Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC5590 Typical Application Downconverting Mixer with Lowpass IF Matching T1A 4:1 22pF 1µF 100pF RFA 50Ω 15 VCC 3.3V 188mA 82nH 1k 22pF 24 23 22 21 GND IFGNDA IFA+ 20 1µF 19 IFA– IFBA VCCA 1 RFA ISEL ISEL 18 TO CHANNEL B (94mA) 14 ENA ENA 17 LTC5590 CHANNEL A 10pF 3 GND LO 16 4 GND GND 15 CHANNEL B NOT SHOWN 24 13 23 12 22 21 11 10 NF 9 20 19 GC 8 7 700 2 CTA 25 IIP3 TC = 25°C IF = 140MHz 800 IIP3 (dBm) TO CHANNEL B (96mA) 82nH 26 16 IFA 50Ω GAIN (dB), SSB NF (dB) VCCIF 3.3V TO 5V 191mA Conversion Gain, NF and IIP3 vs RF Frequency 18 1100 900 1000 RF FREQUENCY (MHz) 17 1200 5590 TA02b LO 50Ω 5590 TA02 Related Parts PART NUMBER DESCRIPTION Infrastructure LT5527 400MHz to 3.7GHz, 5V Downconverting Mixer LT5557 400MHz to 3.8GHz, 3.3V Downconverting Mixer LTC6416 2GHz 16-Bit ADC Buffer LTC6412 31dB Linear Analog VGA LTC554X 600MHz to 4GHz Downconverting Mixer Family LT5554 Ultralow Distort IF Digital VGA LT5578 400MHz to 2.7GHz Upconverting Mixer LT5579 1.5GHz to 3.8GHz Upconverting Mixer RF Power Detectors LTC5581 6GHz Low Power RMS Detector LTC5582 10GHz RMS Power Detector LTC5583 Dual 6GHz RMS Power Detector Measures VSWR ADCs LTC2285 LTC2185 LTC2242-12 14-Bit, 125Msps Dual ADC 16-Bit, 125Msps Dual ADC Ultralow Power 12-Bit, 250Msps ADC COMMENTS 2.3dB Gain, 23.5dBm IIP3 and 12.5dB NF at 1900MHz, 5V/78mA Supply 2.9dB Gain, 24.7dBm IIP3 and 11.7dB NF at 1950MHz, 3.3V/82mA Supply 40.25dBm OIP3 to 300MHz, Programmable Fast Recovery Output Clamping 35dBm OIP3 at 240MHz, Continuous Gain Range –14dB to 17dB 8dB Gain, >25dBm IIP3, 10dB NF, 3.3V/200mA Supply 48dBm OIP3 at 200MHz, 2dB to 18dB Gain Range, 0.125dB Gain Steps 27dBm OIP3 at 900MHz, 24.2dBm at 1.95GHz, Integrated RF Transformer 27.3dBm OIP3 at 2.14GHz, NF = 9.9dB, 3.3V Supply, Single-Ended LO and RF Ports 40dB Dynamic Range, ±1dB Accuracy Overtemperature, 1.5mA Supply Current 40MHz to 10GHz, Up to 57dB Dynamic Range, ±0.5dB Accuracy Overtemperature 40MHz to 6GHz, Up to 60dB Dynamic Range, >40dB Channel-to-Channel Isolation, Difference Output for vs WR Measurement 72.4dB SNR, >88dB SFDR, 790mW Power Consumption 74.8dB SNR, 185mW/Channel Power Consumption 65.4dB SNR, 78dB SFDR, 740mW Power Consumption 5590p 20 Linear Technology Corporation LT 0311 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2011