Micrel MIC2584-XBTS Dual-channel hot swap controller/sequencer Datasheet

MIC2584/2585
Micrel
MIC2584/MIC2585
Dual-Channel Hot Swap Controller/Sequencer
General Description
Features
The MIC2584 and MIC2585 are dual-channel positive voltage hot swap controllers designed to facilitate the safe
insertion of boards into live system backplanes. The MIC2584
and MIC2585 are available in 16-pin and 24-pin TSSOP
packages, respectively. Using a few external discrete components and by controlling the gate drives of external NChannel MOSFET devices, the MIC2584/85 provides inrush
current limiting and output voltage slew rate control in harsh,
critical power supply environments. Additionally, the MIC2585
provides output turn-on sequencing and output tracking
during turn-on and turn-off. In combination, the devices’
many features provide a simplified, robust solution for many
network applications to meet the power sequencing and
protection requirements of multiple-voltage logic systems.
• 1.0V to 13.2V supply voltage operation
• Surge voltage protection up to 20V
• Current regulation limits inrush current regardless of
load capacitance
• Programmable inrush current limiting
• Electronic circuit breaker
• Dual-level overcurrent fault sensing eliminates false
tripping
• Fast response to short circuit conditions (< 1µs)
• Two sequenced output mode selections
(MIC2585 only)
• ∆250mV supply tracking mode during turn-on/turn-off
(MIC2585 only)
• Overvoltage and undervoltage output monitoring
(Overvoltage for MIC2585 only)
• Undervoltage lockout protection
• /FAULT status output
• Power-On Reset and Power-Good status output
(Power-Good for MIC2585 only)
Applications
•
•
•
•
•
RAID systems
Network servers
Base stations
Network switches
Hot-board insertion
Ordering Information
Standard
Part Number
Pb-Free
Output Sequencing
Fast Circuit Breaker
Threshold
Package
MIC2584-xBTS
MIC2584-xYTS
N/A
x = J, 100mV
x = K, 150mV *
16-pin TSSOP
MIC2585-1xBTS
MIC2585-2xBTS
MIC2585-1xYTS
MIC2585-2xYTS
OUT2 follows OUT1
OUT1 follows OUT2
x = L, 200mV *
x = M, Off *
24-pin TSSOP
* Contact Micrel for availability.
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
March 2005
1
MIC2584/2585
MIC2584/2585
Micrel
Typical Application
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
1
R1
10Ω
C1
0.47µF
RSENSE2
0.020Ω
D1
VCC2
3.3V
1
R2
10Ω
D2
Q1
Si7892DP
(PowerPAK™ SO-8)
RSENSE1
0.006Ω
**BZX84Cxx
VCC1
12V
2
3
R14
Q2
10.7kΩ
Si7892DP
1%
(PowerPAK™ SO-8)
2
3
CLOAD1
330µF
4
CLOAD2
330µF
4
C2
0.47µF
1
R3
47kΩ
R4
22kΩ
2
VCC2
SENSE2
24
23
VCC1
SENSE1
ON
GATE1
OUT2
R5
22kΩ
DIS2
/FAULT
Signal
R6
130kΩ
1%
R7
13kΩ
1%
*C5
R8 0.047µF
30.9kΩ
1%
R9
8.06kΩ
1%
14
/FAULT
12
CDLY
FB2
MIC2585-1
FB1
OUT1
21
OV1
DIS1
4
OV2
PG1
PG2
/POR
TRK
CPOR
GND
10
13
C6
0.02µF
VOUT2
3.3V
1.5A
C3
0.01µF
GATE2
8
VOUT1
12V
6A
CFILTER
R12
105kΩ
1%
3
22
5
6
R11
120Ω
C4
0.01µF
7
18
R15
4.42kΩ
1%
20
19
R10
560Ω
R13
14.7kΩ
1%
17
DOWNSTREAM
CONTROLLER(S)
16
15
Downstream Control Signals
9
11
C7
0.033µF
GND
Undervoltage (Output1) = 10.5V
Undervoltage (Output2) = 2.95V
Overvoltage (Input1) = 13.2V
Overvoltage (Input2) = 3.65V
START-UP Delay = 2.5ms
POR Delay = 10ms
Circuit Breaker Response Time = 16ms
*C5 (optional) is used to set the delay for VOUT2 with respect to VOUT1
VOUT2 Delay = 9.5ms
**D1 is BZX84C18 and D2 is BZX84C8V2
Resistor tolerances are 5% unless specified otherwise.
Figure 1. Typical Application Circuit
MIC2584/2585
2
March 2005
MIC2584/2585
Micrel
Pin Configuration
VCC2 1
24 VCC1
SENSE2 2
23 SENSE1
GATE2 3
22 GATE1
OV2 4
VCC2 1
SENSE2 2
16 VCC1
15 SENSE1
21 OV1
OUT2 5
20 OUT1
DIS2 6
19 DIS1
GATE2 3
14 GATE1
FB2 7
18 FB1
OUT2 4
13 OUT1
ON 8
17 PG1
TRK 9
16 PG2
FB2 5
ON 6
CPOR 7
CFILTER 8
12 FB1
11 /POR
CPOR 10
10 /FAULT
CFILTER 11
9 GND
CDLY 12
MIC2584
16-Pin TSSOP (TS)
15 /POR
14 /FAULT
13 GND
MIC2585
24-Pin TSSOP (TS)
Pin Description
Pin Number
MIC2584
Pin Number
MIC2585
Pin Name
16
24
VCC1
Positive Supply (Input), Channel 1: This input is the main supply to the
internal circuitry and must be in the range of 2.3V to 13.2V. The GATE1 pin
is held low by an internal undervoltage lockout circuit until VCC1 and VCC2
exceed their respective undervoltage lockout threshold of 2.165V and 0.8V.
This input is protected up to 20V.
1
1
VCC2
Positive Supply (Input), Channel 2: The GATE2 pin is held low by an
internal undervoltage lockout circuit until VCC1 and VCC2 exceed their
respective undervoltage lockout threshold of 2.165V and 0.8V. This input
must be in the range of 1.0V to 13.2V and less than or equal to VCC1. This
input is protected up to 20V.
2, 15
2, 23
SENSE2, SENSE1
Circuit Breaker Sense (Inputs): A resistor between this pin and VCC1 and
VCC2 sets the current limit threshold for each channel. Whenever the
voltage across either sense resistor exceeds the slow trip current limit
threshold (VTRIPSLOW), the GATE voltage is adjusted to ensure a constant
load current. If VTRIPSLOW (50mV) is exceeded for longer than time period
tOCSLOW, then the circuit breaker is tripped and both GATE outputs are
immediately pulled low. If the voltage across either sense resistor exceeds
the fast trip circuit breaker threshold, VTRIPFAST, at any point due to fast,
high amplitude power supply faults, then both GATE outputs are immediately
brought low without delay. To disable the circuit breaker for either channel,
the SENSE and VCC pins can be tied together.
The default VTRIPFAST for either device is 100mV. Other fast trip thresholds
are available: 150mV, 200mV, or OFF (VTRIPFAST disabled). Please contact
factory for availability of other options.
6
8
ON
Enable (Input): Active High. The ON pin, an input to a Schmitt-triggered
comparator used to enable/disable the controller, is compared to a 1.235V
reference with 25mV of hysteresis. When a logic high is applied to the ON
pin (VON > 1.235V), a start-up sequence begins when the GATE1 and
GATE2 pins begin ramping up towards their final operating voltage. When
the ON pin receives a logic low signal (VON < 1.21V), the GATE pins are
grounded and /FAULT remains high if both inputs are above their respective
UVLO thresholds. The ON pin must be low for at least 20µs in order to
initiate a start-up sequence. Additionally, toggling the ON pin LOW to HIGH
resets the circuit breaker.
March 2005
Pin Function
3
MIC2584/2585
MIC2584/2585
Micrel
Pin Number
MIC2584
Pin Number
MIC2585
Pin Name
3, 14
3, 22
GATE2, GATE1
9
13
GND
7
10
CPOR
Power-On Reset Timer (Input): A capacitor connected between this pin and
ground sets the start-up delay (tSTART) and the power-on reset interval
(tPOR). Once the lagging supply rises above its UVLO threshold and ON
asserts, the capacitor connected to CPOR begins to charge. When the
voltage at CPOR crosses 0.3V, the start-up threshold (VSTART), a start cycle
is initiated as the GATE outputs begin to ramp while capacitor CPOR is
immediately discharged to ground. When the voltage at the lagging FB pin
rises above its threshold (VFB), capacitor CPOR begins to charge again.
When the voltage at CPOR rises above the power-on reset delay threshold
(VPOR) of 1.235V, the timer resets by pulling CPOR to ground and /POR is
deasserted. If CPOR = 0, then tSTART defaults to 20µs.
8
11
CFILTER
Current Limit Response Timer (Input): A capacitor connected to this pin
defines the period of time, tOCSLOW, in which an overcurrent event must last
to signal a fault condition and trip the circuit breaker. When an overcurrent
condition occurs, a 2.5µA current source begins to charge this capacitor. If
the voltage at this pin reaches 1.235V, the circuit breaker is tripped, both
GATE pins immediately shut off, and /FAULT is asserted. If CFILTER = 0,
then tOCSLOW defaults to 20µs.
5, 12
7, 18
FB2, FB1
Power-Good Threshold Input (Undervoltage Detect): FB1 and FB2 are
internally compared to 1.235V and 0.80V references with 25mV of hysteresis, respectively. External resistive divider networks may be used to set the
voltage at these pins. If either FB input momentarily goes below its threshold, then /POR is activated for one timing cycle, tPOR, indicating an output
undervoltage condition. The /POR signal deasserts one timing cycle after the
FB pin exceeds its power-good threshold by 25mV. A 5µs filter on these pins
prevents glitches from inadvertently activating the /POR signal.
10
14
/FAULT
Circuit Breaker Fault Status (Output): Active-Low, weak pull-up to VCC1 or
open-drain. Asserted when the circuit breaker is tripped due to an
overcurrent, undervoltage lockout, or overvoltage event. When deasserted,
the MIC2585 will initiate a new start cycle by toggling the ON pin.
11
15
/POR
Power-On Reset (Output): Active Low, weak pull-up to VCC1 or open drain.
This pin remains asserted during start-up until a time period (tPOR) after the
lagging FB pin threshold (VFB1 or VFB2) is exceeded. The timing capacitor
CPOR determines tPOR. When the output voltage monitored at either FB pin
falls below VFB, /POR is asserted for a minimum of one timing cycle (tPOR).
4, 13
5, 20
OUT2, OUT1
Output Voltage Monitor (Inputs): For output tracking, connect these pins to
their respective output to sense the output voltage.
N/A
12
CDLY
Output Sequence Delay Timer (Input): This pin is internally clamped to 6V.
A capacitor connected to this pin sets a timer delay, tDLY, between VOUT1
and VOUT2 as shown in Figure 5. With this pin pulled up to VCC1 through a
resistor, and if CGATE1 = CGATE2, both VOUT1 and VOUT2 ramp up and down
with the same dv/dt as depicted in the Tracking Mode diagram while
maintaining a maximum voltage differential between VOUT1 and VOUT2.
N/A
9
TRK
MIC2584/2585
Pin Function
Gate Drive (Outputs): Connect each output to the gates of external
N-Channel MOSFETs. When ON is asserted, a 14µA current source is
activated and begins to charge the gate of the N-Channel MOSFET connected
to this pin. An internal clamp ensures that no more than 10V is applied
between the GATE and Source when VCC1 or VCC2 is above 5V. When the
circuit breaker trips or when an input undervoltage lockout condition is
detected, the GATE1 and GATE2 pins are immediately brought low.
Ground: Tie to analog ground.
Discharge Tracking Mode Pin (Input): Tie this pin to OUT1 or OUT2 to
enable tracking during turn-off cycle. Ground this pin to disable tracking
during turn-off. The TRK pin is not to be used as a digital input.
4
March 2005
MIC2584/2585
Micrel
Pin Number
MIC2584
Pin Number
MIC2585
Pin Name
Pin Function
N/A
4, 21
OV2, OV1
Overvoltage Detect Inputs: Whenever the threshold voltage (VOV1, VOV2) on
either input is exceeded, the circuit-breaker is tripped while /FAULT is
asserted and the GATE1 and GATE2 outputs are immediately brought low.
N/A
6, 19
DIS2, DIS1
Discharge Outputs: When the ON pin receives a logic low signal
(deasserts), these pins provide a low impedance path to ground in order to
allow the discharging of any load capacitance. The DIS pins assert low if
TRK is less than 0.3V once ON has been deasserted. The typical DIS pin
resistance varies between 50Ω to 170Ω dependent upon input supply
voltage (see Electrical Table). An external resistor is required. See “Fast
Output Discharge for Capacitive Load” section in the Applications Information for more detail.
N/A
16, 17
PG2, PG1
Power-Good Outputs: Active-HIGH, weak pull-up to VCC1 or open-drain.
These outputs are asserted whenever the FB1 and FB2 thresholds are
exceeded and will not be asserted when FB1 and FB2 are below their
thresholds.
March 2005
5
MIC2584/2585
MIC2584/2585
Micrel
Absolute Maximum Ratings (Note1)
Operating Ratings (Note 2)
All voltages are referred to GND)
Supply Voltage (VCC1/VCC2) .......................... –0.3V to 20V
SENSE1/SENSE2 pins .............................. –0.3V to VCC1/2
TRK, ON, DIS1, DIS2, OUT1, OUT2,
/POR, /FAULT, PG1, PG2 pins .................. –0.3V to 15V
GATE1/GATE2 pin ......................................... –0.3V to 25V
All other input pins ........................................... -0.3V to 15V
DIS1/DIS2 current .................................................... ±25mA
Junction Temperature ............................................... 125°C
ESD Rating
Human body model ............................................... 1500V
Machine model ........................................................ 100V
Supply Voltage
VCC1 ......................................................................... 2.3V to 13.2V
VCC2 ......................................................................... 1.0V to 13.2V
Operating Temperature Range .................. –40°C to +85°C
Package Thermal Resistance
Rθ(JA), 16-pin TSSOP ....................................... 99.1°C/W
Rθ(JA), 24-pin TSSOP ....................................... 83.8°C/W
Electrical Characteristics (Note 4)
2.3V ≤ VCC1 ≤ 13.2V, 1.0V ≤ VCC2 ≤ 13.2V, TA = 25°C unless otherwise noted. Bold values indicate –40°C ≤ TA ≤ 85°C.
Symbol
Parameter
VCC1
Supply Voltage
ICC1
Supply Current
VCC2
Supply Voltage
ICC2
Supply Current
VUV1
VCC1 Undervoltage Lockout
Threshold
VUV1HYS
VCC1 Undervoltage Lockout
Hysteresis
VUV2
VCC2 Undervoltage Lockout
Threshold
VUV2HYS
VCC2 Undervoltage Lockout
Hysteresis
VTRIPSLOW
Slow Trip Overcurrent Threshold
VTRIPHYS
Slow Trip Overcurrent Hysteresis
VTRIPFAST
Fast Trip Overcurrent Threshold
Condition
Min
External Gate Drive
VCC2 ≤ VCC1
2.050
0.7
3
mA
13.2
V
0.05
0.15
mA
2.165
2.275
V
0.8
mV
0.9
30
VCCx – VSENSEx, VCC1 = VCC2 = 5V
42.5
50
x=J
VGATEx – VCCx
IGATEOFF
GATE Pin Sink Current
/FAULT asserted
90
100
V
mV
57.5
2.5
Start cycle
mV
mV
110
mV
x=K
150
mV
x=L
200
mV
VCC1 or VCC2 > 5V
6
8
10
V
VCC1 or VCC2 < 5V
3.5
4.5
8
V
–25
–14
–8
µA
50
Turn off (ON deasserted)
VTMR
V
200
GATE Pin Pull-up Current
ITMR
13.2
1.0
IGATE
Discharge Pin Resistance
Units
1.7
(GATE1 and GATE2)
RDIS
Max
2.3
VCC1 = VCC2 = 5V
VGATE
Typ
30
45
mA
70
µA
ON deasserted
VCCx = 2.3V
170
Ω
TRK < 0.3V
VCCx = 5.0V
70
Ω
VCCx = 13.2V
50
Ω
Overcurrent Timer Pin Charge
Current
VCCx – VSENSEx = 50mV
–3.5
–2.5
–1.5
µA
Overcurrent Timer Pin Discharge
Current
VCCx – VSENSEx = 25mV
1.5
2.5
3.5
µA
1.190
1.235
1.290
V
Overcurrent Timer Pin Threshold
MIC2584/2585
6
March 2005
MIC2584/2585
Micrel
Symbol
Parameter
Condition
ICPOR
Power-on Reset Current
VCC1 = 5V, CPOR = 0.5V
Charge current
Min
Typ
Max
Units
–3.5
–2.5
–1.5
µA
1.290
V
Sink current
Start-up cycle
2.5
VPOR
Power-on Reset Delay Threshold
1.190
1.235
VPORHYS
Power-on Reset Delay Threshold
Hysteresis
VSTART
Start-up Threshold
Start-up cycle
0.25
0.30
0.35
V
VTRK
TRK Pin Threshold
(MIC2585 only)
ON deasserted, IGATE > 10µA
VCC1 = VCC2 = 5V
0.25
0.30
0.35
V
VTRKOFF
TRK Pin Turn-off Voltage
(MIC2585 only)
ON asserted, VSENSE2 – VOUT2
VCC1 = VCC2 = 5V
150
250
400
mV
VFB1
FB1 Threshold
1.190
1.235
1.290
V
VFB1HYS
FB1 Threshold Hysteresis
VFB2
FB2 Threshold
VFB2HYS
FB2 Threshold Hysteresis
VOV1
OV1 Threshold
(MIC2585 only)
VOV1HYS
OV1 Threshold Hysteresis
(MIC2585 only)
VOV2
OV2 Threshold
(MIC2585 only)
VOV2HYS
OV2 Threshold Hysteresis
(MIC2585 only)
IDELAY
Delay Timer Pin Current
25
mV
25
0.75
0.80
mV
0.85
25
1.190
1.235
mV
1.290
25
0.75
0.80
(MIC2585 only)
Timer charge current
–9
Timer discharge current
VDELAY
Delay Timer Pin Threshold
(MIC2585 only)
VDLYHYS
Delay Timer Pin Threshold
Hysteresis (MIC2585 only)
VON
ON Pin Input Threshold
VONHYS
ON Pin Hysteresis
ION
ON Pin Input Current
VON = VCCX
VOL
/FAULT , /POR , PG1, PG2 Output
Low Voltage (PG1 and PG2 for
MIC2585 only)
IOUT = 1.6mA, VCC1 = 5V
IPULLUP
/FAULT , /POR , PG1, PG2 Active
Output Pull-up Current
(PG1 and PG2 for MIC2585 only)
ON asserted, VFB1 > 1.25V, VFB2 > 0.8V
/POR = VCC1 – 1V
VGATEWIN
GATE1 and GATE2 ON/OFF
Voltage Window (Tracking enabled)
Note 3
See Timing Diagram (Figure 2)
–6
V
mV
0.85
25
VCC1 = VCC2 = 5V
V
V
mV
–3
µA
1.290
V
200
1.190
1.235
25
1.190
1.235
mV
1.290
25
mV
0.5
µA
0.4
V
12
22
µA
100
250
mV
0.1
7
V
AC Parameters
tOCFAST
Fast Overcurrent Sense to GATE
Low Trip Time
VCCx – VSENSEx = 100mV, CGATE = 10nF
See Timing Diagram (Figure 3)
1
µs
tOCSLOW
Slow Overcurrent Sense to GATE
Low Trip Time
VCCx – VSENSEx = 50mV, CFILTER = 0
20
µs
Note 1.
Exceeding the absolute maximum rating may damage the device.
Note 2.
The device is not guaranteed to function outside its operating rating.
Note 3.
For the MIC2584, VGATEWIN is specified only when ON is asserted.
Note 4.
Specification for packaged product only.
March 2005
7
MIC2584/2585
MIC2584/2585
Micrel
Timing Diagrams
GATE1
GATE2
ON
OFF
GATE1 ON
GATE2 ON
GATE1 ON
GATE2 OFF
100mV
GATE1 OFF
GATE2 ON
VOUT1 - VOUT2
ON Pin Asserted
ON
OFF
GATE1 OFF
GATE2 OFF
100mV
GATE1 ON
GATE2 OFF
GATE1 OFF
GATE2 ON
VOUT1 - VOUT2
ON Pin Deasserted
Figure 2. Gate Voltage Window — Tracking Mode
VTRIPFAST
50mV
(VCCx – VSENSEx)
tOCFAST
tOCSLOW
VGATEx
0.5V
0.5V
Figure 3. Current Limit Response
VPOR
ON
VSTART
CPOR
tSTART
VPG[1/2]
VOUT[1,2]
PG[1/2]
tPOR
/POR
Figure 4. Start-Up Cycle Timing
VOUT1
∆V<0.25V
∆V<0.25V
VOUT2
Tracking Mode, TRK = VOUT1 or VOUT2
VOUT1,VOUT2
(-1) (-2)
∆V<0.25V
VFB
tDLY
VOUT2,VOUT1
(-1) (-2)
Sequencing/Tracking Mode, TRK = VOUT1 or VOUT2
(-1) - VOUT2 follows VOUT1
(-2) - VOUT1 follows VOUT2
Figure 5. Sequencing Modes (MIC2585 only)
MIC2584/2585
8
March 2005
MIC2584/2585
Micrel
Typical Characteristics
56
54
54
52
VCC1 = 5.0V
VCC1 = 13.2V
50
48
46 VCC1 = 2.3V
52
50
48 V
CC1 = 5.0V
46
VCC1 = 2.3V
54
52
VCC2 = 5.0V
VCC2 = 13.2V
50
VCC2 = 2.3V
48
46
VCC2 = 1.0V
44
42
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
42
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
42
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
VTRIPSLOW2–
vs. Temperature
VTRIPFAST1
vs. Temperature
VTRIPFAST2
vs. Temperature
VCC2 = 5.0V
VCC2 = 13.2V
VCC2 = 2.3V
50
48
46
44
106
104
102
100
VCC1 = 5.0V
98
96
VCC1 = 2.3V
94
92
VCC2 = 1.0V
42
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
90
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
VGATE1
VGATE2
vs. Temperature
20
vs. Temperature
VCC1 = 13.2V
17.5
15
VCC1 = 5.0V
12.5
10
VCC1 = 2.3V
7.5
Overcurrent Timer Threshold
vs. Temperature
VCC = 5.0V
1.24
1.23
VCC = 2.3V
1.22
1.21
1.2
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
March 2005
CPOR THRESHOLD1 (V)
VCC = 13.2V
17.5
VCC2 = 5.0V
12.5
VCC2 = 2.3V
7.5
0.32
UVLO1 and UVLO2
vs. Temperature
VCC1 = 5.0V
VCC1 = 2.3V
0.29
0.28
0.27
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
9
2
1.75
UVLO1–
1.5
1.25
1
UVLO2+
0.75
UVLO2–
0.5
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
1.3
VCC1 = 13.2V
0.31
0.3
VCC2 = 2.3V
UVLO1+
VCC2 = 13.2V
CPOR Threshold1 (Start-Up)
vs. Temperature
1.26
1.25
2.5
2.25
10
VCC2 = 5.0V
96
94
20
5
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
5
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
100
98
22.5
15
VCC2 = 13.2V
104
102
92
90
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
UVLO THRESHOLD (V)
22.5
108
106
CPOR THRESHOLD2 (V)
52
VTRIPFAST1 (mV)
54
110
VCC1 = 13.2V
VTRIPFAST2 (mV)
110
108
GATE VOLTAGE_2 (V)
VTRIPSLOW2– (mV)
56
VCC1 = 13.2V
44
56
GATE VOLTAGE_1 (V)
58
vs. Temperature
44
58
OVERCURRENT TIMER (V)
VTRIPSLOW2+
VTRIPSLOW1–
vs. Temperature
VTRIPSLOW2+ (mV)
58
56
VTRIPSLOW1– (mV)
VTRIPSLOW1+ (mV)
58
VTRIPSLOW1+
vs. Temperature
CPOR Threshold2
vs. Temperature
1.28
1.26
VCC2 = 13.2V
VCC2 = 5.0V
1.24
1.22
VCC2 = 2.3V
1.2
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
MIC2584/2585
MIC2584/2585
0.81
VCC2 = 13.2V
0.79
0.77
0.75 VCC2 = 5.0V
VCC2 = 2.3V
0.73
1.21
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
FB2 THRESHOLD (V)
VCC2=13.2V
0.79
0.77
VCC2=5.0V
VCC2=13.2V
0.75
VCC2=5.0V
0.73
FB2+
VCC2=2.3V
VCC2=2.3V
FB2–
OUTPUT LOW VOLTAGE (V)
0.4
VCC = 13.2V
2.7
2.6
VCC = 5.0V
2.5
2.4
VCC = 2.3V
2.3
2.2
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
OVERCURRENT TIMER CURRENT (µA)
2.8
Overcurrent Timer
Discharge Current
vs. Temperature
VCC = 5.0V
2.6
2.5
VCC = 2.3V
2.4
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
MIC2584/2585
VCC1=13.2V
VCC = 5.0V
0.1
VCC = 13.2V
Overcurrent Timer
Charge Current
vs. Temperature
VCC = 13.2V
-2.7
-2.6
VCC = 5.0V
-2.5
VCC = 2.3V
-2.3
-2.2
-2.1
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
3
1.2
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
Gate1 On Current
vs. Temperature
20
VCC1 = 5.0V
VCC1 = 2.3V
0.5
0
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
10
VCC = 5.0V
18
VCC = 13.2V
16
14
12
VCC = 2.3V
10
8
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
2.8
2.7
Power On Reset Current
vs. Temperature
VCC = 13.2V
VCC = 5.0V
2.6
2.5 VCC = 2.3V
2.4
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
120
VCC1 = 13.2V
1.5
1
22
Supply Current_1
vs. Temperature
2.5
2
FB1–
24
0.2
-2.4
VCC1=5.0V
1.21
Output Low Voltage
vs. Temperature
VCC = 2.3V
-2.8
Active Output Pull-Up Current
vs. Temperature
2.7
1.22
VCC1=2.3V
VCC1=5.0V
VCC1=2.3V
0.3
-2.9
2.8
VCC = 13.2V
1.23
0
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
SUPPLY CURRENT_1 (mA)
ACTIVE OUTPUT PULL-UP CURRENT (µA)
OVERCURRENT TIMER CURRENT (µA)
0.71
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
FB1+
1.24
0.71
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
FB2 Threshold
vs. Temperature
0.81
FB1 Threshold
vs. Temperature
VCC1=13.2V
0.83
GATE1 ON CURRENT (µA)
1.22
VCC1 = 5.0V
VCC1 = 2.3V
1.25
POWER ON RESET CURRENT (µA)
1.23
Overvoltage2
vs. Temperature
SUPPLY CURRENT_2 (µA)
VCC1 = 13.2V
1.24
OVERVOLTAGE2 (V)
0.85
FB1 THRESHOLD (V)
Overvoltage1
vs. Temperature
1.25
OVERVOLTAGE1 (V)
Micrel
Supply Current_2
vs. Temperature
110
100
VCC2 = 13.2V
90
80
70
60
50
40
30
VCC2 = 5.0V
VCC2 = 2.3V
20
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
March 2005
MIC2584/2585
Micrel
Test Circuit
IIN
RSENSEx
0.005Ω
VINx+
1
2
3
CINx
4.7µF
VINx–
IRF7822
(SO-8)
IOUT
VOUTx+
4
RLOAD
33kΩ
VCCx
0.01µF
ON
CLOAD
VOUTx–
SENSEx
GATEx
R1
MIC2585 OUTx
FBx
CDLY
CDLY
(optional)
CFILTER
8200pF
CPOR
GND
0.1µF
R2
(Not all pins shown for simplicity)
March 2005
11
MIC2584/2585
MIC2584/2585
Micrel
Functional Characteristics
Turn-On, Staggered Mode
(MIC2585-1BTS)
Turn-On (No Delay)
ON
2V/div
/POR
5V/div
/POR
5V/div
TIME (10ms/div.)
Turn-On (Channel 2)
Turn-On (Channel 1)
/FAULT
5V/div
/FAULT
5V/div
ON
5V/div
ON
5V/div
TIME (5ms/div.)
IIN1
VOUT1
2A/div 2V/div
IIN2
1A/div
VOUT2
1V/div
VCC1 = 5V
VCC2 = 3.3V
RL2 =1Ω
CL2 = 220µF
VCC1 = 5V
VCC2 = 3.3V
RL1 =1Ω
CL1 = 220µF
TIME (5ms/div.)
TIME (2.5ms/div.)
Turn-Off (Tracking Off)
Turn-Off (Tracking On)
ON
2V/div
VCC1 = 5V
VCC2 = 3.3V
RL1 = 1Ω
RL2 = 3Ω
CL1 = 2200µF
CL2 = 220µF
/POR
5V/div
VOUT1
/POR VOUT2
5V/div 2V/div
VOUT1
VOUT2
2V/div
ON
2V/div
VCC1 = 5V
VCC2 = 3.3V
RL1 = 1Ω
RL2 = 3Ω
CL1 = 2200µF
CL2 = 220µF
TIME (500µs/div.)
MIC2584/2585
VCC1 = 5V
VCC2 = 3.3V
CDLY = 47nF
RL1 = RL2 = OPEN
VOUT1
VOUT2
2V/div
VOUT1
VOUT2
2V/div
ON
5V/div
VCC1 = 5V
VCC2 = 3.3V
RL1 = 3.5Ω
RL2 = 1Ω
CL1 = CL2 = 220µF
TIME (1ms/div.)
12
March 2005
MIC2584/2585
Micrel
Turn-On Response (Hot Insert)
Power-On Reset Response
ON
5V/div
VOUT1
2V/div
FAULT
5V/div
VCC1
2V/div
VCC1 = 5V
VCC2 = 3.3V
CL = 250µF
RL = 5Ω
/POR PG1
2V/div 2V/div
IIN1
VOUT1
500mA/div 2V/div
22.5ms
VCC1 = 5V
VCC2 = 3.3V
RL1 =3.5Ω
CL1 = 220µF
CPOR = 47nF
TIME (5ms/div.)
Short-Circuit Crowbar Channel 1
(SCR enabled through a PNP from DIS pin-MIC2585-1BTS)
Short-Circuit Crowbar Channel 2
(SCR enabled through a PNP from DIS pin-MIC2585-1BTS)
/FAULT VOUT2
5V/div 2V/div
FAULT VOUT1
5V/div 5V/div
TIME (5ms/div.)
4.5A peak
3.88A peak
IIN1
1A/div
IIN2
1A/div
VCC1 = 5V
VCC2 = 3.3V
RL1 = 3.5Ω
RL2 = 1Ω
CL1 = CL2 = 220µF
VCC1 = 5V
VCC2 = 3.3V
RL1 = 3.5Ω
RL2 = 1Ω
CL1 = CL2 = 220µF
TIME (25µs/div.)
TIME (10µs/div.)
VCC1 = 5V
VCC2 = 3.3V
RL1 = 1Ω
RL2 = open
CL1 = 2200µF
CL2 = 220µF
6.04A peak
IIN1
2A/div
FAULT VGATE1 VOUT1
10V/div 10V/div 2V/div
Short-Circuit Response
TIME (25µs/div.)
March 2005
13
MIC2584/2585
MIC2584/2585
Micrel
Functional Diagram
MIC2585-J
Charge
Pump
1
SENSE1
VCC1
SENSE2
VCC2
22 (14)
GATE1
21V
23 (15)
+
–
24 (16)
Charge
Pump
2
10V
50mV
2 (2)
3 (3)
21V
+
–
1 (1)
GATE2
10V
50mV
20 (13)
Up & Down
Tracking
5 (4)
+
–
19
OUT1
OUT2
DIS1
100mV
+
–
VCC1
100mV
2.5µA
6
+
ITMR
VCC1
UVLO2
0.8V
UVLO1
2.165V
20µA
14 (10)
CFILTER
11 (8)
+
–
VREF
Logic
20µA
15 (11)
FB1
+
–
Glitch
Filter
20µA
17
7 (5)
+
–
Glitch
Filter
20µA
16
12
VCC1
2.5µA
CPOR
ON
PG1
VCC1
0.8V
CDLY
/POR
VCC1
13 (9)
18 (12)
VREF
FB2
/FAULT
VCC1
2.5µA
GND
DIS2
PG2
+
–
VREF
ICPOR
10 (7)
0.3V
+
–
+
–
VREF
+
–
+
–
VREF
+
–
8 (6)
+
–
9
TRK
0.3V
21
OV1
VREF
4
OV2
0.8V
1.235V
Reference
Pin numbers for MIC2584 are in parenthesis ( ) where applicable
MIC2584/2585
14
March 2005
MIC2584/2585
Micrel
This second timing cycle (tPOR) begins when the lagging
voltage exceeds its FB pin threshold (VFB). See Figure 4 in
the "Timing Diagrams". When the power supply is already
present (i.e., not a “hot swapping” condition) and the MIC2584/
85 device is enabled by applying a logic high signal at the ON
pin, the GATE outputs begin ramping immediately as the first
CPOR timing cycle is bypassed. Active current regulation is
employed to limit the inrush current transient response during
start-up by regulating the load current at the programmed
current limit value (See "Current Limiting and Dual-Level
Circuit Breaker" section). The following equation is used to
determine the nominal current limit value:
Functional Description
Hot Swap Insertion
When circuit boards are inserted into live system backplanes
and supply voltages, high inrush currents can result due to
the charging of bulk capacitance that resides across the
supply pins of the circuit board. This inrush current, although
transient in nature, may be high enough to cause permanent
damage to on-board components or may cause the system’s
supply voltages to go out of regulation during the transient
period which may result in system failures. The MIC2584 and
MIC2585 act as a controller for external N-Channel MOSFET
devices in which the gate drive is controlled to provide inrush
current limiting and output voltage slew rate control during hot
swap insertions.
Power Supply
VCC1 is the main supply input to the MIC2584/85 controller
with a voltage range of 2.3V to 13.2V. The VCC2 supply input
ranges from 1.0V to 13.2V and must be less than or equal to
VCC1 for operation. Both inputs can withstand transient
spikes up to 20V. In order to ensure stability of the supplies,
a minimum 1µF capacitor from each VCC to ground is
recommended. Alternatively, a low pass filter, shown in the
typical application circuit, can be used to eliminate high
frequency oscillations as well as help suppress transient
spikes.
Also, due to the existence of undetermined parasitic inductance in the absence of bulk capacitance, placing a Zener
diode at each VCC of the controller to ground in order to
provide external supply transient protection is strongly recommended. See the typical application circuit in Figure 1.
Start-Up Cycle
ILIM =
INRUSH ≅ IGATE ×
ICPOR
(2)
CLOAD
CGATE
≅ 14µA ×
CLOAD
CGATE
(3)
Load Capacitance Dominated Start-Up
In this case, the load capacitance (CLOAD) is large enough to
cause the inrush current to exceed the programmed current
limit but is less than the fast-trip threshold (or the fast-trip
threshold is disabled, ‘M’ option). During start-up under this
condition, the load current is regulated at the programmed
current limit value (ILIM) and held constant until the output
voltage rises to its final value. The output slew rate and
equivalent GATE voltage slew rate is computed by the
following equation:
Output Voltage Slew Rate, dVOUT /dt =
ILIM
CLOAD
(4)
where ILIM is the programmed current limit value. Consequently, the value of CFILTER must be selected to ensure that
the overcurrent response time, tOCSLOW, exceeds the time
needed for the output to reach its final value. For example,
given a MOSFET with an input capacitance CISS = CGATE =
2000pF, CLOAD is 1000µF, and ILIM is set to 5A with a 12V
input, then the load capacitance dominates as determined by
the calculated INRUSH > ILIM. Therefore, the output voltage
slew rate determined from Equation 4 is:
≅ 0.12 × CPOR (µF) (1)
where the start-up delay timer threshold (VSTART) is 0.3V,
and the Power-On Reset timer current (ICPOR) is 2.5µA. See
Table 2 for some typical supply contact start-up delays using
several standard value capacitors. As each GATE voltage
continues ramping toward its final value (VCC + VGS) at a
defined slew rate (See Load Capacitance/Gate Capacitance
Dominated Start-Up sections), a second CPOR timing cycle
begins if: 1)/FAULT is high and 2)CFILTER is low (i.e., not an
overvoltage, undervoltage lockout, or overcurrent state).
March 2005
50mV
RSENSE
where IGATE is the GATE pin pull-up current, CLOAD is the
load capacitance, and CGATE is the total GATE capacitance
(CISS of the external MOSFET and any external capacitor
connected from the MIC2584/85 GATE pin to ground).
During a hot insert of a PC board into a backplane or when the
main supply (VCC1) is powered up from a cold start, as the
voltage at the ON pin rises above its threshold (1.235V
typical), the MIC2584/85 first checks that both supply voltages are above their respective UVLO thresholds. If so, then
the device is enabled and an internal 2.5µA current source
begins charging capacitor CPOR to 0.3V to initiate a start-up
sequence. Once the start-up delay (tSTART) elapses, the
CPOR pin is pulled immediately to ground and a separate
14µA current source begins charging each GATE output to
drive the external MOSFET that switches VIN to VOUT. The
programmed contact start-up delay is calculated using the
following equation:
VSTART
RSENSE
=
where VTRIPSLOW is the current limit slow trip threshold found
in the electrical table and RSENSE is the selected value that
will set the desired current limit. There are two basic start-up
modes for the MIC2584/85: 1)Start-up dominated by load
capacitance and 2)start-up dominated by total gate capacitance. The magnitude of the inrush current delivered to the
load will determine the dominant mode. If the inrush current
is greater than the programmed current limit (ILIM), then load
capacitance is dominant. Otherwise, gate capacitance is
dominant. The expected inrush current may be calculated
using the following equation:
Supply Contact Delay
t START = CPOR ×
VTRIPSLOW
Output Voltage Slew Rate, (dVOUT /dt) =
15
5A
V
=5
100µF
ms
MIC2584/2585
MIC2584/2585
Micrel
and the resulting tOCSLOW needed to achieve a 12V output is
approximately 2.5ms. (See "Power-On Reset, Overcurrent
Timer, and Sequenced Output Delays" section to calculate
tOCSLOW).
GATE outputs shut down immediately, bypassing the
overcurrent timer period. To disable current limit and circuit
breaker operation, tie each channel’s SENSE and VCC pins
together and the CFILTER pin to ground.
Output Undervoltage Detection
The MIC2584/85 employ output undervoltage detection by
monitoring the output voltage through a resistive divider
connected at the FB pins. During turn on, while the voltage at
either FB pin is below its threshold (VFB), the /POR pin is
asserted low. Once both FB pin voltages cross their respective threshold (VFB), a 2.5µA current source charges capacitor CPOR. Once the CPOR pin voltage reaches 1.235V, the
time period tPOR elapses as pin CPOR is pulled to ground and
the /POR pin goes HIGH. If the voltage at either FB drops
below VFB for more than 10µs, the /POR pin resets for at least
one timing cycle defined by tPOR (See "Applications Information" for an example).
Input/Output Overvoltage Protection
The MIC2585 monitors and detects overvoltage conditions in
the event of excessive supply transients at the MIC2585
input(s)/output(s). Whenever the voltage threshold is exceeded at either OV1 or OV2 of the MIC2585, the circuit
breaker is tripped and both GATE outputs are immediately
brought low.
Power-On Reset, Overcurrent Timer, and Sequenced
Output Delays
The Power-On Reset delay, tPOR, is the time period for the
/POR pin to go HIGH once the lagging voltage exceeds the
power-good threshold (VFB) monitored at the FB pin. A
capacitor connected to CPOR sets the interval and is determined by using Equation 1 with VPOR substituted for VSTART.
The resulting equation becomes:
GATE Capacitance Dominated Start-Up
In this case, the value of the load capacitance relative to the
GATE capacitance is small enough such that during start-up
the output current never exceeds the current limit threshold
as determined by Equation 3. The minimum value of CGATE
that will ensure that the current limit is never exceeded is
given by the equation below:
I
CGATE (Min) = GATE × CLOAD
ILIMIT
Where CGATE is the summation of the MOSFET input capacitance (CISS) specification and the value of the capacitor
connected to the GATE pin of the MIC2584/85 (and MOSFET)
to ground. Once CGATE is determined, use the following
equation to determine the output slew rate
dVOUT/dt for gate capacitance dominated start-up:
dVOUT /dt =
IGATE
CGATE
Table 1 depicts the output slew rate for various values of CGATE.
IGATE = 14µA
CGATE
dVOUT/dt
0.001µF
14V/ms
0.01µF
1.4V/ms
0.1µF
0.14V/ms
1µF
0.014V/ms
Table 1. Output Slew Rate Selection for GATE
Capacitance Dominated Start-Up
tPOR = CPOR ×
Current Limiting and Dual-Level Circuit Breaker
Many applications will require that the inrush and steady state
supply current be limited at a specific value in order to protect
critical components within the system. Connecting a sense
resistor between the VCC and SENSE pins of each channel
sets the nominal current limit value for each channel of the
MIC2584/85 and the current limit is calculated using
Equation 2.
The MIC2584/85 also features a dual-level circuit breaker
triggered via 50mV and 100mV current limit thresholds sensed
across the VCC and SENSE pins. The first level of the circuit
breaker functions as follows. For the MIC2584/85, once the
voltage sensed across these two pins exceeds 50mV on
either channel, the overcurrent timer, its duration set by
capacitor CFILTER, starts to ramp the voltage at CFILTER
using a 2.5µA constant current source. If the voltage at
CFILTER reaches the overcurrent timer threshold (VTMR) of
1.235V, then CFILTER immediately returns to ground as the
circuit breaker trips and both GATE outputs are immediately
shut down. For the second level, if the voltage sensed across
VCC and SENSE of either channel exceeds 100mV
(–J option) at any time, the circuit breaker trips and both
MIC2584/2585
VPOR
ICPOR
≅ 0.5 × CPOR (µF)
(7)
where the Power-On Reset threshold (VPOR) and timer
current (ICPOR) are typically 1.235V and 2.5µA, respectively.
For the MIC2584/85, a capacitor connected to CFILTER is
used to set the timer which activates the circuit breaker during
overcurrent conditions. When the voltage across either sense
resistor exceeds the slow trip current limit threshold of 50mV,
the overcurrent timer begins to charge for a period, tOCSLOW,
determined by CFILTER. If tOCSLOW elapses, then the circuit
breaker is activated and both GATE outputs are immediately
pulled to ground. The following equation is used to determine
the overcurrent timer period, tOCSLOW.
V
t OCSLOW = CFILTER × TMR ≅ 0.5 × CFILTER (µF) (8)
ITMR
where VTMR, the overcurrent timer threshold, is 1.235V and
ITMR, the overcurrent timer current, is 2.5µA. If no capacitor
for CFILTER is used, then tOCSLOW defaults to 20µs.
16
March 2005
MIC2584/2585
Micrel
The sequenced output feature is enabled for the MIC2585 by
placing a capacitor from CDLY to ground. The –1 option
allows for VOUT2 to follow VOUT1 and the –2 option allows for
VOUT1 to follow VOUT2 during start-up (See "Timing Diagrams, Figure 5"). The sequenced output delay time is
determined using the following equation:
V
tDLY ≅ CDLY × DELAY ≅ 0.2 × CDLY (µF)
IDELAY
(9)
where VDELAY, the CDLY pin threshold, is typically 1.235V,
IDELAY, the CDLY pin charge current, is typically 6µA, and
CDLY is the capacitor connected to CDLY. Tables 2, 3, and 4
provide a quick reference for several timer calculations using
select standard value capacitors.
Undervoltage Lockout
Internal circuitry keeps both GATE output charge pumps off
until VCC1 and VCC2 exceed 2.165V and 0.8V, respectively.
CFILTER
tOCSLOW
220pF
110µs
680pF
340µs
1000pF
500µs
3300pF
1.6ms
0.01µF
5ms
0.047µF
23.5ms
0.1µF
50ms
0.33µF
165ms
Table 3. Selected Overcurrent Timer Delays
CDLY
tDLY
4700pF
950µs
0.01µF
2ms
CPOR
tSTART
tPOR
0.047µF
9.5ms
0.01µF
1.2ms
5ms
0.1µF
20ms
0.033µF
4ms
16.5ms
0.33µF
66ms
0.05µF
6ms
25ms
0.82µF
165ms
0.1µF
12ms
50ms
1µF
200ms
0.33µF
40ms
165ms
2.2µF
440ms
0.47µF
56ms
235ms
1µF
120ms
500ms
Table 4. Selected Sequenced Output Delays
Table 2. Selected Power-On Reset and
Start-Up Delays
March 2005
17
MIC2584/2585
MIC2584/2585
Micrel
up and power-down independent of the load capacitance of
each supply. See "Figure 2" of the "Timing Diagrams".
Wiring the TRK pin to either OUT1 or OUT2 of the MIC2585
enables the tracking feature. The OUT1 and OUT2 pins
provide output track sensing and are wired directly to the
output (source) of the external MOSFET for Channel 1 and
Channel 2, respectively.
The MIC2584/85 can also be used in systems that support
more than two supplies. Figure 7 illustrates the generic use
of two separate controllers configured to support four independent supply rails with an associated output timing response. The PG (or /POR) output of the first controller is used
to enable the second controller. As configured, a fault condition on either VOUT1 or VOUT2 will result in all channels being
shut down. For systems with multiple power sequencing
requirements, the controllers’ output tracking and sequencing features can be implemented in order to meet the system’s
timing demands.
Applications Information
Output Tracking and Sequencing
The MIC2585 is equipped with optional supply
settings: Tracking or Sequencing. There are many applications that require two supplies to track one another within a
specified maximum potential difference (or time) during powerup and power-down, such as in switching a processor on and
off. In many other systems and applications, supply sequencing during turn-on may be essential such as when a specific
circuit block (e.g., a system clock) requires available power
before another block of system circuitry. For either supply
configuration, the MIC2585 requires only one additional
component and can be used as an integrated solution to
traditional, and most often complex, discrete circuit solutions.
Additionally, the two optional supply settings may be combined to provide supply sequencing during start-up and
supply tracking during turn-off (see Figure 6 below). The
MIC2585 guarantees supply tracking within 250mV for power-
**Q1
Si4922DY (2)
(SO-8)
RSENSE1
0.007Ω
1 5%
VIN1
5V
3
*D1
(8V)
CLOAD1
1500µF
4
C1
1µF
**Q2
Si4922DY (1)
(SO-8)
RSENSE2
0.015Ω
5% 2
1
VIN2
1.8V
3
*D2
(6V)
VOUT1
5V@5A
R4
8.06kΩ
1%
VOUT2
1.8V@2A
CLOAD2
100µF
4
C2
1µF
24
R1
47kΩ
VCC1
23
1
VCC2
SENSE1
2
C4
0.022µF
SENSE2
GATE2
8
ON
OUT2
TRK
11
CFILTER
C5
0.01µF
FB2
MIC2585-1
5
9
7
R5
10.5kΩ
1%
GATE1
12
R2
39.2kΩ
1%
3
22
C3
0.022µF
CDLY
C6
0.1µF
OUT1
FB1
20
18
R3
15.8kΩ
1%
GND
13
Undervoltage (OUT1) = 4.4V
Undervoltage (OUT2) = 1.5V
Circuit Breaker Response Time = 5ms
Sequenced Output Delay = 20ms
*Diodes are BZX84C(x)V(x)
**Si4922DY is a dual Power MOSFET
Additional pins omitted for clarity
Figure 6. Output Sequencing/Tracking Combination
MIC2584/2585
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March 2005
MIC2584/2585
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Fast Output Discharge for Capacitive Loads
In many applications where a switch controller is turned off by
either removing the PCB from the backplane or the ON pin is
reset, capacitive loading will cause the output to retain
voltage unless a ‘bleed’ (low impedance) path is in place in
order to discharge the capacitance. The MIC2585 is equipped
with an internal MOSFET that allows the discharging of any
load capacitance to ground through a 50Ω to 170Ω path. The
discharge feature is configured by wiring the DIS pin to the
output (source) of the external MOSFET and is enabled if the
TRK pin is below 0.3V after the controller has been disabled
by a logic low signal received at the ON pin of Figure 1. See
the "Typical Application" circuit of Figure 1. A series resistor
is required from DIS to VOUT so that the maximum current of
25mA for the DIS pin is not exceeded.
Output Turn-Off Sequencing - No Tracking
There are many applications where it is necessary or desirable for the supply rails to sequence during turn-on and turnoff, as is the case with some microprocessor requirements.
The MIC2585 can be configured to allow one output to shut
off first, followed by the other output. Figure 8 illustrates an
example circuit that sequences OUT1 and OUT2 in a first on–
last off application. During start-up, capacitor CDLY allows for
VOUT1 to turn on followed by VOUT2 20ms later. Once the ON
pin receives a low signal by removing the PCB from the
backplane, or by an external processor signal, DIS1 and DIS2
will assert low. The external crowbar circuit connected from
the DIS2 pin will immediately bring VOUT2 to ground while
VOUT1 will discharge to ground through the 750Ω (680Ω
external, 70Ω internal) series path.
VIN1
MIC2585
GATE1
EN
ON
VOUT1
OUT1
VIN2
/FAULT
GATE2
PG
OUT2
ON
VOUT1/VOUT2
Short Circuit
on VOUT1
VOUT2
PG
VIN3
/FAULT
MIC2585
GATE1
ON
VOUT3
OUT1
VIN4
GATE2
/FAULT
OUT2
VOUT3/VOUT4
System Timing
VOUT4
Figure 7. Supporting More Than Two Supplies
March 2005
19
MIC2584/2585
MIC2584/2585
Micrel
Q1
IRF7822
(SO-8)
RSENSE1
0.012Ω
1 5% 2
VIN1
5V
3
*D1
(8V)
VOUT1
[email protected]
CLOAD1
220µF
4
C1
1µF
Q2
IRF7822
(SO-8)
RSENSE2
0.012Ω
5% 2
1
VIN2
3.3V
3
VOUT2
[email protected]
CLOAD2
220µF
4
C2
1µF
*D2
(8V)
24
VCC1
23
1
VCC2
SENSE1
R5
20.5kΩ
1%
2
SENSE2
GATE2
R1
33kΩ
3
C4
0.022µF
FB2
8
R6
8.66kΩ
1%
ON
OUT2
R2
47kΩ
11
7
CFILTER
MIC2585-1
DIS2
C5
0.01µF
5
R9
3.6kΩ
Q3
ZTX788A
R8
1.5kΩ
6
Q4
TCR22-4
C7
0.033µF
12
GATE1
22
DIS1
19
CDLY
C6
0.1µF
OUT1
GND
13
TRK
FB1
R3
39.2kΩ
1%
R7
680Ω
C3
0.022µF
R10
360Ω
20
18
R4
15.8kΩ
1%
9
Undervoltage (OUT1) = 4.4V
Undervoltage (OUT2) = 2.85V
Circuit Breaker Response Time = 5ms
Sequenced Output Delay (Turn-On) = 20ms
*Dual package Diode is AZ23C8V2
Resistors are 5% unless specified otherwise
Additional pins omitted for clarity
Figure 8. First On—Last Off Application Circuit
Output Undervoltage Detection
For output undervoltage detection, the first consideration is to
establish the output voltage level that indicates “power is
good.” For this example, the output value for which a 12V
supply will signal “good” is 10.5V. Next, consider the tolerances of the input supply and FB threshold (VFB). For this
example, given a 12V ±5% supply for Channel 1, the resulting
output voltage may be as low as 11.4V and as high as 12.6V.
Additionally, the FB1 threshold has ±50mV tolerance and
may be as low as 1.19V and as high as 1.29V. Thus, to
determine the values of the resistive divider network (R12
and R13) at the FB1 pin, shown in the typical application
circuit on page 1, use the following iterative design procedure.
1) Choose R13 so as to limit the current through
the divider to approximately 100µA or less.
VFB1(MAX)
2) Next, determine R12 using the output “good”
voltage of 10.5V and the following equation:
 (R12 + R13) 
VOUT1(Good) = VFB1(MAX) 

R13


Using some basic algebra and simplifying Equation 10 to
isolate R12, yields:
 V
 
OUT1(Good)
R12 = R13
 – 1
 VFB1(MAX)  


MIC2584/2585
(10.1)
where VFB1(MAX) = 1.29V, VOUT1(Good) = 10.5V, and R13 is
14.7kΩ. Substituting these values into Equation 10.1 now
yields R12 = 104.95kΩ. A standard 105kΩ ± 1% is selected.
Now, consider the 11.4V minimum output voltage, the lower
tolerance for R13 and higher tolerance for R12, 14.55kΩ and
106.05kΩ, respectively. With only 11.4V available, the voltage
sensed at the FB1 pin exceeds VFB1(MAX), thus the /POR and
PG1 (MIC2585) signals will transition from LOW to HIGH,
indicating “power is good” given the worse case tolerances of
this example. A similar approach should be used for Channel 2.
1.29V
≅ 12.9kΩ .
100µA
100µA
R13 is chosen as 14.7kΩ ± 1%.
R13 ≅
(10)
≅
20
March 2005
MIC2584/2585
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Input Overvoltage Protection
A similar design approach as the previous Undervoltage
Detection example is recommended for the overvoltage
protection circuitry, resistors R6 and R7 for OV1, in Figure 1.
For input overvoltage protection, the first consideration is to
establish the input voltage level that indicates an overvoltage
triggering a system (output voltage) shut down. For our
example, the input value for which the Channel 1 12V supply
will signal an “output shutdown” is 13.2V (+10%). Similarly,
from the previous example:
1) Choose R7 to satisfy 100µA condition.
VOV1(MIN)
the voltage sensed at the OV1 pin is below VOV1(MIN), and the
MIC2584/85 will not indicate an overvoltage condition until
VCC1 exceeds approximately 13.2V considering the given
tolerances. A similar approach should be used for Channel 2.
PCB Connection Sense
There are several configuration options for the MIC2584/85’s
ON pin to detect if the PCB has been fully seated in the
backplane before initiating a start-up cycle. In Figure 1, the
MIC2584/85 is mounted on the PCB with a resistive divider
network connected to the ON pin. R4 is connected to a short
pin on the PCB edge connector. Until the connectors mate,
the ON pin is held low which keeps the GATE output charge
pump off. Once the connectors mate, the resistor network is
pulled up to the input supply, 12V in this example, and the ON
pin voltage exceeds its threshold (VON) of 1.235V and the
MIC2584/85 initiates a start-up cycle. In Figure 9, the connection sense consisting of a discrete logic-level MOSFET
and a few resistors allows for interrupt control from the
processor or other signal controller to shut off the output of the
MIC2584/85. R4 pulls the GATE of Q2 to VIN and the ON pin
is held low until the connectors are fully mated. Once the
connectors fully mate, a logic LOW at the /ON_OFF signal
turns Q2 off and allows the ON pin to pull up above its
threshold and initiate a start-up cycle. Applying a logic HIGH
at the /ON_OFF signal will turn Q2 on and short the ON pin
of the MIC2584/85 to ground which turns off the GATE output
charge pump.
1.19V
≥ 11.9kΩ
100µA
100µA
R7 is chosen as 13.0kΩ ±1%
2) Thus, following the previous example and
substituting R6 and R7 for R12 and R13,
respectively, VOV1(MIN) for VFB1(MAX), and 13.2V
overvoltage for 10.5V output “good,” the same
formula yields R6 of 131.2kΩ. The nearest
standard 1% value is 130kΩ.
Now, consider the 12.6V maximum input voltage
(VCC1 +5%), the higher tolerance for R7 and lower tolerance
for R6, 13.13kΩ and 128.7kΩ, respectively. With 12.6V input,
R7 ≥
≥
Backplane PCB Edge
Connector Connector
VIN1
5V
RSENSE1
0.005Ω
1 5% 2
Long
Pin
3
C1
1µF
Q1
Si7892DP
(PowerPAK™ SO-8)
VOUT1
5V@7A
4
CLOAD1
1000µF
R5
10Ω
16
R4
20kΩ
VCC1
6
R1
33kΩ
R3
33Ω
/ON_OFF
15
SENSE1
GATE1
C2
0.01µF
R2
*Q2 33kΩ
MIC2584
Short
Pin
PCB Connection Sense
Medium or
Short Pin
GND
Long
Pin
OUT1
FB1
10
/FAULT
14
ON
/FAULT
CPOR
/POR
GND
7
9
C3
0.033µF
R6
27.4kΩ
1%
13
12
11
Downstream
Signal
R7
10.5kΩ
1%
CFILTER
8
C4
0.01µF
Undervoltage (Output) = 4.45V
/POR Delay = 16.5ms
START-UP Delay = 4ms
Circuit Breaker Response Time = 5ms
*Q2 is TN0201T (SOT-23)
Channel 2 and additional pins omitted for clarity.
Figure 9. PCB Connection Sense with ON/OFF Control
March 2005
21
MIC2584/2585
MIC2584/2585
Micrel
Higher UVLO Setting
Once a PCB is inserted into a backplane (power supply), the
internal UVLO circuit of the MIC2584/85 holds the GATE
output charge pump off until VCC1 exceeds 2.165V and
VCC2 exceeds 0.8V. If VCC1 falls below 1.935V or VCC2
falls below 0.77V, the UVLO circuit pulls the GATE output to
ground and clears the overvoltage and/or current limit faults.
For a higher UVLO threshold, the circuit in Figure 10 can be
used to delay the output MOSFET from switching on until the
desired input voltage is achieved. The circuit allows the
charge pumps to remain off until V IN1 exceeds
being simultaneously configured as outputs. In this case, the
output drivers of each device contend for control over sending
data along the bus which may cause excessive current to flow
in one of the paths (I1 or I2) shown in the bidirectional port of
Figure 11. Upon powering down the system, the core voltage
supply should turn off after the I/O as the bus control signal(s)
may enter an indeterminate state if the core is powered down
first. Thus, for power sequencing of a dual supply voltage
DSP implementing the MIC2585 (if VCORE ≥ VI/O), a circuit
similar to Figure 8 is recommended with the core voltage
supplied through Channel 1 and the I/O voltage supplied
through Channel 2. For systems with VCORE < VI/O, the
MIC2585-2 option with the I/O voltage through Channel 1 and
core through Channel 2 is used to implement the first on-last
off application.
Sense Resistor Selection
The MIC2584 and MIC2585 use a low-value sense resistor to
measure the current flowing through the MOSFET switch
(and therefore the load). This sense resistor is nominally set
at 50mV/ILOAD(CONT). To accommodate worst-case tolerances for both the sense resistor (allow ±3% over time and
temperature for a resistor with ±1% initial tolerance) and still
supply the maximum required steady-state load current, a
slightly more detailed calculation must be used.
The current limit threshold voltage (i.e., the “trip point”) for the
MIC2584/85 may be as low as 42.5mV, which would equate
to a sense resistor value of 42.5mV/ILOAD(CONT). Carrying the
numbers through for the case where the value of the sense
resistor is 3% high yields:
 R1
 × 1.235V provided that VCC2 has exceeded its
1+
 R2 
threshold. Both GATE drive outputs will be shut down when
 R1
 × 1.21V . In the example circuit , the
VIN1 falls below 1 +
R2 
rising UVLO threshold is set at approximately 9.0V and the
falling UVLO threshold is established as 8.9V. The circuit
consists of an external resistor divider at the ON pin that
keeps both GATE output charge pumps off until the voltage
at the ON pin exceeds its threshold (VON) and after the startup timer elapses.
Hot Swap Power Control for DSPs
In designing power supplies for dual supply logic devices,
such as a DSP, consideration should be given to the system
timing requirements of the core and I/O voltages for powerup and power-down operations. When power is provided to
the core and I/O circuit blocks in an unpredictable manner,
the effects can be detrimental to the life cycle of the DSP or
logic device by allowing unexpected current to flow in the core
and I/O isolation structures. Additionally, bus contention is
one of the critical system-level issues supporting the need for
power supply sequencing. Since the core supplies logic
control for the bus, powering up the I/O before the core may
result in both the DSP and an attached peripheral device
RSENSE(MAX) =
D1
(18V)
C1
1µF
R1
154kΩ
1%
3
Q1
IRF7822
(SO-8)
VCC1
41.3mV
ILOAD(CONT) (11)
VOUT1
12V@4A
4
16
CLOAD1
1000µF
R3
10Ω
15
SENSE1
GATE1
6
(1.03)(ILOAD(CONT) )
=
Once the value of RSENSE has been chosen in this manner,
it is good practice to check the maximum ILOAD(CONT) which
the circuit may let through in the case of tolerance build-up in
RSENSE1
0.010Ω
1 5% 2
VIN1
12V
42.5mV
R4
133kΩ
1%
14
C2
0.01µF
ON
MIC2584
R2
24.3kΩ
1%
FB1
12
R5
16.2kΩ
1%
GND
9
Undervoltage Lockout Threshold (rising) = 9.0V
Undervoltage Lockout Threshold (falling) = 8.9V
Undervoltage (Output) = 11.4V
Channel 2 and additional pins omitted for clarity.
Figure 10. Higher UVLO Setting
MIC2584/2585
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March 2005
MIC2584/2585
Micrel
the opposite direction. Here, the worst-case maximum current is found using a 57.5mV trip voltage and a sense resistor
that is 3% low in value. The resulting equation is:
ILOAD(CONT,MAX) =
57.5mV
(0.97)(RSENSE(NOM) )
=
MOSFET Voltage Requirements
The first voltage requirement for the MOSFET is easily stated:
the drain-source breakdown voltage of the MOSFET must be
greater than VIN(MAX). For instance, a 12V input may reasonably be expected to see high-frequency transients as high as
18V. Therefore, the drain-source breakdown voltage of the
MOSFET must be at least 19V. For ample safety margin and
standard availability, the closest minimum value will be 20V.
The second breakdown voltage criterion that must be met is a
bit subtler than simple drain-source breakdown voltage, but is
not hard to meet. In MIC2584/85 applications, the gate of the
external MOSFET is driven up to approximately 20V by the
internal output MOSFET (again, assuming 12V operation). At
the same time, if the output of the external MOSFET (its source)
is suddenly subjected to a short, the gate-source voltage will go
to (20V – 0V) = 20V. This means that the external MOSFET
must be chosen to have a gate-source breakdown voltage of
20V or more, which is an available standard maximum value.
However, if operation is above 12V, the 20V gate-source
maximum will likely be exceeded. As a result, an external Zener
diode clamp should be used to prevent breakdown of the
external MOSFET when operating at voltages above 10V. A
Zener diode with 10V rating is recommended as shown in
Figure 12. At the present time, most power MOSFETs with a
20V gate-source voltage rating have a 30V drain-source breakdown rating or higher. As a general tip, choose surface-mount
devices with a drain-source rating of 30V as a starting point.
Finally, the external gate drive of the MIC2584/85 requires a
low-voltage logic level MOSFET when operating at voltages
lower than 3V. There are 2.5V logic level MOSFETs available.
See Table 5, "MOSFET and Sense Resistor Vendors" for
suggested manufacturers.
59.3mV
RSENSE(NOM) (12)
As an example, if an output must carry a continuous 6A
without nuisance trips occurring, Equation 11
41.3mV
= 6.88mΩ . The next lowest
6A
standard value is 6mΩ. At the other set of tolerance extremes
for the output in question,
yields: RSENSE(MAX) =
59.3mV
= 9.88A . Knowing this final da6.0mΩ
tum, we can determine the necessary wattage of the sense
resistor using P = I2R, where I will be ILOAD(CONT, MAX), and
R will be (0.97)(RSENSE(NOM)). These numbers yield the
following: PMAX = (9.88A)2 (5.82mΩ) = 0.568W. In this example, a 1W sense resistor is sufficient.
MOSFET Selection
ILOAD(CONT,MAX) =
Selecting the proper external MOSFET for use with the
MIC2584/85 involves three straightforward tasks:
• Choice of a MOSFET which meets minimum
voltage requirements.
• Selection of a device to handle the maximum
continuous current (steady-state thermal issues).
• Verify the selected part’s ability to withstand any
peak currents (transient thermal issues).
CORE SUPPLY
(VCC)
I/O SUPPLY
(VDD)
VDD
VDD
Data In
Data In
I1
OUTPUT
DRIVER
CIRCUIT
BLOCK
OE
OUTPUT
DRIVER
CIRCUIT
BLOCK
I2
Data Out
External
Bus Control
CORE
OE
Data Out
TX_/RX
I/O
Dual Supply DSP
Peripheral
Figure 11. Bidirectional Port Bus Contention
March 2005
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MIC2584/2585
MIC2584/2585
Micrel
RON ≅ 10mΩ[1 + (110 - 25)(0.005)] ≅ 14.3mΩ
The final step is to make sure that the heat sinking available
to the MOSFET is capable of dissipating at least as much
power (rated in °C/W) as that with which the MOSFET’s
performance was specified by the manufacturer. Here are a
few practical tips:
1. The heat from a surface-mount device such as
an SO-8 MOSFET flows almost entirely out of
the drain leads. If the drain leads can be soldered down to one square inch or more, the
copper will act as the heat sink for the part. This
copper must be on the same layer of the board
as the MOSFET drain.
2. Airflow works. Even a few LFM (linear feet per
minute) of air will cool a MOSFET down substantially. If you can, position the MOSFET(s)
near the inlet of a power supply’s fan, or the
outlet of a processor’s cooling fan.
3. The best test of a surface-mount MOSFET for
an application (assuming the above tips show it
to be a likely fit) is an empirical one. Check the
MOSFET's temperature in the actual layout of
the expected final circuit, at full operating
current. The use of a thermocouple on the drain
leads, or infrared pyrometer on the package, will
then give a reasonable idea of the device’s
junction temperature.
MOSFET Transient Thermal Issues
Having chosen a MOSFET that will withstand the imposed
voltage stresses, and the worse case continuous I2R power
dissipation which it will see, it remains only to verify the
MOSFET’s ability to handle short-term overload power dissipation without overheating. A MOSFET can handle a much
MOSFET Steady-State Thermal Issues
The selection of a MOSFET to meet the maximum continuous
current is a fairly straightforward exercise. First, arm yourself
with the following data:
• The value of ILOAD(CONT, MAX.) for the output in
question (see "Sense Resistor Selection").
• The manufacturer’s data sheet for the candidate
MOSFET.
• The maximum ambient temperature in which the
device will be required to operate.
• Any knowledge you can get about the heat
sinking available to the device (e.g., can heat be
dissipated into the ground plane or power plane,
if using a surface-mount part? Is any airflow
available?).
The data sheet will almost always give a value of on resistance given for the MOSFET at a gate-source voltage of 4.5V,
and another value at a gate-source voltage of 10V. As a first
approximation, add the two values together and divide by two
to get the on-resistance of the part with 8V of enhancement.
Call this value RON. Since a heavily enhanced MOSFET acts
as an ohmic (resistive) device, almost all that’s required to
determine steady-state power dissipation is to calculate I2R.
The one addendum to this is that MOSFETs have a slight
increase in RON with increasing die temperature. A good
approximation for this value is 0.5% increase in RON per °C
rise in junction temperature above the point at which RON was
initially specified by the manufacturer. For instance, if the
selected MOSFET has a calculated RON of 10mΩ at a
TJ = 25°C, and the actual junction temperature ends up
at 110°C, a good first cut at the operating value for RON
would be:
Q1
IRF7822
(SO-8)
RSENSE1
0.006Ω
1 5% 2
VIN
12V
D1
(18V)
3
*D2
1N5240B
10V
4
CLOAD1
220µF
C1
1µF
R1
33kΩ
16
VCC1
R3
10Ω
15
SENSE1
GATE1
6
VOUT
12V@6A
14
R4
100kΩ
1%
C2
0.01µF
ON
MIC2584
FB1
R2
33kΩ
/POR
CPOR
12
11
DOWNSTREAM
SIGNAL
R5
13.3kΩ
1%
GND
7
9
C3
0.05µF
Undervoltage (Output) = 11.0V
/POR Delay = 25ms
START-UP Delay = 6ms
*Recommended for MOSFETs with gate-source
breakdown of 20V or less for catastrophic output
short circuit protection. (IRF7822 VGS(MAX) = 12V)
Channel 2 and additional pins omitted for clarity.
Figure 12. Zener Clamped MOSFET Gate
MIC2584/2585
24
March 2005
MIC2584/2585
Micrel
higher pulsed power without damage than its continuous
dissipation ratings would imply. The reason for this is that, like
everything else, thermal devices (silicon die, lead frames,
etc.) have thermal inertia.
In terms related directly to the specification and use of power
MOSFETs, this is known as “transient thermal impedance,”
or Zθ(J-A). Almost all power MOSFET data sheets give a
Transient Thermal Impedance Curve. For example, take the
following case: VIN = 12V, tOCSLOW has been set to 100msec,
ILOAD(CONT. MAX) is 1.2A, the slow-trip threshold is 50mV
nominal, and the fast-trip threshold is 100mV. If the output is
accidentally connected to a 6Ω load, the output current from
the MOSFET will be regulated to 1.2A for 100ms (tOCSLOW)
before the part trips. During that time, the dissipation in the
MOSFET is given by:
P = E x I EMOSFET = [12V-(1.2A)(6Ω)] = 4.8V
PMOSFET = (4.8V x 1.2A) = 5.76W for 100msec.
At first glance, it would appear that a really hefty MOSFET is
required to withstand this sort of fault condition. This is where
the transient thermal impedance curves become very useful.
Figure 13 shows the curve for the Vishay (Siliconix) Si4410DY,
a commonly used SO-8 power MOSFET.
Taking the simplest case first, we’ll assume that once a fault
event such as the one in question occurs, it will be a long time,
10 minutes or more, before the fault is isolated and the
channel is reset. In such a case, we can approximate this as
a “single pulse” event, that is to say, there’s no significant duty
cycle. Then, reading up from the X-axis at the point where
“Square Wave Pulse Duration” is equal to 0.1sec (=100msec),
we see that the Zθ(J-A) of this MOSFET to a highly infrequent
event of this duration is only 8% of its continuous Rθ(J-A).
This particular part is specified as having an Rθ(J-A) of
50°C/W for intervals of 10 seconds or less. Thus:
Assume TA = 55°C maximum, 1 square inch of copper at the
drain leads, no airflow.
Assume it has been carrying just about 1.2A for some time.
When performing this calculation, be sure to use the highest
anticipated ambient temperature (TA(MAX)) in which the
MOSFET will be operating as the starting temperature, and
find the operating junction temperature increase (∆TJ) from
that point. Then, as shown next, the final junction temperature
is found by adding TA(MAX) and ∆TJ. Since this is not a closedform equation, getting a close approximation may take one or
two iterations, But it’s not a hard calculation to perform, and
tends to converge quickly.
Then the starting (steady-state)TJ is:
TJ ≅ TA(MAX) + ∆TJ
≅ TA(MAX) + [RON + (TA(MAX) – TA)(0.005/°C)(RON)]
x I2 x Rθ(J-A)
TJ ≅ 55°C + [17mΩ + (55°C-25°C)(0.005)(17mΩ)]
x (1.2A)2 x (50°C/W)
TJ ≅ (55°C + (0.02815W)(50°C/W)
≅ 54.6°C
Iterate the calculation once to see if this value is within a few
percent of the expected final value. For this iteration we will
start with TJ equal to the already calculated value of 54.6°C:
TJ ≅ TA + [17mΩ + (54.6°C-25°C)(0.005)(17mΩ)]
x (1.2A)2 x (50°C/W)
TJ ≅ ( 55°C + (0.02832W)(50°C/W) ≅ 56.42°C
So our original approximation of 56.4°C was very close to the
correct value. We will use TJ = 56°C.
Finally, add (5.76W)(50°C/W)(0.08) = 23°C to the steady-state
TJ to get TJ(TRANSIENT MAX.) = 79°C. This is an acceptable
maximum junction temperature for this part.
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
Recalling from our previous approximation hint, the part has
an RON of (0.0335/2) = 17mΩ at 25°C.
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
t1
1. Duty Cycle, D =
t2
2. Per Unit Base = RthJA = 50¡ C/W
0.02
3. TJM —TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10—4
10—3
10—2
10—1
1
10
30
Square Wave Pulse Duration (sec)
Figure 13. Transient Thermal Impedance
March 2005
25
MIC2584/2585
MIC2584/2585
Micrel
PCB Layout Considerations
Because of the low values of the sense resistors used with the
MIC2584/85 controllers, special attention to the layout must
be used in order for the device’s circuit breaker function to
operate properly. Specifically, the use of a 4-wire Kelvin
connection to accurately measure the voltage across RSENSE
is highly recommended. Kelvin sensing is simply a means of
making sure that any voltage drops in the power traces
connecting to the resistors does not get picked up by the
traces themselves. Additionally, these Kelvin connections
should be isolated from all other signal traces to avoid
introducing noise onto these sensitive nodes. Figure 14
illustrates a recommended, multi-layer layout for the RSENSE,
Power MOSFET, timer(s), and feedback network connections. The feedback network resistor values are selected for
a 12V application. Many hot swap applications will require
load currents of several amperes. Therefore, the power (VCC
and Return) trace widths (W) need to be wide enough to allow
the current to flow while the rise in temperature for a given
copper plate (e.g., 1oz. or 2oz.) is kept to a maximum of
10°C ~ 25°C. Also, these traces should be as short as
possible in order to minimize the IR drops between the input
and the load. For a starting point, there are many trace width
calculation tools available on the web such as the following
link:
http://www.aracnet.com/cgi-usr/gpatrick/trace.pl
Finally, the use of plated-through vias will be needed to make
circuit connections to power and ground planes when utilizing
multi-layer PC boards.
Current Flow
to the Load
Current Flow
to the Load
*POWER MOSFET
(SO-8)
*SENSE RESISTOR
(2512)
W
D
G
D
S
D
S
D
S
W
Via to
GND plane
**RGATE
SENSE1
GATE1
OUT1
12
11
10
9
GND
13
/FAULT
14
/POR
15
FB1
16
VCC1
MIC2584
**CGATE
12.4k
1%
Via to
GND plane
93.1k
1%
Current Flow
from the Load
W
DRAWING IS NOT TO SCALE
Similar considerations should be used for Channel 2.
*See Table 5 for part numbers and vendors.
**Optional components.
Trace width (W) guidelines given in "PCB Layout Recommendations" section of the datasheet.
Figure 14. Recommended PCB Layout for Sense Resistor, Power MOSFET and Feedback Network
MIC2584/2585
26
March 2005
MIC2584/2585
Micrel
MOSFET and Sense Resistor Vendors
Device types and manufacturer contact information for power
MOSFETs and sense resistors is provided in Table 5. Some
of the recommended MOSFETs include a metal heat sink on
the bottom side of the package that is connected to the drain
leads. The recommended trace for the MOSFET gate of
Figure 14 must be redirected when using MOSFETs packaged in this style. Contact the device manufacturer for
package information.
MOSFET Vendors
Vishay (Siliconix)
Key MOSFET Type(s)
Si4420DY (SO-8 package)
Si4442DY (SO-8 package)
Si3442DV (SO-8 package)
Si7860DP (PowerPAK™ SO-8)
Si7892DP (PowerPAK™ SO-8)
Si7884DP (PowerPAK™ SO-8)
SUB60N06-18 (TO-263)
SUB70N04-10 (TO-263)
*Applications
IOUT ≤ 10A
IOUT = 10A-15A, VCC ≤ 5V
IOUT ≤ 3A, VCC ≤ 5V
IOUT ≤ 12A
IOUT ≤ 15A
IOUT ≤ 15A
IOUT ≥ 20A, VCC ≥ 5V
IOUT ≥ 20A, VCC ≥ 5V
Contact Information
www.siliconix.com
(203) 452-5664
International Rectifier
IRF7413 (SO-8 package)
IRF7457 (SO-8 package)
IRF7822 (SO-8 package)
IRLBA1304 (Super220™)
IOUT ≤ 10A
IOUT ≤ 10A
IOUT = 10A-15A, VCC ≤ 5V
IOUT ≥ 20A, VCC ≥ 5V
www.irf.com
(310) 322-3331
Fairchild Semiconductor
FDS6680A (SO-8 package)
FDS6690A (SO-8 package)
PH3230 (SOT669-LFPAK)
HAT2099H (LFPAK)
IOUT ≤ 10A
IOUT ≤ 10A, VCC ≤ 5V
IOUT ≥ 20A
IOUT ≥ 20A
www.fairchildsemi.com
(207) 775-8100
www.philips.com
www.halsp.hitachi.com
(408) 433-1990
Philips
Hitachi
* These devices are not limited to these conditions in many cases, but these conditions are provided as a helpful reference for customer applications.
Resistor Vendors
Vishay (Dale)
IRC
March 2005
Sense Resistors
“WSL” Series
Contact Information
www.vishay.com/docswsl_30100.pdf
(203) 452-5664
“OARS” Series
www.irctt.com/pdf_files/OARS.pdf
“LR” Series
www.irctt.com/pdf_files/LRC.pdf
(second source to “WSL”)
(828) 264-8861
Table 5. MOSFET and Sense Resistor Vendors
27
MIC2584/2585
MIC2584/2585
Micrel
Package Information
Rev. 01
16-Pin TSSOP (TS)
DIMENSIONS:
MM (INCH)
4.50 (0.177)
6.4 BSC (0.252)
4.30 (0.169)
0.30 (0.012)
0.19 (0.007)
7.90 (0.311)
7.70 (0.303)
0.65 BSC
(0.026)
1.10 MAX (0.043)
0.20 (0.008)
0.09 (0.003)
1.00 (0.039) REF
8°
0°
0.15 (0.006)
0.05 (0.002)
0.70 (0.028)
0.50 (0.020)
24-Pin TSSOP (TS)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
USA
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
MIC2584/2585
28
March 2005