ON CM1213A-02SO 1-, 2- and 4-channel low capacitance esd protection array Datasheet

1-, 2- and 4-Channel Low Capacitance
ESD Protection Arrays
CM1213A
Features
•
•
•
•
•
•
•
•
One, two, and four channels of ESD protection
Note: For 6- and 8-channel devices, see the
CM1213 datasheet.
Provides ESD protection to IEC61000-4-2
Level 4
•
±8kV contact discharge
Low channel input capacitance of 0.85pF typical
Minimal capacitance change with temperature
and voltage
Channel input capacitance matching of 0.02pF
typical is ideal for differential signals
Zener diode protects supply rail and eliminates
the need for external by-pass capacitors
Each I/O pin can withstand over 1000 ESD
strikes*
Available in SOT, SC70, and MSOP RoHScompliant, lead-free packages
Applications
•
•
•
•
•
•
USB2.0 ports at 480Mbps in desktop PCs,
notebooks and peripherals
IEEE1394 Firewire ports at 400Mbps /
800Mbps
DVI ports, HDMI ports in notebooks, set top
boxes, digital TVs, LCD displays
Serial ATA ports in desktop PCs and hard disk
drives
PCI Express ports
General purpose high-speed data line ESD
protection
Product Description
The CM1213A family of diode arrays has been
designed to provide ESD protection for electronic
components or subsystems requiring minimal
capacitive loading. These devices are ideal for
protecting systems with high data and clock rates or
for circuits requiring low capacitive loading. Each
ESD channel consists of a pair of diodes in series
which steer the positive or negative ESD current
pulse to either the positive (VP) or negative (VN)
supply rail. A Zener diode is embedded between VP
and VN, offering two advantages. First, it protects the
VCC rail against ESD strikes, and second, it eliminates
the need for a bypass capacitor that would otherwise
be needed for absorbing positive ESD strikes to
ground. The CM1213A will protect against ESD
pulses up to 8kV per the IEC 61000-4-2 standard.
These devices are particularly well-suited for
protecting systems using high-speed ports such as
USB 2.0, IEEE1394 (Firewire, iLink ), Serial ATA,
DVI, HDMI and corresponding ports in removable
storage, digital camcorders, DVD-RW drives and
other applications where extremely low loading
capacitance with ESD protection are required in a
small package footprint.
The CM1213A family of devices is available with
RoHS-compliant, lead-free finishing.
Block Diagram
©2010 SCILLC. All rights reserved.
April 2010 – Rev. 5
Publication Order Number:
CM1213A/D
CM1213A
Package/Pinout Diagrams
Pin Descriptions
1-CHANNEL, 3-LEAD SOT23-3 PACKAGE (CM1213A-01SO)
PIN
NAME
TYPE
1
CH1
I/O
2
VP
3
VN
DESCRIPTION
ESD Channel
1
CH1
I/O
PWR
Positive voltage supply rail
2
VN
GND
GND
Negative voltage supply rail
3
CH2
I/O
4
CH3
I/O
5
VP
PWR
6
CH4
I/O
2-CHANNEL, 4-LEAD SOT143-4 PACKAGE (CM1213A-02SR)
PIN
4-CH, 6-LEAD SOT23-6 (CM1213A-04SO) AND SC70-6 (CM1213A04S7)
PIN
NAME
TYPE
DESCRIPTION
NAME
TYPE
DESCRIPTION
1
VN
GND
2
CH1
I/O
ESD Channel
PIN
NAME
TYPE
3
CH2
I/O
ESD Channel
1
CH1
I/O
4
VP
PWR
Positive voltage supply rail
2
NC
3
VP
PWR
I/O
Negative voltage supply rail
CH2
5
NC
No Connect
6
CH3
Negative voltage supply rail
7
NC
I/O
ESD Channel
8
VN
GND
I/O
ESD Channel
9
CH4
I/O
Positive voltage supply rail
10
NC
TYPE
1
NC
2
VN
GND
3
CH1
4
CH2
5
VP
PWR
ESD Channel
Positive voltage supply rail
ESD Channel
Rev. 5 | Page 2 of 14 | www.onsemi.com
DESCRIPTION
ESD Channel
No Connect
4
NAME
ESD Channel
4-CHANNEL, 10-LEAD MSOP-10 PACKAGE (CM1213A04MR)
DESCRIPTION
2-CHANNEL, 5-LEAD SOT23-5 PACKAGE (CM1213A-02SO)
PIN
ESD Channel
Negative voltage supply rail
Positive voltage supply rail
ESD Channel
No Connect
I/O
ESD Channel
No Connect
Negative voltage supply rail
ESD Channel
No Connect
CM1213A
Ordering Information
PART NUMBERING INFORMATION
Lead-free Finish
1
# of Channels
Leads
Package
Ordering Part Number
Part Marking
1
3
SOT23-3
CM1213A-01SO
D231
2
4
SOT143-4
CM1213A-02SR
D232
2
5
SOT23-5
CM1213A-02SO
D233
4
6
SOT23-6
CM1213A-04SO
D234
4
6
SC70-6
CM1213A-04S7
D38
4
10
MSOP-10
CM1213A-04MR
D237
Note 1: Parts are shipped in Tape and Reel form unless otherwise specified.
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Operating Supply Voltage (VP - VN)
RATING
UNITS
6.0
V
Operating Temperature Range
–40 to +85
°C
Storage Temperature Range
–65 to +150
°C
(VN - 0.5) to (VP + 0.5)
V
DC Voltage at any channel input
STANDARD OPERATING CONDITIONS
PARAMETER
Operating Temperature Range
Package Power Rating
SOT23-3, SOT143-4,SOT23-5, SOT23-6, and SC70-6 Packages
MSOP-10 Package
Rev. 5 | Page 3 of 14 | www.onsemi.com
RATING
UNITS
–40 to +85
°C
225
400
mW
mW
CM1213A
ELECTRICAL OPERATING CHARACTERISTICS
SYMBOL PARAMETER
(SEE NOTE 1)
CONDITIONS
MIN
TYP
MAX
UNITS
3.3
5.5
V
8.0
µA
0.80
0.80
0.95
0.95
V
V
0.1
1.0
µA
1.2
pF
VP
Operating Supply Voltage (VP-VN)
IP
Operating Supply Current
(VP-VN)=3.3V
VF
Diode Forward Voltage
Top Diode
Bottom Diode
IF = 8mA; TA=25°C
ILEAK
Channel Leakage Current
TA=25°C; VP=5V, VN=0V
CIN
Channel Input Capacitance
At 1 MHz, VP=3.3V, VN=0V,
VIN=1.65V; Note 2
0.85
∆C
Channel Input Capacitance Matching
At 1 MHz, VP=3.3V, VN=0V,
VIN=1.65V; Note 2
0.02
VESD
ESD Protection - Peak Discharge Voltage at
any channel input, in system
Contact discharge per
IEC 61000-4-2 standard
TA=25°C; Notes 2, 3, and 4
Channel Clamp Voltage
Positive Transients
Negative Transients
TA=25°C, IPP = 1A,
tP = 8/20µS;
Notes 2 and 4
+10
–1.7
V
V
Dynamic Resistance
Positive Transients
Negative Transients
IPP = 1A, tP = 8/20µS
Any I/O pin to Ground;
Notes 2 and 4
0.9
0.5
Ω
Ω
0.60
0.60
IN
VCL
RDYN
Note 1: All parameters specified at TA = –40°C to +85°C unless otherwise noted.
Note 2: Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330Ω, VP = 3.3V, VN grounded.
Note 3: These measurements performed with no external capacitor on VP (VP floating).
Rev. 5 | Page 4 of 14 | www.onsemi.com
pF
kV
8
CM1213A
Performance Information
Input Channel Capacitance Performance Curves
Rev. 5 | Page 5 of 14 | www.onsemi.com
CM1213A
Performance Information (cont’d)
Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment)
Figure 1. Insertion Loss (S21) VS. Frequency (0V DC Bias, VP=3.3V)
Figure 2. Insertion Loss (S21) VS. Frequency (2.5V DC Bias, VP=3.3V)
Rev. 5 | Page 6 of 14 | www.onsemi.com
CM1213A
Application Information
Design Considerations
In order to realize the maximum protection against ESD pulses, care must be taken in the PCB layout to
minimize parasitic series inductances on the Supply/Ground rails as well as the signal trace segment between
the signal input (typically a connector) and the ESD protection device. Refer to Error! Reference source not
found., which illustrates an example of a positive ESD pulse striking an input channel. The parasitic series
inductance back to the power supply is represented by L1 and L2. The voltage VCL on the line being protected is:
VCL
=
Fwd
+ L2 x d(IESD) / dt
voltage
drop
of
D1
+
VSUPPLY
+
L1
x
d(IESD)
/
dt
where IESD is the ESD current pulse, and VSUPPLY is the positive supply voltage.
An ESD current pulse can rise from zero to its peak value in a very short time. As an example, a level 4 contact
discharge per the IEC61000-4-2 standard results in a current pulse that rises from zero to 30 Amps in 1ns. Here
-9
d(IESD)/dt can be approximated by ∆IESD/∆t, or 30/(1x10 ). So just 10nH of series inductance (L1 and L2 combined)
will lead to a 300V increment in VCL!
Similarly for negative ESD pulses, parasitic series inductance from the VN pin to the ground rail will lead to
drastically increased negative voltage on the line being protected.
The CM1213A has an integrated Zener diode between VP and VN. This greatly reduces the effect of supply rail
inductance L2 on VCL by clamping VP at the breakdown voltage of the Zener diode. However, for the lowest
possible VCL, especially when VP is biased at a voltage significantly below the Zener breakdown voltage, it is
recommended that a 0.22µF ceramic chip capacitor be connected between VP and the ground plane.
As a general rule, the ESD Protection Array should be located as close as possible to the point of entry of
expected electrostatic discharges. The power supply bypass capacitor mentioned above should be as close to
the VP pin of the Protection Array as possible, with minimum PCB trace lengths to the power supply, ground
planes and between the signal input and the ESD device to minimize stray series inductance.
Additional Information
See also California Micro Devices Application Note AP209, “Design Considerations for ESD Protection,” in the
Applications section at www.calmicro.com.
Figure 3. Application of Positive ESD Pulse Between Input Channel and Ground
Rev. 5 | Page 7 of 14 | www.onsemi.com
CM1213A
Mechanical Details
The CM1213A is available in SOT23-3, SOT143-4, and SOT23-5, SOT23-6, SC70-6, and MSOP-10 lead-free
packages.
SOT23-3 Mechanical Specifications, 3 pin
The CM1213A-01SO is supplied in a 3-pin SOT23 package. Dimensions are presented below.
PACKAGE DIMENSIONS
Package
SOT23-3 (JEDEC name is TO-236)
JEDEC No.
TO-236 (Var. AB)
Pins/Leads
3
Dimensions
Millimeters
Inches
Min
Max
Min
Max
A
0.89
1.12
0.0350
0.0441
A1
0.01
0.10
0.0004
0.0039
b
0.30
0.50
0.0118
0.0197
c
0.08
0.20
0.0031
0.0079
D
2.80
3.04
0.1102
0.1197
E
2.10
2.64
0.0827
0.1039
E1
1.20
1.40
0.0472
0.0551
e
0.95 BSC
0.0374 BSC
e1
1.90 BSC
0.0748 BSC
L
L1
# per tape
and reel
0.40
0.60
0.54 REF
0.0157
0.0236
0.0213 REF
3000 pieces
Package Dimensions for SOT23-3
Controlling dimension: millimeters
Rev. 5 | Page 8 of 14 | www.onsemi.com
CM1213A
Tape and Reel Specifications
PART NUMBER
PACKAGE SIZE
(mm)
POCKET SIZE (mm)
B0 X A0 X K0
TAPE WIDTH
W
REEL
DIAMETER
QTY PER
REEL
P0
P1
CM1213A-01SO
2.92 X 2.37 X 1.01
2.77 X 3.15 X 1.22
8mm
178mm (7")
3000
4mm
4mm
Rev. 5 | Page 9 of 14 | www.onsemi.com
CM1213A
Mechanical Details (Cont’d)
SOT143-4 Mechanical Specifications, 4 pin
The CM1213A-02SR is packaged in a 4-pin SOT143 package. Dimensions are presented below.
PACKAGE DIMENSIONS
Package
SOT143
Pins
4
Dimensions
Millimeters
Inches
Min
Max
Min
Max
A
0.80
1.22
0.031
0.048
A1
0.05
0.15
0.002
0.006
b
0.30
0.50
0.012
0.019
b2
0.76
0.89
0.030
0.035
c
0.08
0.20
0.003
0.008
D
2.80
3.04
0.110
0.119
E
2.10
2.64
0.082
0.103
E1
1.20
1.40
0.047
0.055
e
1.92 BSC
0.075 BSC
e1
0.20 BSC
0.008 BSC
L
L1
# per tape
and reel
0.4
0.6
0.54 REF
0.016
0.024
0.021 REF
3000 pieces
Package Dimensions for SOT143
Controlling dimension: millimeters
Rev. 5 | Page 10 of 14 | www.onsemi.com
CM1213A
Tape and Reel Specifications
PART NUMBER
PACKAGE SIZE
(mm)
POCKET SIZE (mm)
B0 X A0 X K0
TAPE WIDTH
W
REEL
DIAMETER
QTY PER
REEL
P0
P1
CM1213A-02SR
2.92 X 2.37 X 1.01
2.60 X 3.15 X 1.20
8mm
178mm (7")
3000
4mm
4mm
Rev. 5 | Page 11 of 14 | www.onsemi.com
CM1213A
Mechanical Details (cont’d)
SOT23-5 Mechanical Specifications, 5 pin
The CM1213A-02SO is supplied in a 5-pin SOT23 package. DImensions are presented below.
*
PACKAGE DIMENSIONS
Package
SOT23-5
JEDEC
No.
MO-178 (Var. AA)
Leads
5
Millimeters
Dim.
Inches
Min
Nom
Max
Min
Nom
Max
A
1.14
1.24
1.35
0.045
0.049
0.053
A1
0.05
0.10
0.15
0.002
0.004
0.006
A2
1.09
1.14
1.19
0.043
0.045
0.047
b
0.30
0.35
0.40
0.012
0.014
0.016
c
0.08
0.15
0.22
0.003
0.006
0.009
D
2.87
2.92
2.97
0.113
0.115
0.117
E
2.67
2.79
2.92
0.105
0.110
0.115
E1
1.55
1.63
1.68
0.061
0.064
0.066
e
0.95 REF
0.020 REF
e1
1.90 REF
0.075 REF
L
0.35
0.40
0.45
0.014
0.016
0.018
L1
0.53
0.58
0.64
0.021
0.023
0.025
# per
tape and
reel
Package Dimensions for SOT23-5
3000 pieces
Controlling dimension: millimeters
Rev. 5 | Page 12 of 14 | www.onsemi.com
CM1213A
Tape and Reel Specifications
PART NUMBER
PACKAGE SIZE
(mm)
POCKET SIZE (mm)
B0 X A0 X K0
TAPE WIDTH
W
REEL
DIAMETER
QTY PER
REEL
P0
P1
CM1213A-02SO
2.92 X 2.79 X 1.24
3.20 X 3.20 X 1.40
8mm
178mm (7")
3000
4mm
4mm
Rev. 5 | Page 13 of 14 | www.onsemi.com
CM1213
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any
products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising
out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical”
parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating
parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the
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Rev. 5 | Page 14 of 14 | www.onsemi.com
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