UMS CHR3764-QEG 21-27ghz down-converter Datasheet

CHR3764-QEG
RoHS COMPLIANT
21-27GHz Down-Converter
GaAs Monolithic Microwave IC in SMD leadless package
Description
The CHR3764-QEG is a multifunction
monolithic circuit, which integrates a
balanced cold FET mixer, a multiplier by two,
and a RF LNA including gain control.
It is designed for a wide range of
applications, typically ISM and commercial
communication systems.
The circuit is manufactured with a pHEMT
process, 0.25µm gate length, via holes
through the substrate, air bridges and
electron beam gate lithography.
It is supplied in RoHS compliant SMD
package.
UMS
R3764
YYWW
Main Features
18
16
■ Broadband RF performance 21-26.5GHz
■ 13dB conversion gain
■ 3.1dB Noise Figure, for IF>0.1GHz
■ 1dBm Input IP3
■ 14dB Gain Control
■ 15dBc Image Rejection
■ DC bias: Vd=4Volt @ Id=320mA
■ 24L-QFN4x5
■ MSL1
14
12
Conversion gain (dB)
10
8
6
4
2
0
-2
-4
GCx=-1.5V
GCx= -0.7V
GCx= -0.5V
GCx=0V
GCx= -0.6V
-6
-8
-10
16
17
18
19
20
21
22
23
24
25
26
27
28
RF Frequency (GHz)
Main Characteristics
Tamb.= +25°C, Vd = 4V
Symbol
Parameter
FRF
RF frequency range
FOL
LO frequency range
FIF
IF frequency range
NF
Noise Figure@ min. att., for IF>0.1GHz
Ref. : DSCHR3764-QEG1263 - 20 Sep 11
1/18
Min
21
8.5
DC
Typ
3.0
Max
26.5
15
3.5
Unit
GHz
GHz
GHz
dB
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
CHR3764-QEG
21-27GHz Down-Converter
Electrical Characteristics
Tamb = +25°C, VD = VDL = 4V
Symbol
Parameter
Min
Typ
Max
Unit
FRF
RF frequency range
21
26.5
GHz
FOL
LO frequency range
8.5
15
GHz
FIF
IF frequency range
DC
3.5
GHz
GC
Conversion Gain @ min. attenuation
9
13
dB
Gain control range
14
dB
G
Noise Figure @ min. att. from 21 to 24GHz,
3.1
3.6
dB
for IF>0.1GHz
NF
Noise Figure @ min. att. from 24 to 26.5GHz,
3.6
4.1
dB
for IF>0.1GHz
Im_rej
Image rejection (1)
15
dBc
PLO
LO Input power
0
5
dBm
Input IP3 @ min. attenuation
0
2
dBm
IIP3
-4
-2
dBm
Input IP3 @ all gain range (G)
2LO/RF 2LO leakage at RF port @ max. gain
30
dBc
RLRF
RF Return loss
-10
dB
RLOL
LO Return loss
-8
dB
VD, VDL DC drain voltage
4
V
Id
Drain current (ID + IDL)
320
mA
VGL
LNA DC gate voltage (2)
-0.6
V
GC2,3
Gain control DC voltage
-2
-1.5
0
V
VGM
Mixer DC gate voltage
-0.7
V
These values are representative of onboard measurements as defined on the drawing in
paragraph "Evaluation mother board".
(1)
An external combiner 90° is required on IF ports, I / Q.
Typical VGL value for IDL = 75mA
See in paragraph “ biasing option” other possibility to optimise differently the performances
(2)
Note: Id is not affected by gain control (GC2, GC3).
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Specifications subject to change without notice
CHR3764-QEG
21-27GHz Down-Converter
Absolute Maximum Ratings (1)
Tamb.= +25°C
Symbol
Parameter
VD
Drain bias voltage
Id
Drain bias current
VGL
LNA DC gate voltage
VGM
Mixer DC gate voltage
GC2,3
Gain control voltage
PRF
Maximum peak input power overdrive
PLO
Maximum LO input power
Tj
Junction temperature (2)
Ta
Operating temperature range
Tstg
Storage temperature range
(1)
Operation of this device above anyone of these parameters
damage.
(2)
See “Device thermal performances”
Values
Unit
5
V
450
mA
-2 to +0.4
V
-2 to +0.4
V
-2 to +0.8
V
10
dBm
10
dBm
175
°C
-40 to +85
°C
-55 to +150
°C
may cause permanent
Typical Bias Conditions
Tamb.= +25°C
Symbol
Pad No
VDL, VD
10, 12
Id
10, 12
VGL
9
VGM
11
GC2, GC3
7, 8
Parameter
DC drain voltages
Total drain current
DC gate voltage
DC gate voltage
Gain control DC voltage
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Values
4
320
-0.4
-0.7
-2 to +0
Unit
V
mA
V
V
V
Specifications subject to change without notice
CHR3764-QEG
21-27GHz Down-Converter
Device thermal performances
All the figures given in this section are obtained assuming that the QFN device is cooled
down only by conduction through the package thermal pad (no convection mode considered).
The temperature is monitored at the package back-side interface (Tcase) as shown below.
The system maximum temperature must be adjusted in order to guarantee that Tcase
remains below than the maximum value specified in the next table. So, the system PCB must
be designed to comply with this requirement.
A derating must be applied on the dissipated power if the Tcase temperature cannot be
maintained below than the maximum temperature specified (see the curve Pdiss. Max) in
order to guarantee the nominal device life time (MTTF).
DEVICE THERMAL SPECIFICATION : CHR3764-QEG
Recommended max. junction temperature (Tj max)
:
143
Junction temperature absolute maximum rating
:
175
Max. continuous dissipated power (Pdiss. Max.)
:
1.3
=> Pdiss. Max. derating above Tcase(1)= 85
°C :
22
Junction-Case thermal resistance (Rth J-C)(2)
:
<45
Minimum Tcase operating temperature(3)
:
-40
Maximum Tcase operating temperature(3)
:
85
Minimum storage temperature
:
-55
Maximum storage temperature
:
150
°C
°C
W
mW/°C
°C/W
°C
°C
°C
°C
(1) Derating at junctio n temperature co nstant = Tj max.
(2) Rth J-C is calculated fo r a wo rst case co nsidering the ho t t e s t junc t io n o f the M M IC and all the devices biased.
(3) Tcase=P ackage back side temperature measured under the die-attach-pad (see the drawing belo w).
1.4
1
0.8
0.6
0.4
0.2
Pdiss. Max. @Tj <Tj max (W)
0
-50
-25
0
25
50
75
100
125
150
175
Pdiss. Max. @Tj <Tj max (W)
1.2
Tcase
Example: QFN 16L 3x3
Location of temeprature
reference point (Tcase)
on package's bottom side
Tcase (°C)
6.0
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Specifications subject to change without notice
CHR3764-QEG
21-27GHz Down-Converter
Typical Board Measurements
Tamb = +25°C, VD = VDL = 4V, VGL = -0.6V, VGM = -0.7V, P_LO = 0dBm
Board is defined on the drawing at paragraph “Evaluation mother board”. The board losses
are de-embedded. The results are given in the package access planes.
Conversion Gain in Supradyne Mode versus RF Frequency & GCx
F_RF = 2xF_LO+F_IF, F_IF = 1.5GHz
18
16
14
12
Conversion gain (dB)
10
8
6
4
2
0
-2
-4
GCx=-1.5V
GCx= -0.7V
GCx= -0.5V
GCx=0V
GCx= -0.6V
-6
-8
-10
16
17
18
19
20
21
22
23
24
25
26
27
28
RF Frequency (GHz)
Conversion Gain in Infradyne Mode versus RF Frequency & GCx
RF = 2xF_LO-F_IF, F_IF = 1.5GHz
18
16
14
12
Conversion gain (dB)
10
8
6
4
2
0
-2
-4
GCx=-1.5V
GCx= -0.7V
GCx= -0.5V
GCx=0V
GCx= -0.6V
-6
-8
-10
16
17
18
19
20
21
22
23
24
25
26
27
28
RF Frequency (GHz)
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CHR3764-QEG
21-27GHz Down-Converter
Typical Board Measurements
Tamb = +25°C, VD = VDL = 4V, VGL = -0.6V, VGM = -0.7V, P_LO = 0dBm
Noise Figure at min. att. versus Frequency
F_RF = 2xF_LO-F_IF & F_RF = 2xF_LO+F_IF, F_IF = 1.5GHz, GCx = -1.5V
10
9
8
Noise Figure (dB)
7
6
5
4
3
2
USB
1
LSB
0
20
21
22
23
24
25
26
27
RF Frequency (GHz)
Image Rejection on Supradyne & Infradyne Mode versus Frequency
F_IF = 1.5GHz, GCx = -1.5V
35
30
Image rejection (dBc)
25
20
15
10
LSB
USB
5
0
16
17
18
19
20
21
22
23
24
25
26
27
28
RF Frequency (GHz)
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CHR3764-QEG
21-27GHz Down-Converter
Typical Board Measurements
Tamb = +25°C, VD = VDL = 4V, VGL = -0.6V, VGM = -0.7V, P_LO = 0dBm
Input IP3 versus Frequency at GCx = -1.5V
F_RF = 2xF_LO-F_IF, F_IF = 1.5GHz
16
14
12
Input IP3 (dBm)
10
8
6
4
2
0
19.5GHz
22.5GHz
23.5GHz
24.5GHz
25.5GHz
26.5GHz
-2
-4
-6
-28
-26
-24
-22
-20
-18
-16
-14
-12
-10
Input Power DCL (dBm)
Input IP3 versus GCx
F_RF = 2xF_LO-F_IF, F_RF = 25.5GHz, F_IF = 1.5GHz
16
14
12
Input IP3 (dBm)
10
8
6
4
2
0
-2
-2V
-4
-0.7V
-0.6V
-0.5V
-0.3V
-6
-28
-26
-24
-22
-20
-18
-16
-14
-12
-10
Input Power DCL (dBm)
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CHR3764-QEG
21-27GHz Down-Converter
Typical Board Measurements
Tamb = +25°C, VD = VDL = 4V, VGL = -0.6V, VGM = -0.7V, P_LO = 0dBm
IMD3 versus GCx
F_RF = 2xF_LO-F_IF, F_RF = 25.5GHz, F_IF = 1.5GHz
80
75
70
65
IMD3 (dBc)
60
55
50
45
40
35
30
25
20
-2V
15
-0.7V
-0.6V
-0.5V
-0.3V
10
-28
-26
-24
-22
-20
-18
-16
-14
-12
-10
Input Power DCL (dBm)
RF & LO return loss
0
-2
-4
Return losses (dB)
-6
-8
-10
-12
RF at max. gain
-14
RF at min. gain
-16
LO
-18
-20
0
5
10
15
20
25
30
Frequency (GHz)
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CHR3764-QEG
21-27GHz Down-Converter
Typical Board Measurements
Tamb = +25°C, VD = VDL = 4V, VGL = -0.6V, VGM = -0.7V, P_LO = 0dBm
Spurious on IF outputs
RF = 2LO + IF
P_RF = -20dBm / P_LO = 0dBm @12GHz
mRF
0
1
2
0
xx
26
>50
nLO
2
20
>55
>55
1
37
49
>50
3
41
39
>60
4
37
52
23
All values in dBc below IF power level (IF = 1.5GHz).
Data measured without external hybrid coupler.
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CHR3764-QEG
21-27GHz Down-Converter
Temperature Board Measurements
T = [-40, +25, 85] °C, VD = VDL = 4V, VGL = -0.6V, VGM = -0.7V, P_LO = 0dBm
Board is defined on the drawing at paragraph “Evaluation mother board”. The board losses
are de-embedded. The results are given in the package access planes.
Conversion Gain in Supradyne Mode versus Frequency
F_RF = 2xF_LO+F_IF, F_IF = 1.5GHz, GCx = -1.5V & 0V
Board losses de-embedded (result given on package access planes)
20
18
16
14
Conversion gain (dB)
12
10
8
6
4
2
0
-2
-4
-40°C
+25°C
+85°C
-40°C
+25°C
+85°C
-6
-8
-10
16
17
18
19
20
21
22
23
24
25
26
27
28
RF Frequency (GHz)
Conversion Gain in Infradyne Mode versus Frequency
RF = 2xF_LO-F_IF, F_IF = 2.0GHz, GCx = -1.5V & 0V
Board losses de-embedded (result given on package access planes)
20
18
16
14
Conversion gain (dB)
12
10
8
6
4
2
0
-2
-4
-6
-8
-40°C
+25°C
+85°C
-40°C
+25°C
+85°C
-10
16
17
18
19
20
21
22
23
24
25
26
27
28
RF Frequency (GHz)
Ref. : DSCHR3764-QEG1263 - 20 Sep 11
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CHR3764-QEG
21-27GHz Down-Converter
Temperature Board Measurements
T = [-40, +25, 85] °C, VD = VDL = 4V, VGL = -0.6V, VGM = -0.7V, P_LO = 0dBm
Noise Figure in Supradyne Mode at min. att. versus Frequency
F_RF = 2xF_LO+F_IF, F_IF = 1.5GHz, GCx = -1.5V
Board losses de-embedded (result given on package access planes)
7
6
Noise Figure (dB)
5
4
3
2
1
85°C
25°C
-40°C
0
20
21
22
23
24
25
26
27
RF Frequency (GHz)
Image Rejection on Supradyne Mode versus Frequency
F_IF = 1.5GHz, GCx = -1.5V
Image rejection (dBc)
35
30
25
20
15
-40°C
10
+25°C
5
+85°C
0
16
17
18
19
20
21
22
23
24
25
26
27
28
RF Frequency (GHz)
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CHR3764-QEG
21-27GHz Down-Converter
Temperature Board Measurements
T = [-40, +25, 85] °C, VD = VDL = 4V, VGL = -0.6V, VGM = -0.7V, P_LO = 0dBm
Input IP3 versus Temperature at GCx = -1.5V
F_RF = 2xF_LO-F_IF, F_RF = 25.5GHz, F_IF = 1.5GHz
10
8
6
IIP3 (dBm)
4
2
0
-2
-4
85°C
25°C
-40°C
-6
-8
-28
-26
-24
-22
-20
-18
-16
-14
-12
-10
Input Power DCL (dBm)
LO leakage (dBm)
LO & 2LO leakage at GCx = -1.5V
At RF port and T= 25°C
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
2LO
LO
16
18
20
22
24
26
28
RF Frequency (GHz)
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CHR3764-QEG
21-27GHz Down-Converter
Package outline (1)
Matt tin, Lead Free
Units :
From the standard :
(Green)
mm
JEDEC MO-220
(VGGD)
25- GND
12345678-
Nc
Nc
Nc
GND(2)
RF in
GND(2)
GC3
GC2
910111213141516-
VGL
VDL
VGM
VD
Nc
GND(2)
LO in
GND(2)
1718192021222324-
Nc
Nc
Nc
IF_I out
GND(2)
IF_Q out
Nc
Nc
(1)
The package outline drawing included to this data-sheet is given for indication. Refer to the
application note AN0017 (http://www.ums-gaas.com) for exact package dimensions.
(2)
It is strongly recommended to ground all pins marked “Gnd” through the PCB board.
Ensure that the PCB board is designed to provide the best possible ground to the package.
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CHR3764-QEG
21-27GHz Down-Converter
Evaluation mother board
■ Compatible with the proposed footprint.
■ Based on typically Ro4003 / 8mils or equivalent.
■ Using a micro-strip to coplanar transition to access the package.
■ Recommended for the implementation of this product on a module board.
■ Decoupling capacitors of 10nF ±10% are recommended for all DC accesses.
■ See application note AN0017 for details.
Hybrid coupler 90° 1-2GHz
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CHR3764-QEG
21-27GHz Down-Converter
Notes
16 15
NC
GND
17
LO IN
NC
19 18
GND
NC
NC
Due to ESD protection circuits on RF and LO inputs, an external capacitance might be
requested to isolate the product from external voltage that could be present on these
accesses in the application.
14 13
IF_I
20
12 VD
GND
21
11
VGM
IF_Q
22
10
VDL
NC
23
9
VGL
NC
24
8
GC2
NC
5
6
7
GC3
NC
4
GND
3
RF IN
2
GND
1
NC
X2
ESD protections are implemented on gate accesses.
The DC connections do not include any decoupling capacitor in package, therefore it is
mandatory to provide a good external DC decoupling on the PC board with SMT capacitor,
as close as possible to the package. Recommended value is 10nF
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CHR3764-QEG
21-27GHz Down-Converter
DC Schematic
LNA (4V, 75mA)
VDL=4V
2k
45
17
22
16mA
310
26mA
33mA
64
3.4k
3.4k
3.3k
2.8k
GC2
[-1.5;0.5V]
GC3
[-1.5;0.5V]
VGL~ -0.53V
LO Buffer (4V, 245mA)
VD= 4V
Differential
Amplifier
Differential
Multiplier
85mA
Buffer 1
60mA
Buffer 2
25mA
75mA
1k
25
960
5.5
8
1k
40
40
510
185
100
1.6k
15
16
960
510
725
25
5.5
220
100
40
15
190
100
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CHR3764-QEG
21-27GHz Down-Converter
Biasing Options
In order to improve the conversion gain and the noise figure, the biasing could be tuned.
VGL voltage allows controlling IDL current.
Table below gives the typical value for main characteristics.
Parameter
VD=VDL= 4.0V
IDL= 75mA
VD=VDL= 4.5V
IDL= 110mA
Conversion Gain@min. att. (dB)
Noise Figure@min. att. from 17 to 24GHz (dB)
Input IP3@min. att. (dBm)
VGL (V)
ID (mA)
ID + IDL (mA)
Total DC power consumption (mW)
13
3.1
1
-0.6
245
320
1280
14
3.0
2
-0.4
250
360
1620
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CHR3764-QEG
21-27GHz Down-Converter
Recommended package footprint
Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot
print recommendations.
SMD mounting procedure
For the mounting process standard techniques involving solder paste and a suitable reflow
process can be used. For further details, see application note AN0017.
Recommended environmental management
Refer to the application note AN0019 available at http://www.ums-gaas.com for
environmental data on UMS package products.
Recommended ESD management
Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD
sensitivity and handling recommendations for the UMS package products.
Ordering Information
QFN 4x5 RoHS compliant package:
CHR3764-QEG/XY
Stick: XY = 20
Tape & reel: XY = 21
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors
S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of
patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use
as critical components in life support devices or systems without express written approval from United
Monolithic Semiconductors S.A.S.
Ref. : DSCHR3764-QEG1263 - 20 Sep 11
18/18
Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
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