TI BQ2002ESN Nicd/nimh fast-charge management ic Datasheet

bq2002E/G
NiCd/NiMH Fast-Charge Management ICs
Features
General Description
➤
The bq2002E and bq2002G FastCharge ICs are low-cost CMOS battery-charge controllers providing reliable charge termination for both NiCd
and NiMH battery applications. Controlling a current-limited or constant-current supply allows the
bq2002E/G to be the basis for a costeffective stand-alone or system-integrated charger. The bq2002E/G integrates fast charge with optional top-off
and pulsed- trickle control in a single
IC for charging one or more NiCd or
NiMH battery cells.
Fast charge of nickel cadmium
or nickel-metal hydride batteries
➤
Direct LED output displays
charge status
➤
Fast-charge termination by -∆V,
maximum voltage, maximum
temperature, and maximum
time
➤
Internal band-gap voltage reference
➤
Optional top-off charge
➤
Selectable pulse trickle charge
rates
➤
Low-power mode
➤
8-pin 300-mil DIP or 150-mil
SOIC
Pin Connections
Fast charge is initiated on application
of the charging supply or battery replacement. For safety, fast charge is
inhibited if the battery temperature
and voltage are outside configured
limits.
Fast charge is terminated by any of
the following:
n
Peak voltage detection (PVD)
n
Negative delta voltage (-∆V)
n
Maximum voltage
n
Maximum temperature
n
Maximum time
After fast charge, the bq2002E/G optionally tops-off and pulse-trickles the
battery per the pre-configured limits.
Fast charge may be inhibited using
the INH pin. The bq2002E/G may
also be placed in low-standby-power
mode to reduce system power consumption.
T h e b q 2 0 0 2 E d i f f e rs f ro m t he
bq2002G only in that a slightly different set of fast-charge and top-off
time limits is available. All differences between the two ICs are illustrated in Table 1.
Pin Names
TM
1
8
CC
LED
2
7
INH
BAT
3
6
VCC
VSS
4
5
TS
TM
Timer mode select input
TS
Temperature sense input
LED
Charging status output
VCC
Supply voltage input
BAT
Battery voltage input
INH
Charge inhibit input
VSS
System ground
CC
Charge control output
8-Pin DIP or
Narrow SOIC
PN-200201.eps
bq2002E/G Selection Guide
TCO
HTF
LTF
bq2002E 0.175 ∗
VCC
Part No.
LBAT
0.5 ∗
VCC
0.6 ∗
VCC
None
bq2002G 0.175 ∗
VCC
0.5 ∗
VCC
0.6 ∗
VCC
None
-∆V PVD
✔
✔
✔
✔
✔
✔
2/99
1
Fast Charge
tMTO
Top-Off
Maintenance
C/2
1C
2C
C/2
1C
2C
200
80
40
160
80
40
None
C/16
None
None
C/16
None
C/32
C/32
C/32
C/32
C/32
C/32
bq2002E/G
sumes operation at the point where initially
suspended.
Pin Descriptions
TM
Timer mode input
Charge control output
CC
A three-level input that controls the settings
for the fast charge safety timer, voltage termination mode, top-off, pulse-trickle, and
voltage hold-off time.
LED
An open-drain output used to control the
charging current to the battery. CC switching to high impedance (Z) enables charging
current to flow, and low to inhibit charging
current. CC is modulated to provide top-off,
if enabled, and pulse trickle.
Charging output status
Open-drain output that indicates the charging
status.
BAT
Functional Description
Battery input voltage
Figure 2 shows a state diagram and Figure 3 shows a
block diagram of the bq2002E/G.
The battery voltage sense input. The input to
this pin is created by a high-impedance resistor divider network connected between
the positive and negative terminals of the
battery.
VSS
System ground
TS
Temperature sense input
Battery Voltage and Temperature
Measurements
Battery voltage and temperature are monitored for
maximum allowable values. The voltage presented on
the battery sense input, BAT, should represent a
single-cell potential for the battery under charge. A
resistor-divider ratio of
Input for an external battery temperature
monitoring thermistor.
VCC
RB1
=N-1
RB2
Supply voltage input
is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative battery terminal. See Figure 1.
5.0V ± 20% power input.
INH
Charge inhibit input
When high, INH suspends the fast charge in
progress. When returned low, the IC re-
Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩ and less than 1 MΩ.
VCC
PACK +
RT
RB1
VCC
R3
BAT
bq2002E/G
TM
RB2
TS
N
T
C
bq2002E/G
R4
VSS
VSS
BAT pin connection
Mid-level
setting for TM
Thermistor connection
NTC = negative temperature coefficient thermistor.
Fg2002E/G01.eps
Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration
2
bq2002E/G
Chip on
4.0V
VCC
Battery Voltage
too High?
VBAT > 2V
VBAT < 2V
Battery Voltage
too Low?
VBAT < 0.175 VCC
0.175 VCC < VBAT
VTS > 0.6
(PVD or - V or
Maximum Time Out)
and TM = Low
VCC
Battery
Temperature?
VTS < 0.6
VCC
Charge
Pending
Fast
LED =
Low
VBAT > 2V or
VTS < VCC/2 or
((PVD or - V or
Maximum Time Out)
Low)
and TM
Top-off
LED = Z
VBAT > 0.175 VCC,
VBAT < 2V, and
VTS > VCC/2
Trickle
LED =
Flash
VBAT > 2V
VBAT
2V
Trickle
LED = Z
VBAT
2V or
VTS
VCC/2 or
Maximum Time Out
SD2002C.eps
Figure 2. State Diagram
Clock
Phase
Generator
OSC
TM
Timing
Control
Sample
History
Voltage
Reference
PVD, - V
ALU
A to D
Converter
INH
Charge-Control
State Machine
LBAT
Check
HTF TCO
Check Check
Power-On
Reset
CC
LED
TS
Power
Down
VCC
MCV
Check
BAT
VSS
Bd2002CEG.eps
Figure 3. Block Diagram
3
bq2002E/G
VCC = 0
Fast Charging
Top-Off
(optional)
See Table 1
73ms
CC Output
Fast Charging
Pulse-Trickle
1.17s
1.17s
Charge initiated by application of power
Charge initiated by battery replacement
LED
TD2002EG.eps
Figure 4. Charge Cycle Phases
1. Application of power to VCC or
A ground-referenced negative temperature coefficient thermistor placed near the battery may be used as a low-cost
temperature-to-voltage transducer. The temperature
sense voltage input at TS is developed using a resistorthermistor network between VCC and VSS. See Figure 1.
2. Voltage at the BAT pin falling through the maximum
cell voltage VMCV where
VMCV = 2V ±5%.
If the battery is within the configured temperature and
voltage limits, the IC begins fast charge. The valid battery voltage range is VLBAT < VBAT < VMCV, where
Starting A Charge Cycle
Either of two events starts a charge cycle (see Figure 4):
Table 1. Fast-Charge Safety Time/Hold-Off/Top-Off Table
Typical FastCharge and
Top-Off
Time Limits
(minutes)
Top-Off
Rate
PulseTrickle
Rate
PulseTrickle
Width
(ms)
Maximum
Synchronized
Sampling
Period
(seconds)
300
Disabled
C/32
73
18.7
80
150
C/16
C/32
37
18.7
40
75
Disabled
C/32
18
9.4
Typical PVD
and -∆V
Hold-Off Time
bq2002E bq2002G
(seconds)
Corresponding
Fast-Charge
Rate
TM
Termination
C/2
Mid
PVD
200
160
1C
Low
PVD
80
2C
High
-∆V
40
Notes:
Typical conditions = 25°C, VCC = 5.0V
Mid = 0.5 * VCC ± 0.5V
Tolerance on all timing is ± 12%.
4
bq2002E/G
VLBAT = 0.175 ∗ VCC ±20%
The response of the IC to pulses less than 100ns in
width or between 3.5ms and 12ms is indeterminate. Tolerance on all timing is ±12%.
The valid temperature range is VTS > VHTF where
VHTF = 0.6 ∗ VCC ±5%.
Voltage Termination Hold-off
If the battery voltage or temperature is outside of these
limits, the IC pulse-trickle charges until the next new
charge cycle begins.
A hold-off period occurs at the start of fast charging.
During the hold-off time, the PVD and -∆V terminations
are disabled. This avoids premature termination on the
voltage spikes sometimes produced by older batteries
when fast-charge current is first applied. Maximum
voltage and temperature terminations are not affected
by the hold-off period.
If VMCV < VBAT < VPD (see “Low-Power Mode”) when a
new battery is inserted, a delay of 0.35 to 0.9s is imposed
before the new charge cycle begins.
Fast charge continues until termination by one or more of
the five possible termination conditions:
n
Peak voltage detection (PVD)
n
Negative delta voltage (-∆V)
n
Maximum voltage
n
Maximum temperature
n
Maximum time
Maximum Voltage, Temperature, and Time
Any time the voltage on the BAT pin exceeds the maximum cell voltage,VMCV, fast charge or optional top-off
charge is terminated.
Maximum temperature termination occurs anytime the
voltage on the TS pin falls below the temperature cut-off
threshold VTCO where
VTCO = 0.5 ∗ VCC ± 5%.
PVD and -∆V Termination
Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/2, 1C, and 2C. Maximum time-out termination is enforced on the fast-charge phase, then reset, and
enforced again on the top-off phase, if selected. There is
no time limit on the trickle-charge phase.
There are two modes for voltage termination, depending
on the state of TM. For -∆V (TM = high), if VBAT is lower
than any previously measured value by 12mV ±3mV, fast
charge is terminated. For PVD (TM = low or mid), a decrease of 2.5mV ±2.5mV terminates fast charge. The PVD
and -∆V tests are valid in the range 1V < VBAT < 2V.
Top-off Charge
Synchronized Voltage Sampling
An optional top-off charge phase may be selected to
follow fast charge termination for 1C and C/2 rates.
This phase may be necessary on NiMH or other battery chemistries that have a tendency to terminate
charge before reaching full capacity. With top-off enabled, charging continues at a reduced rate after
fast-charge termination for a period of time selected
by the TM pin. (See Table 1.) During top-off, the CC
pin is modulated at a duty cycle of 73ms active for
every 1097ms inactive. This modulation results in an
average rate 1/16th that of the fast charge rate. Maximum voltage, time, and temperature are the only termination methods enabled during top-off.
Voltage sampling at the BAT pin for PVD and -∆V termination may be synchronized to an external stimulus using the INH input. Low-high-low input pulses between
100ns and 3.5ms in width must be applied at the INH
pin with a frequency greater than the “maximum synchronized sampling period” set by the state of the TM
pin as shown in Table 1. Voltage is sampled on the falling edge of such pulses.
If the time between pulses is greater than the synchronizing period, voltage sampling “free-runs” at once every
17 seconds. A sample is taken by averaging together
voltage measurements taken 57µs apart. The IC takes
32 measurements in PVD mode and 16 measurements
in -∆V mode. The resulting sample periods (9.17 and
18.18ms, respectively) filter out harmonics centered
around 55 and 109Hz. This technique minimizes the effect of any AC line ripple that may feed through the
power supply from either 50 or 60Hz AC sources.
Pulse-Trickle Charge
Pulse-trickle is used to compensate for self-discharge
while the battery is idle in the charger. The battery is
pulse-trickle charged by driving the CC pin active once
every 1.17s for the period specified in Table 1. This results in a trickle rate of C/32.
If the INH input remains high for more than 12ms, the
voltage sample history kept by the IC and used for PVD
and -∆V termination decisions is erased and a new history is started. Such a reset is required when transitioning from free-running to synchronized voltage sampling.
TM Pin
The TM pin is a three-level pin used to select the
charge timer, top-off, voltage termination mode, trickle
5
bq2002E/G
rate, and voltage hold-off period options. Table 1 describes the states selected by the TM pin. The midlevel selection input is developed by a resistor divider between V CC and ground that fixes the voltage
on TM at VCC/2 ± 0.5V. See Figure 4.
Low-Power Mode
The IC enters a low-power state when VBAT is driven
above the power-down threshold (VPD) where
VPD = VCC - (1V ±0.5V)
Charge Status Indication
Both the CC pin and the LED pin are driven to the
high-Z state. The operating current is reduced to less
than 1µA in this mode. When VBAT returns to a value
below VPD, the IC pulse-trickle charges until the next
new charge cycle begins.
A fast charge in progress is uniquely indicated when the
LED pin goes low. The LED pin is driven to the high-Z
state for all conditions other than fast charge. Figure 2
outlines the state of the LED pin during charge.
Charge Inhibit
Fast charge and top-off may be inhibited by using the
INH pin. When high, INH suspends all fast charge and
top-off activity and the internal charge timer. INH
freezes the current state of LED until inhibit is removed.
Temperature monitoring is not affected by the INH pin.
During charge inhibit, the bq2002E/G continues to
pulse-trickle charge the battery per the TM selection.
When INH returns low, charge control and the charge
timer resume from the point where INH became active.
6
bq2002E/G
Absolute Maximum Ratings
Symbol
Parameter
Minimum
Maximum
Unit
VCC
VCC relative to VSS
-0.3
+7.0
V
VT
DC voltage applied on any pin
excluding VCC relative to VSS
-0.3
+7.0
V
TOPR
Operating ambient temperature
0
+70
°C
TSTG
Storage temperature
-40
+85
°C
TSOLDER
Soldering temperature
-
+260
°C
TBIAS
Temperature under bias
-40
+85
°C
Note:
Commercial
10 sec max.
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to conditions beyond the operational limits for extended periods of time may affect device reliability.
DC Thresholds
Symbol
Notes
(TA = 0 to 70°C; VCC ± 20%)
Parameter
Rating
Tolerance
Unit
Notes
VTCO
Temperature cutoff
0.5 * VCC
± 5%
V
VTS ≤ VTCO inhibits/terminates
fast charge and top-off
VHTF
High temperature fault
0.6 ∗ VCC
±5%
V
VTS < VHTF inhibits fast charge
start
VMCV
Maximum cell voltage
2
± 5%
V
VBAT ≥ VMCV inhibits/terminates
fast charge and top-off
VLBAT
Minimum cell voltage
0.175 ∗ VCC
±20%
V
VBAT < VLBAT inhibits fast charge
start
-∆V
BAT input change for
-∆V detection
-12
±3
mV
PVD
BAT input change for
PVD detection
-2.5
±2.5
mV
7
bq2002E/G
Recommended DC Operating Conditions (TA = 0 to 70°C)
Symbol
Condition
Minimum
Typical
Maximum
Unit
4.0
5.0
6.0
V
Notes
VCC
Supply voltage
VDET
-∆V, PVD detect voltage
1
-
2
V
VBAT
Battery input
0
-
VCC
V
VTS
Thermistor input
0.5
-
VCC
V
VTS < 0.5V prohibited
VIH
Logic input high
0.5
-
-
V
INH
Logic input high
VCC - 0.5
-
-
V
TM
Logic input mid
VCC
-
+ 0.5
V
TM
VIM
- 0.5
2
VCC
2
Logic input low
-
-
0.1
V
INH
Logic input low
-
-
0.5
V
TM
VOL
Logic output low
-
-
0.8
V
LED, CC, IOL = 10mA
VPD
Power down
VCC - 1.5
-
VCC - 0.5
V
VBAT ≥ VPD max. powers
down bq2002E/G;
VBAT < VPD min. =
normal operation.
ICC
Supply current
-
-
500
µA
Outputs unloaded,
VCC = 5.1V
ISB
Standby current
-
-
1
µA
VCC = 5.1V, VBAT = VPD
IOL
LED, CC sink
10
-
-
mA
@VOL = VSS + 0.8V
IL
Input leakage
-
-
±1
µA
INH, CC, V = VSS to VCC
IOZ
Output leakage in
high-Z state
-5
-
-
µA
LED, CC
VIL
Note:
All voltages relative to VSS.
8
bq2002E/G
Impedance
Symbol
Parameter
Minimum
Typical
Maximum
Unit
RBAT
Battery input impedance
50
-
-
MΩ
RTS
TS input impedance
50
-
-
MΩ
Timing
Symbol
(TA = 0 to +70°C; VCC ± 10%)
Parameter
Minimum
Typical
Maximum
Unit
dFCV
Time base variation
-12
-
12
%
tDLY
Start-up delay
0.35
-
0.9
s
Note:
Typical is at TA = 25°C, VCC = 5.0V.
9
Notes
Starting from VMCV < VBAT < VPD
bq2002E/G
8-Pin DIP (PN)
8-Pin PN (0.300" DIP)
Inches
Min.
Max.
Min.
Max.
A
0.160
0.180
4.06
4.57
A1
0.015
0.040
0.38
1.02
B
0.015
0.022
0.38
0.56
B1
0.055
0.065
1.40
1.65
D
E1
E
A
B1
A1
L
C
0.008
0.013
0.20
0.33
D
0.350
0.380
8.89
9.65
E
0.300
0.325
7.62
8.26
E1
0.230
0.280
5.84
7.11
C
B
S
e
Millimeters
Dimension
e
0.300
0.370
7.62
9.40
G
0.090
0.110
2.29
2.79
L
0.115
0.150
2.92
3.81
S
0.020
0.040
0.51
1.02
G
8-Pin SOIC Narrow (SN)
8-Pin SN (0.150" SOIC)
Inches
10
Millimeters
Dimension
Min.
Max.
Min.
Max.
A
0.060
0.070
1.52
1.78
A1
0.004
0.010
0.10
0.25
B
0.013
0.020
0.33
0.51
C
0.007
0.010
0.18
0.25
D
0.185
0.200
4.70
5.08
E
0.150
0.160
3.81
4.06
e
0.045
0.055
1.14
1.40
H
0.225
0.245
5.72
6.22
L
0.015
0.035
0.38
0.89
bq2002E/G
Data Sheet Revision History
Change No.
Page No.
1
1
Notes:
Description
Added selection guide
Change 1 = Feb. 1999 B changes from Sept. 1997
Ordering Information
bq2002E/G
Package Option:
PN = 8-pin plastic DIP
SN = 8-pin narrow SOIC
Device:
bq2002E Fast Charge IC
bq2002G Fast Charge IC
11
Nature of Change
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright  1999, Texas Instruments Incorporated
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright  1999, Texas Instruments Incorporated