BUK9107-55ATE N-channel TrenchPLUS logic level FET Rev. 02 — 16 February 2009 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. The devices include TrenchPLUS diodes for ElectroStatic Discharge (ESD) protection and temperature sensing. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Allows responsive temperature monitoring due to integrated temperature sensor Q101 compliant Electrostatically robust due to integrated protection diodes Low conduction losses due to low on-state resistance 1.3 Applications 12 V and 24 V high power motor drives Electrical Power Assisted Steering (EPAS) Automotive and general purpose power switching Protected drive for lamps 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 55 V ID drain current VGS = 5 V; Tmb = 25 °C; see Figure 2 and 3 [1] - - 140 A Ptot total power dissipation Tmb = 25 °C; see Figure 1 - - 272 W Tj junction temperature -55 - 175 °C VGS = 4.5 V; ID = 50 A; Tj = 25 °C - 6 7.7 mΩ VGS = 10 V; ID = 50 A; Tj = 25 °C - 5.2 6.2 mΩ VGS = 5 V; ID = 50 A; Tj = 25 °C; see Figure 7 and 8 7 mΩ Static characteristics RDSon drain-source on-state resistance - 5.8 SF(TSD) temperature sense diode IF = 250 µA; Tj > -55 °C; Tj < 175 °C temperature coefficient -1.4 -1.54 -1.68 mV/K VF(TSD) temperature sense diode IF = 250 µA; Tj = 25 °C forward voltage 648 658 [1] Current is limited by power dissipation chip rating. 668 mV BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 G gate 2 A anode 3 D drain 4 K cathode 5 S source mb D mounting base; connected to drain Graphic symbol mb D A G 3 1 2 S 45 K mbl317 SOT426 (D2PAK) 3. Ordering information Table 3. Ordering information Type number Package Name Description BUK9107-55ATE D2PAK plastic single-ended surface-mounted package (D2PAK); 5 leads (one lead cropped) BUK9107-55ATE_2 Product data sheet Version SOT426 © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 2 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 55 V VGS gate-source voltage ID drain current [1] -15 15 V Tmb = 25 °C; VGS = 5 V; see Figure 2; see Figure 3 [2] - 140 A [3] - 75 A Tmb = 100 °C; VGS = 5 V; see Figure 2 [3] - 75 A IDM peak drain current Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3 - 560 A Ptot total power dissipation Tmb = 25 °C; see Figure 1 - 272 W IGS(CL) gate-source clamping current continuous - 10 mA pulsed; tp = 5 ms; δ = 0.01 - 50 mA -100 100 V Visol(FET-TSD) FET to temperature sense diode isolation voltage Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C VDGS drain-gate voltage - 55 V [2] - 140 A [3] - 75 A - 560 A - 500 mJ - 6 kV Source-drain diode IS ISM source current Tmb = 25 °C peak source current tp ≤ 10 µs; pulsed; Tmb = 25 °C Clamping EDS(CL)S non-repetitive drain-source ID = 75 A; VDS ≤ 55 V; VGS = 5 V; RGS = 50 Ω; clamping energy unclamped; Tj(init) = 25 °C Electrostatic discharge Vesd electrostatic discharge voltage HBM; C = 100 pF; R = 1.5 kΩ; pins 1, 3, 5 [1] Voltage is limited by clamping. [2] Current is limited by power dissipation chip rating. [3] Continuous current is limited by package. BUK9107-55ATE_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 3 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 03na19 120 03ne74 150 ID (A) 125 Pder (%) 80 100 75 Capped at 75 A due to package 40 50 25 0 0 0 50 100 150 200 25 Tmb (°C) Fig 2. Fig 1. Normalized total power dissipation as a function of mounting base temperature 50 75 100 125 150 175 200 Tmb (oC) Normalized continuous drain current as a function of mounting base temperature 03nf55 103 ID (A) Limit RDSon = VDS/ID tp = 10 μs 102 100 μs Capped at 75 A due to package 1 ms DC 10 ms 10 100 ms 1 1 102 10 VDS (V) Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK9107-55ATE_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 4 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Rth(j-a) Rth(j-mb) Conditions Min Typ Max Unit thermal resistance from mounted on printed-circuit board; junction to ambient minimum footprint - - 50 K/W thermal resistance from see Figure 4 junction to mounting base - - 0.55 K/W 03ne76 1 δ 10-1 δ= P tp T 10-2 t tp T 10-3 10-6 Fig 4. 10-5 10-4 10-3 10-2 10-1 1 tp (s) 10 Transient thermal impedance from junction to mounting base as a function of pulse duration BUK9107-55ATE_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 5 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 6. Characteristics Table 6. Symbol Characteristics Parameter Conditions Min drain-source breakdown voltage ID = 0.25 mA; VGS = 0 V; Tj = 25 °C 55 ID = 0.25 mA; VGS = 0 V; Tj = -55 °C 50 gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 9 1 ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 9 Typ Max Unit - - V - - V 1.5 2 V 0.5 - - V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 9 - - 2.3 V VDS = 55 V; VGS = 0 V; Tj = 25 °C - 0.1 10 µA VDS = 55 V; VGS = 0 V; Tj = 175 °C - - 250 µA 12 15 - V 12 15 - V Static characteristics V(BR)DSS VGS(th) IDSS V(BR)GSS IGSS RDSon drain leakage current gate-source breakdown IG = -1 mA; -55 °C < Tj < 175 °C voltage IG = 1 mA; -55 °C < Tj < 175 °C gate leakage current drain-source on-state resistance VDS = 0 V; VGS = 5 V; Tj = 25 °C - 5 1000 nA VDS = 0 V; VGS = -5 V; Tj = 25 °C - 5 1000 nA VGS = 5 V; ID = 50 A; Tj = 25 °C; see Figure 7; see Figure 8 - 5.8 7 mΩ VGS = 5 V; ID = 50 A; Tj = 175 °C; see Figure 7; see Figure 8 - - 14 mΩ VGS = 4.5 V; ID = 50 A; Tj = 25 °C - 6 7.7 mΩ VGS = 10 V; ID = 50 A; Tj = 25 °C - 5.2 6.2 mΩ VF(TSD) temperature sense diode forward voltage IF = 250 µA; Tj = 25 °C 648 658 668 mV SF(TSD) temperature sense diode temperature coefficient IF = 250 µA; Tj > -55 °C; Tj < 175 °C -1.4 -1.54 -1.68 mV/K VF(TSD)hys temperature sense diode forward voltage hysteresis IF > 125 µA; IF < 250 µA; Tj = 25 °C 25 32 50 mV ID = 50 A; VDS = 44 V; VGS = 5 V; Tj = 25 °C; see Figure 14 - 108 - nC - 15 - nC - 47 - nC Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) tf VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 12 VDS = 30 V; RL = 1.2 Ω; VGS = 5 V; RG(ext) = 10 Ω; Tj = 25 °C - 5836 - pF - 958 - pF - 595 - pF - 51 - ns - 202 - ns turn-off delay time - 341 - ns fall time - 207 - ns BUK9107-55ATE_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 6 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit LD internal drain inductance from upper edge of drain mounting base to centre of die; Tj = 25 °C - 2.5 - nH LS internal source inductance from source lead to source bond pad; Tj = 25 °C - 7.5 - nH Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 17 - 0.85 1.2 V trr reverse recovery time - 85 - ns Qr recovered charge IS = 20 A; dIS/dt = -100 A/µs; VGS = -10 V; VDS = 30 V; Tj = 25 °C - 250 - nC BUK9107-55ATE_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 7 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 03ne77 ID 400 (A) 350 RDSon (mΩ) 4.2 6 03ne79 25 4.6 4.4 V GS = 5 V 20 300 4 10 250 3.8 15 3.6 200 3.4 150 10 3.2 3 100 5 2.8 50 2.6 2.4 2.2 0 0 Fig 5. 2 4 6 8 0 2 10 VDS (V) Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. 4 6 8 V 10 GS (V) Drain-source on-state resistance as a function of gate-source volatage; typical values 03ne89 2 03ne78 16 RDSon a VGS = 3 V (mΩ) 3.6 3.2 14 3.8 1.5 4 3.4 12 1 10 0.5 5 8 10 0 -60 6 0 Fig 7. 50 100 150 200 60 120 Tj (°C) 180 250 300 ID (A) Drain-source on-state resistance as a function of drain current; typical values Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature BUK9107-55ATE_2 Product data sheet 0 © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 8 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 03na17 2.5 VGS(th) (V) 2 (A) 10-2 max typ 10-3 1.5 min 1 10-4 0.5 10-5 min typ max 10-6 0 -60 Fig 9. 03na18 10-1 ID -20 20 60 100 140 180 Tj (oC) Gate-source threshold voltage as a function of junction temperature 03ne81 gfs140 (S) 120 0 0.5 1 1.5 2 2.5 3 VGS (V) Fig 10. Sub-threshold drain current as a function of gate-source voltage 03ne86 16000 C (pF) 14000 12000 100 10000 80 8000 60 6000 40 4000 20 2000 0 0 0 20 40 60 80 I (A) 100 D Fig 11. Forward transconductance as a function of drain current; typical values 10-2 10-1 1 10 VDS (V) Coss Crss 102 Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK9107-55ATE_2 Product data sheet Ciss © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 9 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 03ne80 100 ID 03nf65 5 (A) VGS (V) 80 4 VDS = 14 V 3 60 VDS = 44 V Tj = 175 ºC 40 2 20 1 Tj = 25 ºC 0 0 0.0 1.0 2.0 0 VGS (V) 3.0 Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values 03ne84 700 20 40 80 100 120 QG (nC) Fig 14. Gate-source voltage as a function of gate charge; typical values 03ne85 −1.70 max SF (mV/K) VF (mV) 60 −1.60 600 typ −1.50 500 min 400 0 50 100 150 200 −1.40 645 Tj (°C) 665 675 VF (mV) Fig 15. Forward voltage of temperature sense diode as a function of junction temperature; typical values Fig 16. Temperature coefficient of temperature sense diode as a function of forward voltage; typical values BUK9107-55ATE_2 Product data sheet 655 © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 10 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 03ne88 100 IS (A) 80 Tj = 175 ºC 60 40 Tj = 25 ºC 20 0 0.0 0.5 1.0 VSD (V) 1.5 Fig 17. Reverse diode current as a function of reverse diode voltage; typical values BUK9107-55ATE_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 11 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 7. Package outline Plastic single-ended surface-mounted package (D2PAK); 5 leads (one lead cropped) SOT426 A A1 E D1 mounting base D HD 3 1 2 4 e e Lp 5 b e c e Q 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b c D max. D1 E e Lp HD Q mm 4.50 4.10 1.40 1.27 0.85 0.60 0.64 0.46 11 1.60 1.20 10.30 9.70 1.70 2.90 2.10 15.80 14.80 2.60 2.20 OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-03-09 06-03-16 SOT426 Fig 18. Package outline SOT426 (D2PAK) BUK9107-55ATE_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 12 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes BUK9107-55ATE_2 20090216 Product data sheet - BUK9107_9907_55ATE-01 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Type number BUK9107-55ATE separated from data sheet BUK9107_9907_55ATE-01. BUK9107_9907_55ATE-01 20020207 (9397 750 09138) Product data sheet - BUK9107-55ATE_2 Product data sheet - © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 13 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 9. Legal information 9.1 Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BUK9107-55ATE_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 16 February 2009 14 of 15 BUK9107-55ATE NXP Semiconductors N-channel TrenchPLUS logic level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .13 Legal information. . . . . . . . . . . . . . . . . . . . . . . .14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Contact information. . . . . . . . . . . . . . . . . . . . . .14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: Rev. 02 — 16 February 2009 Document identifier: BUK9107-55ATE_2