LINER LTM8047 2.8vin to 40vin isolated î¼module dc/dc converter with ldo post regulator Datasheet

LTM8068
2.8VIN to 40VIN Isolated
µModule DC/DC Converter
with LDO Post Regulator
FEATURES
DESCRIPTION
2kVAC Isolated µModule Converter
UL60950 Recognized File E464570
nn Wide Input Voltage Range: 2.8V to 40V
nn V
OUT1 Output:
nn Up to 450mA (V = 24V V
IN
, OUT1 = 5V)
nn 2.5V to 18V Output Range
nn V
OUT2 Low Noise Linear Post Regulator:
nn Up to 300mA
nn 1.2V to 18V Output Range
nn Current Mode Control
nn User Configurable Undervoltage Lockout
nn Low Profile (9mm × 11.25mm × 4.92mm)
BGA Package
The LTM®8068 is a 2kVAC isolated flyback µModule®
(power module) DC/DC converter with LDO post regulator. Included in the package are the switching controller,
power switches, transformer, LDO, and all support components. Operating over an input voltage range of 2.8V to
40V, the LTM8068 supports an output voltage range of
2.5V to 18V, set by a single resistor. There is also a linear
post regulator whose output voltage is adjustable from
1.2V to 18V as set by a single resistor. Only output and
input capacitors are needed to finish the design.
nn
nn
The LTM8068 is packaged in a thermally enhanced, compact (9mm × 11.25mm × 4.92mm) overmolded ball grid
array (BGA) package suitable for automated assembly
by standard surface mount equipment. The LTM8068 is
available with SnPb or RoHS compliant terminal finish.
APPLICATIONS
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Analog Devices, Inc. All other trademarks are the property of their respective owners.
Industrial Sensors
nn Industrial Switches
nn Ground Loop Mitigation
nn
TYPICAL APPLICATION
2kVAC Isolated Low Noise µModule Regulator
Total Output Current vs VIN
350
RUN
2.2µF
•
(5.6V)
22µF
VOUT2
•
LOW
NOISE
LDO
FB2
VOUTN
162k
VOUT2
5V
300mA MAX
10µF
FB1
7.32k
GND
LTM8068
LOAD CURRENT (mA)
VOUT1
VIN
VIN
2.8V TO 38V
250
150
8068 TA01a
PIN BYP IS NOT USED IN THIS SCHEMATIC
50
0
9
18
VIN (V)
27
36
8068 TA01
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1
LTM8068
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
VIN, RUN ...................................................................42V
VOUT1 Relative to VOUTN.............................................25V
VIN + VOUT1 (Note 2)..................................................45V
VOUT2 Relative to VOUTN...........................................+20V
FB2 Relative to VOUTN................................................+7V
GND to VOUTN Isolation (Note 3)............................2kVAC
Maximum Internal Temperature (Note 4)............... 125°C
Maximum Peak Body Reflow Temperature............ 245°C
Storage Temperature.............................. –55°C to 125°C
A
FB2
B
C
BANK 3 BYP
VOUT2
BANK 2
VOUTN
BANK 1
VOUT1
D
E
BANK 5
VIN
F
G
BANK 4
GND
RUN
FB1
H
1
2
3
4
5
6
7
BGA PACKAGE
38-LEAD (11.25mm × 9mm × 4.92mm)
TJMAX = 125°C, θJA = 18.2°C/W, θJCbottom = 4.8°C/W, θJCtop = 18.1°C/W, θJB = 4.8°C/W
WEIGHT = 1.1g, θ VALUES DETERMINED PER JEDEC 51-9, 51-12
ORDER INFORMATION
http://www.linear.com/product/LTM8068#orderinfo
PART MARKING*
PART NUMBER
PAD OR BALL FINISH
LTM8068EY#PBF
SAC305 (RoHS)
DEVICE
FINISH CODE
PACKAGE
TYPE
MSL
RATING
LTM8068Y
e1
BGA
3
TEMPERATURE RANGE
(Note 4)
–40°C to 125°C
LTM8068IY#PBF
SAC305 (RoHS)
LTM8068Y
e1
BGA
3
–40°C to 125°C
LTM8068IY
SnPb (63/37)
LTM8068Y
e0
BGA
3
–40°C to 125°C
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• Terminal Finish Part Marking:
www.linear.com/leadfree
• LGA and BGA Package and Tray Drawings:
www.linear.com/packaging
2
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LTM8068
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C, RUN = 2V (Note 4).
PARAMETER
CONDITIONS
Minimum Input DC Voltage
RUN = 2V
l
VOUT1 DC Voltage
RFB1 = 15.4k
RFB1 = 8.25k
RFB1 = 2.37k
l
VIN Quiescent Current
VRUN = 0V
Not Switching
MIN
4.75
TYP
2.5
5
18
7
MAX
UNITS
2.8
V
5.25
V
V
V
3
µA
mA
VOUT1 Line Regulation
3V ≤ VIN ≤ 40V, IOUT = 0.1A, RUN = 2V
1
%
VOUT1 Load Regulation
0.05A ≤ IOUT ≤ 0.3A, RUN = 2V
1
%
VOUT1 Ripple (RMS)
IOUT = 0.1A, 1MHz BW
30
mV
Isolation Voltage
(Note 3)
2
kV
Input Short-Circuit Current
VOUT1 Shorted
80
mA
RUN Pin Input Threshold
RUN Pin Falling
RUN Pin Current
VRUN = 1V
VRUN = 1.3V
2.5
LDO (VOUT2) Minimum Input DC Voltage
(Note 5)
1.5
VOUT2 Voltage Range
VOUT1 = 16V, RFB2 Open, No Load (Note 5)
VOUT1 = 16V, RFB2 = 41.2k, No Load (Note 5)
1.22
17.7
FB2 Pin Voltage
VOUT1 = 2V, IOUT2 = 1mA (Note 5)
VOUT1 = 2V, IOUT2 = 1mA (Note 5)
1.18
l
1.19
1.214
1.22
1.25
V
0.1
µA
µA
2.3
V
V
V
1.25
V
V
VOUT2 Line Regulation
2V < VOUT1 < 16V, IOUT2 = 1mA (Note 5)
1
5
mV
VOUT2 Load Regulation
VOUT1 = 5V, 10mA ≤ IOUT2 ≤ 300mA (Note 5)
2
10
mV
LDO Dropout Voltage
IOUT2 = 10mA (Note 5)
IOUT2 = 100mA (Note 5)
IOUT2 = 300mA (Note 5)
VOUT2 Ripple (RMS)
CBYP = 0.01µF, IOUT2 = 300mA, BW = 100Hz to 100kHz (Note 5)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: VIN + VOUT1 is defined as the sum of:
(VIN – GND) + (VOUT1 – VOUTN)
Note 3: The LTM8068 isolation test voltage of either 2kVAC or its
equivalent of 2.83kVDC is applied for one second.
0.25
0.34
0.43
20
V
V
V
µVRMS
Note 4: The LTM8068E is guaranteed to meet performance specifications
from 0°C to 125°C. Specifications over the –40°C to 125°C internal
temperature range are assured by design, characterization and correlation
with statistical process controls. LTM8068I is guaranteed to meet
specifications over the full –40°C to 125°C internal operating temperature
range. Note that the maximum internal temperature is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal resistance and other environmental factors.
Note 5: VRUN = 0V (Flyback not running), but the VOUT2 post regulator is
powered by applying a voltage to VOUT1.
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3
LTM8068
TYPICAL PERFORMANCE CHARACTERISTICS
as in Table 1 (TA = 25°C).
80
50
0
50
100 150 200 250
LOAD CURRENT (mA)
300
60
50
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
40
40
350
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
0
50
75
200
300
400
LOAD CURRENT (mA)
45
500
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
0
50
100
150
200
LOAD CURRENT (mA)
250
25
0
VIN
5V
VIN==5V
12V
VIN
VIN==12V
24V
VIN
VIN==24V
36V
VIN
VIN==36V
0
50
100 150 200 250
LOAD CURRENT (mA)
300
350
8068 G07
4
500
65
VIN = 5V
VIN = 12V
VIN = 24V
0
50
100
150
200
LOAD CURRENT (mA)
250
8068 G06
Input Current vs Load Current,
VOUT1 = 3.3V
300
Input Current vs Load Current,
VOUT1 = 5V
240
75
50
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
25
0
600
75
55
300
100
INPUT CURRENT (mA)
INPUT CURRENT (mA)
125
50
200
300
400
LOAD CURRENT (mA)
8068 G05
Input Current vs Load Current,
VOUT1 = 2.5
75
100
Input Current vs Load Current,
VOUT1 = 15V
65
8068 G04
100
0
85
55
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
100
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
8068 G03
EFFICIENCY (%)
75
EFFICIENCY (%)
EFFICIENCY (%)
85
0
40
Efficiency vs Load Current,
VOUT1 = 12V
85
45
60
8068 G02
Efficiency vs Load Current,
VOUT1 = 8V
55
70
50
100 150 200 250 300 350 400
LOAD CURRENT (mA)
8068 G01
65
Efficiency vs Load Current,
VOUT1 = 5V
80
EFFICIENCY (%)
60
30
90
70
EFFICIENCY (%)
EFFICIENCY (%)
70
Efficiency vs Load Current,
VOUT1 = 3.3V
0
100
200
300
LOAD CURRENT (mA)
400
8068 G08
INPUT CURRENT (mA)
80
Efficiency vs Load Current,
VOUT1 = 2.5V
Unless otherwise noted, operating conditions are
180
120
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
60
0
0
100
200
300
400
LOAD CURRENT (mA)
500
600
8068 G09
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LTM8068
TYPICAL PERFORMANCE CHARACTERISTICS
as in Table 1 (TA = 25°C).
300
200
100
0
0
100
200
300
400
LOAD CURRENT (mA)
400
200
100
0
100
200
LOAD CURRENT (mA)
8068 G10
50
0
10
20
VIN (V)
30
270
180
0
40
Maximum Load Current vs VIN
600
2.5VOUT1
3.3VOUT1
200
0
10
20
VIN (V)
0
10
8068 G13
300
100
500
90
MAXIMUM LOAD CURRENT (mA)
MAXIMUM LOAD CURRENT (mA)
400
Input Current vs VIN,
VOUT2 Shorted
360
INPUT CURRENT (mA)
INPUT CURRENT (mA)
200
0
30
40
8068 G16
100
VIN = 5V
VIN = 12V
VIN = 24V
0
100
200
LOAD CURRENT (mA)
300
20
VIN (V)
30
200
20
VIN (V)
250
125
300
5VOUT1
8VOUT1
10
VV
5V
ININ==5V
12V
VV
ININ==12V
24V
VV
ININ==24V
0
5
10
15
VOUT1 (V)
8068 G14
Maximum Load Current vs VIN
0
Maximum Load Current vs VOUT1
375
0
40
400
0
8068 G12
MAXIMUM LOAD CURRENT (mA)
450
100
200
8068 G11
Input Current vs VIN,
VOUT1 Shorted, VOUT2 Open
150
Input Current vs Load Current,
VOUT1 = 15V
300
0
300
MAXIMUM LOAD CURRENT (mA)
250
400
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
300
0
500
Input Current vs Load Current,
VOUT1 = 12V
INPUT CURRENT (mA)
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
INPUT CURRENT (mA)
INPUT CURRENT (mA)
400
Input Current vs Load Current,
VOUT1 = 8V
Unless otherwise noted, operating conditions are
30
40
8068 G17
20
25
8068 G15
Maximum Load Current vs VIN
12VOUT1
15VOUT1
200
100
0
0
10
20
VIN (V)
30
40
8068 G18
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5
LTM8068
TYPICAL PERFORMANCE CHARACTERISTICS
as in Table 1 (TA = 25°C).
Minimum Load Current vs VOUT1
Over Full Input Voltage Range
Output Noise and Ripple
DC2358A, 200mA Load Current
Frequency vs VOUT1 Load Current
Stock DC2358A Demo Board
450
C9 = 470pF
HP461 150MHz AMPLIFIER AT 40dB GAIN
20
15
VOUT1
20mV/DIV
10
VOUT2
500µV/DIV
5
2µs/DIV
6
12
18
VOUT1 (V)
MAXIMUM LOAD CURRENT (mA)
VOUT2 DROPOUT VOLTAGE (V)
Derating, 1.2VOUT2
400
125°C
0.5
25°C
0.4
0.3
–40°C
0.2
0.1
0
50
100
150
200
250
VOUT2 LOAD CURRENT (mA)
100
300
MAXIMUM LOAD CURRENT (mA)
100
VIN = 5V
VIN = 12V
VIN = 24V, 36V
50
75
100
AMBIENT TEMPERATURE (° C)
125
8068 G25
200
300
400
LOAD CURRENT (mA)
500
600
25
50
75
100
AMBIENT TEMPERATURE (° C)
200
100
0
125
0LFM AIRFLOW
300
VIN = 5V
VIN = 12V
VIN = 24V, 36V
25
50
75
100
AMBIENT TEMPERATURE (° C)
Derating,3.3VOUT2
400
0LFM AIRFLOW
300
200
100
0
VIN = 5V
VIN = 12V
VIN = 24V, 36V
25
50
75
100
AMBIENT TEMPERATURE (° C)
125
8068 G24
Derating, 2.5VOUT2
400
200
6
100
8068 G23
0LFM AIRFLOW
25
VIN = 5V
VIN = 12V
VIN = 24V, 36V
8058 G22
300
0
0LFM AIRFLOW
200
Derating, 1.8VOUT2
400
0
Derating, 1.5VOUT2
400
300
0
0
VIN = 5V
VIN = 12V
VIN = 24V
8068 G21
VOUT2 = 3.3V
0.6
250
8068 G19
VOUT2 Dropout
0.7
350
150
24
MAXIMUM LOAD CURRENT (mA)
0
MAXIMUM LOAD CURRENT (mA)
0
8068 G20
SWITCHING FREQUENCY (kHz)
MINIMUM LOAD CURRENT (mA)
25
MAXIMUM LOAD CURRENT (mA)
Unless otherwise noted, operating conditions are
125
8068 G26
0LFM AIRFLOW
300
200
100
0
VIN = 5V
VIN = 12V
VIN = 24V, 36V
25
50
75
100
AMBIENT TEMPERATURE (° C)
125
8068 G27
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LTM8068
TYPICAL PERFORMANCE CHARACTERISTICS
as in Table 1 (TA = 25°C).
400
MAXIMUM LOAD CURRENT (mA)
0LFM AIRFLOW
300
200
100
25
50
75
100
AMBIENT TEMPERATURE (° C)
125
300
0LFM AIRFLOW
300
200
100
0
VIN = 5V
VIN = 12V
VIN = 24V, 36V
25
8068 G28
50
75
100
AMBIENT TEMPERATURE (° C)
Derating, 15VOUT2
250
200
150
100
0
VIN = 5V
VIN = 12V
VIN = 24V
25
0LFM AIRFLOW
200
100
0
VIN = 5V
VIN = 12V
VIN = 24V, 32V
25
50
75
100
AMBIENT TEMPERATURE (° C)
125
8068 G30
Derating, 18VOUT2
200
0LFM AIRFLOW
50
125
Derating, 12VOUT2
8068 G29
MAXIMUM LOAD CURRENT (mA)
0
VIN = 5V
VIN = 12V, 24V, 36V
Derating, 8VOUT2
MAXIMUM LOAD CURRENT (mA)
Derating, 5VOUT2
MAXIMUM LOAD CURRENT (mA)
MAXIMUM LOAD CURRENT (mA)
400
Unless otherwise noted, operating conditions are
50
75
100
AMBIENT TEMPERATURE (° C)
125
0LFM AIRFLOW
150
100
50
0
VIN = 5V
VIN = 12V
VIN = 24V
25
50
75
100
AMBIENT TEMPERATURE (° C)
8068 G31
125
8068 G32
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7
LTM8068
PIN FUNCTIONS
VOUT1 (Bank 1): VOUT1 and VOUTN comprise the isolated
output of the LTM8068 flyback stage. Apply an external
capacitor between VOUT1 and VOUTN. Do not allow VOUTN
to exceed VOUT1.
VOUTN (Bank 2): VOUTN is the return for both VOUT1 and
VOUT2. VOUT1 and VOUTN comprise the isolated output of
the LTM8068. In most applications, the bulk of the heat
flow out of the LTM8068 is through the GND and VOUTN
pads, so the printed circuit design has a large impact on
the thermal performance of the part. See the PCB Layout
and Thermal Considerations sections for more details.
Apply an external capacitor between VOUT1 and VOUTN.
VOUT2 (Bank 3): The output of the secondary side linear
post regulator. Apply the load and output capacitor between
VOUT2 and VOUTN. See the Applications Information section for more information on output capacitance and
reverse output characteristics.
GND (Bank 4): This is the local ground of the LTM8068
primary. In most applications, the bulk of the heat flow
out of the LTM8068 is through the GND and VOUTN pads,
so the printed circuit design has a large impact on the
thermal performance of the part. See the PCB Layout and
Thermal Considerations sections for more details.
VIN (Bank 5): VIN supplies current to the LTM8068’s internal regulator and to the integrated power switch. These
pins must be locally bypassed with an external, low ESR
capacitor.
BYP (Pin B2): The BYP pin is used to bypass the reference of the LDO to achieve low noise performance from
the linear post regulator. The BYP pin is clamped internally
to ±0.6V relative to VOUTN. A small capacitor from VOUT2
to this pin will bypass the reference to lower the output
voltage noise. A maximum value of 0.01µF can be used
for reducing output voltage noise to a typical 20µVRMS
over a 100Hz to 100kHz bandwidth. If not used, this pin
must be left unconnected.
RUN (Pin F3): A resistive divider connected to VIN and this
pin programs the minimum voltage at which the LTM8068
will operate. Below 1.24V, the LTM8068 does not deliver
power to the secondary. When RUN is less than 1.24V,
the pin draws 2.5µA, allowing for a programmable hysteresis. Do not allow a negative voltage (relative to GND)
on this pin.
FB1 (Pin G7): Apply a resistor from this pin to GND to
set the output voltage VOUT1 relative to VOUTN, using the
recommended value given in Table 1. If Table 1 does not
list the desired VOUT1 value, the equation
(
)
RFB1 = 37.415 VOUT1–0.955 kΩ
may be used to approximate the value. To the seasoned
designer, this exponential equation may seem unusual.
The equation is exponential due to nonlinear current
sources that are used to temperature compensate the
regulation. Do not drive this pin.
FB2 (Pin A2): This is the input to the error amplifier of the
secondary side LDO post regulator. This pin is internally
clamped to ±7V. The FB2 pin voltage is 1.22V referenced
to VOUTN and the output voltage range is 1.22V to 12V.
Apply a resistor from this pin to VOUTN, using the equation
RFB2 = 608.78/(VOUT2 – 1.22)kΩ. If the post regulator is
not used, leave this pin floating.
8
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LTM8068
BLOCK DIAGRAM
VOUT1
VIN
VOUT2
•
•
0.1µF
499k
0.1µF
LOW NOISE
LDO
FB2
BYP
RUN
CURRENT
MODE
CONTROLLER
VOUTN
FB1
GND
8068 BD
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9
LTM8068
OPERATION
The LTM8068 is a stand-alone isolated flyback switching
DC/DC power supply that can deliver up to 450mA of
output current at 5VOUT1, 24VIN. This module provides a
regulated output voltage programmable via one external
resistor from 2.5V to 18V. It is also equipped with a high
performance linear post regulator. The input voltage range
of the LTM8068 is 2.8V to 40V. Given that the LTM8068
is a flyback converter, the output current depends upon
the input and output voltages, so make sure that the
input voltage is high enough to support the desired output voltage and load current. The Typical Performance
Characteristics section gives several graphs of the maximum load versus VIN for several output voltages.
A simplified block diagram is given. The LTM8068 contains a current mode controller, power switching element, power transformer, power Schottky diode, a modest amount of input and output capacitance, and a high
performance linear post regulator.
The LTM8068 has a galvanic primary to secondary isolation rating of 2kVAC. For details please refer to the
Isolation, Working Voltage and Safely Compliance section. The LTM8068 is a UL 60950 recognized component.
10
The RUN pin is used to turn on or off the LTM8068, disconnecting the output and reducing the input current to
1μA or less.
The LTM8068 is a variable frequency device. For a given
input and output voltage, the frequency decreases as the
load increases. For light loads, the current through the
internal transformer may be discontinuous.
The post regulator is a high performance 300mA low
dropout regulator with micropower quiescent current and
shutdown. The device is capable of supplying 300mA at
a dropout voltage of 430mV. Output voltage noise can be
lowered to 20µVRMS over a 100Hz to 100kHz bandwidth
with the addition of a 0.01μF reference bypass capacitor.
Additionally, this reference bypass capacitor will improve
transient response of the regulator, lowering the settling
time for transient load conditions. The linear regulator is
protected against both reverse input and reverse output
voltages.
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LTM8068
APPLICATIONS INFORMATION
For most applications, the design process is straight forward, summarized as follows:
1. Look at Table 1a (or Table 1b, if the post linear regulator is used) and find the row that has the desired input
range and output voltage.
2. Apply the recommended CIN, COUT1, COUT2, RFB1 and
RFB2 as required.
While these component combinations have been tested
for proper operation, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions. Bear in mind that
the maximum output current may be limited by junction temperature, the relationship between the input and
output voltage magnitude and polarity and other factors.
Please refer to the graphs in the Typical Performance
Characteristics section for guidance.
Capacitor Selection Considerations
The CIN, COUT1 and COUT2 capacitor values in Table 1 are
the minimum recommended values for the associated
operating conditions. Applying capacitor values below
those indicated in Table 1 is not recommended, and may
result in undesirable operation. Using larger values is
generally acceptable, and can yield improved dynamic
response, if it is necessary. Again, it is incumbent upon
the user to verify proper operation over the intended system’s line, load and environmental conditions.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable. X5R
and X7R types are stable over temperature and applied
voltage and give dependable service. Other types, including Y5V and Z5U have very large temperature and voltage
coefficients of capacitance. In an application circuit they
may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than
expected.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8068. A
ceramic input capacitor combined with trace or cable
inductance forms a high-Q (underdamped) tank circuit.
If the LTM8068 circuit is plugged into a live supply, the
input voltage can ring to much higher than its nominal
value, possibly exceeding the device’s rating. This situation is easily avoided; see the Hot-Plugging Safely section.
LTM8068 Table 1a. Recommended Component Values and Configuration for Specific VOUT1 Voltages (TA = 25°C)
VIN
VOUT1
CIN
COUT1
RFB1
2.8V to 40V
2.5V
2.2µF, 50V, 1206
100µF, 6.3V, 1210
15.4k
2.8V to 40V
3.3V
2.2µF, 50V, 1206
47µF, 6.3V, 1210
11.8k
2.8V to 40V
5V
2.2µF, 50V, 1206
22µF, 16V, 1210
8.25k
2.8V to 37V
8V
2.2µF, 50V, 1206
22µF, 16V, 1210
5.23k
2.8V to 33V
12V
4.7µF, 50V, 1206
10µF, 50V, 1210
3.48k
2.8V to 30V
15V
4.7µF, 50V, 1206
4.7µF, 25V, 1210
2.8k
2.8V to 27V
18V
4.7µF, 50V, 1206
4.7µF, 25V, 1210
2.37k
Note: An input bulk capacitor is required.
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For more information www.linear.com/LTM8068
11
LTM8068
APPLICATIONS INFORMATION
LTM8068 Table 1b. Recommended Component Values and Configuration for Specific VOUT2 Voltages (TA = 25°C)
VIN
VOUT1
VOUT2
CIN
COUT1
COUT2
RFB1
RFB2
2.8V to 40V
1.7V
1.2V
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
20.5k
open
2.8V to 40V
2V
1.5V
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
18.2k
2.32M
2.8V to 40V
2.4V
1.8V
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
15.8k
1.07M
2.8V to 40V
3.1V
2.5V
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
12.7k
487k
2.8V to 40V
3.9V
3.3V
2.2µF, 50V, 1206
47µF, 6.3V, 1210
10µF, 6.3V, 1206
10.5k
294k
2.8V to 38V
5.6V
5V
2.2µF, 50V, 1206
22µF, 16V, 1210
10µF, 6.3V, 1206
7.32k
162k
2.8V to 36V
8.6V
8V
2.2µF, 50V, 1206
22µF, 16V, 1210
10µF, 10V, 1206
4.89k
88.7k
2.8V to 32V
12.7V
12V
4.7µF, 50V, 1206
10µF, 50V, 1210
22µF, 16V, 1206
3.32k
56.2k
2.8V to 29V
15.8V
15V
4.7µF, 50V, 1206
4.7µF, 25V, 1210
22µF, 16V, 1206
2.67k
44.2k
2.8V to 26V
18.8V
18V
4.7µF, 50V, 1206
4.7µF, 25V, 1210
22µF, 25V, 1206
2.26k
36.5k
Note: An input bulk capacitor is required.
Isolation, Working Voltage and Safety Compliance
The LTM8068 isolation is 100% hi-pot tested by tying
all of the primary pins together, all of the secondary pins
together and subjecting the two resultant circuits to a
high voltage differential for one second. This establishes
the isolation voltage rating of the LTM8068 component.
The isolation rating of the LTM8068 is not the same as
the working or operational voltage that the application
will experience. This is subject to the application’s power
source, operating conditions, the industry where the end
product is used and other factors that dictate design
requirements such as the gap between copper planes,
traces and component pins on the printed circuit board, as
well as the type of connector that may be used. To maximize the allowable working voltage, the LTM8068 has two
columns of solder balls removed to facilitate the printed
circuit board design. The ball to ball pitch is 1.27mm, and
the typical ball diameter is 0.78mm. Accounting for the
missing columns and the ball diameter, the printed circuit
board may be designed for a metal-to-metal separation of
up to 3.03mm. This may have to be reduced somewhat to
allow for tolerances in solder mask or other printed circuit
board design rules. For those situations where information about the spacing of LTM8068 internal circuitry is
required, the minimum metal to metal separation of the
primary and secondary is 0.75mm.
To reiterate, the manufacturer’s isolation voltage rating
and the required working or operational voltage are often
12
different numbers. In the case of the LTM8068, the isolation voltage rating is established by 100% hi-pot testing. The working or operational voltage is a function of
the end product and its system level specifications. The
actual required operational voltage is often smaller than
the manufacturer’s isolation rating.
The LTM8068 is a UL recognized component under
UL 60950, file number E464570. The UL 60950 insulation category of the LTM8068 transformer is Functional.
Considering UL 60950 Table 2N and the gap distances
stated above, 3.03mm external and 0.75mm internal,
the LTM8068 may be operated with up to 250V working
voltage in a pollution degree 2 environment. The actual
working voltage, insulation category, pollution degree and
other critical parameters for the specific end application
depend upon the actual environmental, application and
safety compliance requirements. It is therefore up to the
user to perform a safety and compliance review to ensure
that the LTM8068 is suitable for the intended application.
VOUT2 Post Regulator
VOUT2 is produced by a high performance low dropout
300mA regulator. At full load, its dropout is less than
430mV. Its output is set by applying a resistor from the
RFB2 pin to GND; the value of RFB2 can be calculated by
the equation:
RFB2 =
608.78
kΩ
VOUT2 – 1.22
8068fb
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LTM8068
APPLICATIONS INFORMATION
VOUT2 Post Regulator Bypass Capacitance and Low
Noise Performance
PCB Layout
The VOUT2 linear regulator may be used with the addition
of a 0.01μF bypass capacitor from VOUT to the BYP pin
to lower output voltage noise. A good quality low leakage capacitor, such as a X5R or X7R ceramic, is recommended. This capacitor will bypass the reference of the
regulator, lowering the output voltage noise to as low as
20µVRMS. Using a bypass capacitor has the added benefit
of improving transient response.
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8068. The LTM8068 is nevertheless a switching power supply, and care must be taken to
minimize electrical noise to ensure proper operation. Even
with the high level of integration, you may fail to achieve
specified operation with a haphazard or poor layout. See
Figure 1 for a suggested layout. Ensure that the grounding
and heat sinking are acceptable.
Safety Rated Capacitors
A few rules to keep in mind are:
Some applications require safety rated capacitors, which
are high voltage capacitors that are specifically designed
and rated for AC operation and high voltage surges. These
capacitors are often certified to safety standards such
as UL 60950, IEC 60950 and others. In the case of the
LTM8068, a common application of a safety rated capacitor would be to connect it from GND to VOUTN. To provide
maximum flexibility, the LTM8068 does not include any
components between GND and VOUTN. Any safety capacitors must be added externally.
The specific capacitor and circuit configuration for any
application depends upon the safety requirements of the
system into which the LTM8068 is being designed. Table
2 provides a list of possible capacitors and their manufacturers. The application of a capacitor from GND to VOUTN
may also reduce the high frequency output noise on the
output.
MANUFACTURER PART NUMBER
DESCRIPTION
Murata
Electronics
4700pF, 250V AC, X7R,
4.5mm × 3.2mm
Capacitor
Johanson
Dielectrics
302R29W471KV3E-****-SC 470pF, 250V AC, X7R,
4.5mm × 2mm
Capacitor
Syfer Technology 1808JA250102JCTSP
2. Place the CIN capacitor as close as possible to the VIN
and GND connections of the LTM8068.
3. Place the COUT1 capacitor as close as possible to
VOUT1 and VOUTN. Likewise, place the COUT2 capacitor as close as possible to VOUT2 and VOUTN.
4. Place the CIN and COUT capacitors such that their
ground current flow directly adjacent or underneath
the LTM8068.
FB1
VOUT1
LTM8058
COUT1
Table 2. Safety Rated Capacitors
GA343DR7GD472KW01L
1. Place the RFB1 and RFB2 resistors as close as possible
to their respective pins.
100pF, 250V AC, C0G,
1808 Capacitor
VOUTN
RUN
FB2
BYP
COUT2
CIN
VOUT2
VIN
THERMAL/INTERCONNECT VIAS
8068 F01
Figure 1. Layout Showing Suggested External
Components, Planes and Thermal Vias
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For more information www.linear.com/LTM8068
13
LTM8068
APPLICATIONS INFORMATION
5. Connect all of the GND connections to as large a copper pour or plane area as possible on the top layer.
Avoid breaking the ground connection between the
external components and the LTM8068.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 1. The LTM8068 can benefit
from the heat sinking afforded by vias that connect
to internal GND planes at these locations, due to their
proximity to internal power handling components.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
Minimum Load
Due to the nature of the flyback regulator in general, and
the LTM8068 control scheme specifically, the LTM8068
requires a minimum load for proper operation. Otherwise,
the output may go out of regulation if the load is too
light. The most common way to address this is to place a
resistor across the output. The Minimum Load Current vs
VOUT Over Full Output Voltage Range graph in the Typical
Performance Characteristics section of may be used as
a guide in selecting the resistor. Note that this graph
describes room temperature operation. If the end application operates at a colder temperature, the minimum
load requirement may be higher and the minimum load
condition must be characterized for the lowest operating
temperature.
If it is impractical to place a resistive load permanently
across the output, a resistor and Zener diode may be
used instead, as shown in Figure 2. While the minimum
load resistor mentioned in the prior paragraph will always
draw current while the LTM8068 output is powered, the
series resistor-Zener diode combination will only draw
current if the output is too high. When using this circuit,
take care to ensure that the characteristics of the Zener
diode are appropriate for the intended application’s temperature range.
14
VOUTP
LTM8068
VOUTN
8068 F02
Figure 2: Use a Resistor and Zener Diode to Meet
the Minimum Load Requirement
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of the LTM8068. However, these capacitors can cause problems if the LTM8068 is plugged into
a live supply (see Linear Technology Application Note 88
for a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the voltage at the VIN pin of the LTM8068 can ring to more than
twice the nominal input voltage, possibly exceeding the
LTM8068’s rating and damaging the part. If the input
supply is poorly controlled or the user will be plugging
the LTM8068 into an energized supply, the input network
should be designed to prevent this overshoot. This can be
accomplished by installing a small resistor in series to VIN,
but the most popular method of controlling input voltage
overshoot is adding an electrolytic bulk capacitor to the
VIN net. This capacitor’s relatively high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of the
circuit, though it can be a large component in the circuit.
Thermal Considerations
The LTM8068 output current may need to be derated if
it is required to operate in a high ambient temperature.
The amount of current derating is dependent upon the
input voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristics section can be used as a guide. These
curves were generated by the LTM8068 mounted to
a 58cm2 4-layer FR4 printed circuit board. Boards of
other sizes and layer count can exhibit different thermal
behavior, so it is incumbent upon the user to verify proper
8068fb
For more information www.linear.com/LTM8068
LTM8068
APPLICATIONS INFORMATION
operation over the intended system’s line, load and environmental operating conditions.
For increased accuracy and fidelity to the actual application, many designers use FEA to predict thermal performance. To that end, the Pin Configuration section of the
data sheet typically gives four thermal coefficients:
θJA: Thermal resistance from junction to ambient
θJCbottom: Thermal resistance from junction to the
bottom of the product case
θJCtop: Thermal resistance from junction to top of the
product case
θJCboard: Thermal resistance from junction to the
printed circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion and inconsistency. These definitions are given in
JESD 51-12, and are quoted or paraphrased as follows:
θJA is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to
as still air although natural convection causes the air to
move. This value is determined with the part mounted to a
JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
θJCbottom is the junction-to-board thermal resistance with
all of the component power dissipation flowing through
the bottom of the package. In the typical µModule converter, the bulk of the heat flows out the bottom of the
package, but there is always heat flow out into the ambient
environment. As a result, this thermal resistance value
may be useful for comparing packages but the test conditions don’t generally match the user’s application.
θJCtop is determined with nearly all of the component
power dissipation flowing through the top of the package. As the electrical connections of the typical µModule
converter are on the bottom of the package, it is rare for
an application to operate such that most of the heat flows
from the junction to the top of the part. As in the case of
θJCbottom, this value may be useful for comparing packages but the test conditions don’t generally match the
user’s application.
θJCboard is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule converter and into the board, and is really the
sum of the θJCbottom and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two-sided,
two-layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that
none of these thermal coefficients reflects an actual physical operating condition of a µModule converter. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is given in Figure 3.
The blue resistances are contained within the µModule
converter, and the green are outside.
The die temperature of the LTM8068 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8068. The bulk of the heat flow out of the LTM8068
is through the bottom of the module and the BGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, resulting in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
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For more information www.linear.com/LTM8068
15
LTM8068
APPLICATIONS INFORMATION
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION
AMBIENT
JUNCTION-TO-CASE
CASE (BOTTOM)-TO-BOARD
(BOTTOM) RESISTANCE
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
8068 F03
µMODULE DEVICE
Figure 3. Approximate Thermal Model of LTM8068
TYPICAL APPLICATIONS
3.3V Flyback Converter
VOUT2 Maximum Load Current vs VIN
350
RUN
•
2.2µF
(3.9V)
47µF
VOUT2
•
LOW
NOISE
LDO
VOUT2
3.3V
300mA MAX
FB2
VOUTN
294k
10µF
FB1
10.5k
LTM8068
GND
LOAD CURRENT (mA)
VOUT1
VIN
VIN
2.8V TO 40V
250
150
8068 TA02a
50
PIN BYP IS NOT USED IN THIS SCHEMATIC
12V Flyback Converter with Low Noise Bypass
0
10
20
VIN (V)
30
40
8068 TA02b
VOUT2 Maximum Load Current vs VIN
250
VOUT1
RUN
4.7µF
•
(12.7V)
10µF
VOUT2
•
FB1
LOW
NOISE
LDO
0.01µF
BYP
FB2
VOUTN
3.32k
GND
LTM8068
VOUT2
12V
240mA MAX
22µF
56.2k
LOAD CURRENT (mA)
VIN
VIN
2.8V TO 32V
200
150
100
8068 TA03a
50
16
0
8
16
VIN (V)
24
32
8068 TA03b
8068fb
For more information www.linear.com/LTM8068
LTM8068
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION
B1
VOUT2
C1
D1
E1
GND
F1
A1
VOUT2
A2
FB2
B2
BYP
C2
D2
E2
GND
F2
A3
VOUTN
B3
VOUTN
C3
D3
E3
GND
F3
RUN
B4
VOUTN
C4
D4
E4
GND
F4
GND
A4
VOUTN
B5
VOUTN
C5
D5
E5
GND
F5
GND
A5
VOUTN
B6
VOUT1
C6
D6
E6
GND
F6
GND
A6
VOUT1
B7
VOUT1
C7
D7
E7
GND
F7
GND
A7
VOUT1
PIN
G1
G2
G3
G4
G5
G6
G7
FUNCTION PIN
VIN
H1
VIN
H2
H3
GND
H4
GND
H5
GND
H6
FB1
H7
FUNCTION
VIN
VIN
GND
GND
GND
GND
PACKAGE PHOTO
8068fb
For more information www.linear.com/LTM8068
17
4
For more information www.linear.com/LTM8068
E
SUGGESTED PCB LAYOUT
TOP VIEW
2.540
PACKAGE TOP VIEW
1.270
PIN “A1”
CORNER
0.3175
0.000
0.3175
aaa Z
1.270
Y
4.445
3.175
1.905
0.635
0.000
0.635
1.905
3.175
4.445
D
X
4.7625
4.1275
aaa Z
3.95 – 4.05
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
aaa
bbb
ccc
ddd
eee
NOM
4.92
0.60
4.32
0.75
0.63
11.25
9.0
1.27
8.89
7.62
DIMENSIONS
0.15
0.10
0.20
0.30
0.15
MAX
5.12
0.70
4.42
0.90
0.66
NOTES
DETAIL B
PACKAGE SIDE VIEW
TOTAL NUMBER OF BALLS: 38
MIN
4.72
0.50
4.22
0.60
0.60
DETAIL A
b1
0.27 – 0.37
SUBSTRATE
A1
ddd M Z X Y
eee M Z
DETAIL B
MOLD
CAP
ccc Z
A2
A
Z
(Reference LTC DWG # 05-08-1925 Rev A)
Øb (38 PLACES)
// bbb Z
18
2.540
b
3
F
e
SEE NOTES
7
5
4
3
2
1
DETAIL A
PACKAGE BOTTOM VIEW
6
G
H
G
F
E
D
C
B
A
PIN 1
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
4
7
TRAY PIN 1
BEVEL
!
BGA 38 1212 REV A
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu
5. PRIMARY DATUM -Z- IS SEATING PLANE
BALL DESIGNATION PER JESD MS-028 AND JEP95
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
7
SEE NOTES
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
COMPONENT
PIN “A1”
BGA Package
38-Lead (11.25mm × 9.00mm × 4.92mm)
LTM8068
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM8068#packaging for the most recent package drawings.
8068fb
3.810
3.810
LTM8068
REVISION HISTORY
REV
DATE
DESCRIPTION
A
05/16
Corrected symbol of internal switch on Block Diagram from NPN transistor to N-channel MOSFET
PAGE NUMBER
9
B
07/17
Added Minimum Load section
14
8068fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of itsinformation
circuits as described
herein will not infringe on existing patent rights.
For more
www.linear.com/LTM8068
19
LTM8068
TYPICAL APPLICATION
Maximum Load Current vs VIN
3.3V, 2.5V Dual Output Converter with Low Noise Bypass
VOUT1
RUN
•
2.2µF
•
BYP
FB2
10µF
487k
VOUTN
GND
VOUT2
2.5V
300mA MAX
0.01µF
FB1
11.8k
100µF
VOUT2
LOW
NOISE
LDO
LTM8068
400
VOUT1
3.3V
LOAD CURRENT (mA)
VIN
VIN
2.8V TO 40V
VOUT2
VOUT1
300
200
8068 TA04a
100
0
8
16
VIN (V)
24
32
8068 TA04b
DESIGN RESOURCES
SUBJECT
DESCRIPTION
µModule Design and Manufacturing Resources
Design:
• Selector Guides
• Demo Boards and Gerber Files
• Free Simulation Tools
µModule Regulator Products Search
1. Sort table of products by parameters and download the result as a spread sheet.
Manufacturing:
• Quick Start Guide
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
2. Search using the Quick Power Search parametric table.
TechClip Videos
Quick videos detailing how to bench test electrical and thermal performance of µModule products.
Digital Power System Management
Linear Technology’s family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
RELATED PARTS
Part Number Description
Comments
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2.8V ≤ VIN ≤ 40V, 2.5V ≤ VOUT ≤ 24V, UL60950 Recognized
LTM8047
725VDC, 1.5W Isolated µModule Converter
3.1V ≤ VIN ≤ 32V, 2.5V ≤ VOUT ≤ 12V
LTM8048
725VDC, 1.5W Isolated µModule Converter with
LDO Post Regulator
3.1V ≤ VIN ≤ 32V, 1.2V ≤ VOUT ≤ 12V; 20µVRMS Output Ripple
LTM8045
Inverting or SEPIC µModule DC/DC Converter
2.8V ≤ VIN ≤ 18V, 2.5V ≤ VOUT ≤ 15V or –2.5V ≤ VOUT ≤ –15V, Up to 700mA
LT 8300
Isolated Flyback Converter with 100VIN, 150V/260mA
Power Switch
6V ≤ VIN ≤ 100V, No Opt-Isolator Required
LT8301
Isolated Flyback Converter with 65V/1.2A Power Switch
2.7V ≤ VIN ≤ 42V, No Opt-Isolator Required
LT8302
Isolated Flyback Converter with 65V/3.6A Power Switch
2.8V ≤ VIN ≤ 42V, No Opt-Isolator Required
®
20
8068fb
LT 0717 REV B • PRINTED IN USA
For more information www.linear.com/LTM8068
www.linear.com/LTM8068
 LINEAR TECHNOLOGY CORPORATION 2016