LINER LTC1685IS8 52mbps, precision delay, rs485 fail-safe transceiver Datasheet

LTC1685
52Mbps, Precision Delay,
RS485 Fail-Safe Transceiver
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DESCRIPTIO
FEATURES
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Precision Propagation Delay Over Temperature:
Receiver/Driver: 18.5ns ±3.5ns
High Data Rate: 52Mbps
Low tPLH/tPHL Skew:
Receiver/Driver: 500ps Typ
–7V to 12V RS485 Input Common Mode Range
Guaranteed Fail-Safe Receiver Operation Over the
Entire Common Mode Range
High Receiver Input Resistance: ≥ 22k, Even When
Unpowered
Short-Circuit Protected
Thermal Shutdown Protected
Driver Maintains High Impedance in Three-State or
with Power Off
Single 5V Supply
Pin Compatible with LTC485
45dB CMRR at 26MHz
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APPLICATIO S
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High Speed RS485/RS422 Transceivers
Level Translator
Backplane Transceiver
STS-1/OC-1 Data Transceiver
Fast-20, Fast-40 SCSI Transceivers
A unique architecture provides very stable propagation
delays and low skew over a wide common mode and
ambient temperature range.
The driver and receiver feature three-state outputs, with
disabled driver outputs maintaining high impedance over
the entire common mode range. A short circuit feature
detects shorted outputs and substantially reduces driver
output current. A similar feature also protects the receiver
output from short circuits. Thermal shutdown circuitry
protects from excessive power dissipation.
The receiver has a fail-safe feature that guarantees a high
output state when the inputs are shorted or are left floating.
The LTC1685 RS485 transceiver guarantees receiver failsafe operation over the entire common mode range (– 7V
to 12V). Input resistance will remain ≥ 22k when the device
is unpowered or disabled.
The LTC1685 operates from a single 5V supply and draws
only 7mA of supply current.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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The LTC®1685 is a high speed, precision delay RS485
transceiver that can operate at data rates as high as 52Mbps.
The device also meets the requirements of RS422.
TYPICAL APPLICATION
RO1
R
10Mbps Data Pulse
400ft Category 5 UTP
VCC1
RE1
DI1
2V/DIV
Rt
DE1
D
DRIVER INPUT
CABLE DELAY
GND1
1V/DIV
RECEIVER
INPUT
5V/DIV
RECEIVER
OUTPUT
Rt
RO2
R
VCC2
RE2
DE2
DI2
D
GND2
1685 TA01
100ns/DIV
1685 TA02
1
LTC1685
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RATI GS
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ABSOLUTE
PACKAGE/ORDER I FOR ATIO
(Note 1)
Supply Voltage (VDD) .............................................. 10V
Control Input Currents .................... – 100mA to 100mA
Control Input Voltages .................. – 0.5V to VDD + 0.5V
Driver Input Voltages .................... – 0.5V to VDD + 0.5V
Driver Output Voltages .................................. +12V/– 7V
Receiver Input Voltages ................................. +12V/– 7V
Receiver Output Voltages ............. – 0.5V to VDD + 0.5V
Receiver Input Differential ...................................... 10V
Short-Circuit Duration (Driver VOUT: – 7V to 10V,
Receiver VOUT: 0V to VDD) ............................... Indefinite
Operating Temperature Range
LTC1685C ............................................... 0°C to 70°C
LTC1685I ............................................. –40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
TOP VIEW
RO 1
RE 2
DE 3
DI 4
8
VDD
7
B
6
A
5
GND
R
D
LTC1685CS8
LTC1685IS8
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
1685
1685I
TJMAX = 125°C, θJA = 150°C/ W
Consult factory for Military grade parts.
DC ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 5V ± 5%, unless otherwise noted. (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
VOD1
Differential Driver Output (Unloaded)
IOUT = 0
●
VOD2
Differential Driver Output (With Load)
R = 50Ω (RS422)
R = 27Ω (RS485), Figure 1
●
Change in Magnitude of Driver Differential
Output Voltage for Complementary
Output States
R = 27Ω or 50Ω, Figure 1
●
VOC
Driver Common Mode Output Voltage
R = 27Ω or 50Ω, VDD = 5V, Figure 1
●
∆VOC
Change in Magnitude of Driver Common
Mode Output Voltage for Complementary
Output States
R = 27Ω or 50Ω, Figure 1
●
VIH
Input High Voltage
DE, DI, RE
●
VIL
Input Low Voltage
DE, DI, RE
●
IIN1
Input Current
DE, DI, RE
●
IIN2
Input Current (A, B)
VA, VB = 12V, DE = 0, VDD = 0V or 5.25V
VA, VB = – 7V, DE = 0, VDD = 0V or 5.25V
●
●
– 500
●
– 0.3
∆VOD
MIN
VTH
Differential Input Threshold Voltage
for Receiver
– 7V ≤ VCM ≤ 12V
∆VTH
Receiver Input Hysteresis
VCM = 0V
VOH
Receiver Output High Voltage
IOUT = – 4mA, VID = 300mV
●
VOL
Receiver Output Low Voltage
IOUT = 4mA, VID = – 300mV
●
IOZR
Three-State (High Impedance) Output
Current at Receiver
0.4V ≤ VOUT ≤ 2.4V
●
IDD
Supply Current
No Load, Pins 2, 3, 4 = 0V or VDD
●
IOSD1
Driver Short-Circuit Current, VOUT = HIGH
VOUT = – 7V or 10V (Note 5)
●
2
TYP
2
1.5
2
MAX
UNITS
VDD
V
VDD
V
V
0.2
V
3
V
0.2
V
2
V
0.8
–1
3.5
V
1
µA
500
µA
µA
0.3
V
25
mV
4.8
V
–1
7
0.4
V
1
µA
12
mA
20
mA
LTC1685
DC ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 5V ±5%, unless otherwise noted. (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
IOSD2
Driver Short-Circuit Current, VOUT = LOW
VOUT = – 7V or 10V (Note 5)
●
20
mA
IOSR
Receiver Short-Circuit Current
VOUT = 0V or VDD (Note 5)
●
20
mA
RIN
Input Resistance
– 7V ≤ VCM ≤ 12V
●
22
CIN
Input Capacitance
A, B Inputs, D, DE, RE
Open-Circuit Input Voltage, Figure 5
VDD = 5V (Note 4)
●
3.2
kΩ
3
Fail-Safe Time Time to Detect Fail-Safe Condition
3.3
pF
3.4
Receiver Input Common Mode Rejection Ratio
VCM = 2.6V, f = 26MHz
CLOAD
Receiver and Driver Output Load Capacitance
(Note 4)
45
dB
500
●
V
µs
2
CMRR
UNITS
pF
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SWITCHING CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, unless otherwise noted. (Notes 2, 3)
SYMBOL
PARAMETER
tPLH, tPHL
Driver Input-to-Output
Propagation Delay
RDIFF = 54Ω, CL1 = CL2 = 100pF, Figures 3, 5,
LTC1685C
LTC1685I
tSKEW
Driver Output A-to-Output
B Skew
RDIFF = 54Ω, CL1 = CL2 = 100pF,
Figures 3, 5
500
ps
tr, tf
Driver Rise/Fall Time
RDIFF = 54Ω, CL1 = CL2 = 100pF,
Figures 3, 5
3.5
ns
tZH
Driver Enable to Output High
CL = 100pF, S2 Closed, Figures 4, 6
●
25
50
ns
tZL
Driver Enable to Output Low
CL = 100pF, S1 Closed, Figures 4, 6
●
25
50
ns
tLZ
Driver Disable from Low
CL = 15pF, S1 Closed, Figures 4, 6
●
25
50
ns
t HZ
Driver Disable from High
CL = 15pF, S2 Closed, Figures 4, 6
●
25
50
ns
tPLH, tPHL
Receiver Input-to-Output
Propagation Delay
CL = 15pF, Figures 3, 7
LTC1685C
LTC1685I
●
●
18.5
18.5
22
25
ns
ns
tSQD
Receiver Skew tPLH – tPHL
CL = 15pF, Figures 3, 7
tZL
Receiver Enable to Output Low
CL = 15pF, S1 Closed, Figures 2, 8
●
25
50
ns
tZH
Receiver Enable to Output High
CL = 15pF, S2 Closed, Figures 2, 8
●
25
50
ns
tLZ
Receiver Disable from Low
CL = 15pF, S1 Closed, Figures 2, 8
●
25
50
ns
t HZ
Receiver Disable from High
CL = 15pF, S2 Closed, Figures 2, 8
●
25
Maximum Receiver Input
Rise/Fall Times
(Note 4)
●
Package-to-Package Skew
Same Temperature (Note 4)
Minimum Input Pulse Width
VDD = 5V ± 5% (Note 4)
LTC1685C
LTC1685I
●
●
VDD = 5V ± 5% (Note 4)
LTC1685C
LTC1685I
●
●
52
40
60
50
Mbps
Mbps
VDD = 5V ± 5% (Note 4)
LTC1685C
LTC1685I
●
●
26
20
30
25
MHz
MHz
tPKG-PKG
Maximum Data Rate
Maximum Input Frequency
CONDITIONS
●
●
MIN
TYP
MAX
15
13
18.5
18.5
22
25
15
13
500
ns
ns
ps
50
ns
2000
ns
1.5
17
20
UNITS
ns
19.2
25
ns
ns
3
LTC1685
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SWITCHING CHARACTERISTICS
Note 4: Guaranteed by design, but not tested.
Note 5: Short-circuit current does not represent output drive capability.
When the output detects a short-circuit condition, output drive current is
significantly reduced (from hundreds of mA to 20mA max) until the short
is removed.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All currents into the device pins are positive; all currents out of the
device pins are negative.
Note 3: All typicals are given for VDD = 5V, TA = 25°C.
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TYPICAL PERFORMANCE CHARACTERISTICS
Receiver Input CMRR
Supply Current vs Data Rate
59
BOTH DRIVER AND RECEIVER
ENABLED AND LOADED
60 T = 25°C
A
45.5
45.0
44.5
44.0
43.5
43.0
58
SUPPLY CURRENT (mA)
46.0
50
40
30
20
10
42.5
TA = 25°C
100k
FREQUENCY (Hz)
1
1M
10
20
30
DATA RATE (Mbps)
Receiver Propagation Delay
vs Load Capacitance
25
TA = 25°C
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
25
20
15
10
5
105
25
35
55
LOAD CAPACITANCE (pF)
205
1685 G04
4
53
52
BOTH DRIVER AND RECEIVER
ENABLED AND LOADED
25Mbps DATA RATE
– 25
0
25
50
TEMPERATURE (°C)
75
100
1685 G03
Receiver Propagation Delay
vs Input Overdrive
Receiver Propagation Delay
vs Common Mode
30
15
55
54
1685 G02
1685 G01
5
56
50
–50
50
40
25
TA = 25°C
RECEIVER PROPAGATION DELAY (ns)
1k
10
57
51
0
42.0
0
Supply Current vs Temperature
70
SUPPLY CURRENT (mA)
COMMON MODE REJECTION RATIO (dB)
46.5
20
15
10
5
TA = 25°C
20
15
10
5
0
0
8 10
–7 –4 –2 0
4
6
2
RECEIVER COMMON MODE (V)
12
1685 G05
0.3
0.5 0.7 1.0 1.25 1.5 2.0
RECEIVER INPUT OVERDRIVE (V)
2.5
1685 G06
LTC1685
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TYPICAL PERFORMANCE CHARACTERISTICS
Receiver Propagation Delay
vs Temperature
Receiver Maximum Data Rate
vs Input Overdrive
25
Driver Propagation Delay
vs Temperature
25
70
TA = 25°C
15
10
PROPAGATION DELAY (ns)
DATA RATE (Mbps)
PROPAGATION DELAY (ns)
60
20
50
40
30
20
5
–25
50
25
0
75
TEMPERATURE (°C)
100
125
0
0.3
1.5
1.0
0.4
0.5 0.6 0.7
RECEIVER INPUT DIFFERENTIAL (V)
1680 G09
0
– 40 – 20
2.5
20
40
60
0
TEMPERATURE (°C)
80
100
1685 G07
Driver Propagation Delay
vs Capacitive Load
19.0
25
TA = 25°C
VDD = 5V
INPUT THRESHOLD = 1.5V
TA = 25°C
tHL
18.5
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
10
1685 G10
Driver Propagation Delay
vs Driver Input Voltage
20
15
5
10
0
–50
20
tLH
15
10
5
18.0
17.5
17.0
16.5
0
2.5
16.0
3.0
4.0
4.5
3.5
DRIVER INPUT VOLTAGE (V)
5.0
5
15
100
25
50
75
LOAD CAPACITANCE (pF)
150
1685 G11
1685 G08
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PIN FUNCTIONS
RO (Pin 1): Receiver Output. If A ≥ B by 300mV, then RO
will be high. If A ≤ B by 300mV, then RO will be low.
RE (Pin 2): Receiver Enable. RE = Low enables the
receiver. RE = High forces receiver output into high
impedance state. Do not float.
DE (Pin 3): Driver Enable. DE = High enables the driver.
DE = Low will force the driver output into a high impedance
state and the device will function as a line receiver if RE is
also low. Do not float.
DI (Pin 4): Driver Input. Controls the states of the A and
B outputs only if DE = High. If DE = Low, DI will have no
effect on A and B pins. Do not float.
GND (Pin 5): Ground.
A (Pin 6): Noninverting Receiver Input/Driver Output.
B (Pin 7): Inverting Receiver Input/Driver Output.
VDD (Pin 8): Positive Supply, 5V to ±5%. Bypass with
0.1µF ceramic capacitor.
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LTC1685
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FU CTIO TABLES
Receiving
Transmitting
RE
INPUTS
DE
DI
LINE
CONDITION
B
A
RE
INPUTS
DE
A–B
OUTPUT
RO
X
1
1
No Fault
0
1
0
0
≥ 300mV
1
X
1
0
No Fault
1
0
0
0
≤ – 300mV
0
X
0
X
X
Hi-Z
Hi-Z
0
0
Inputs Open
1
X
1
X
Fault
0
0
Inputs Shorted Together
A = B = – 7V to 12V
1
1
X
X
Hi-Z
OUTPUTS
±10mA Current Source
TEST CIRCUITS
A
RECEIVER
OUTPUT
1k
VDD
VOD
R
S1
TEST POINT
R
CL
15pF
VOC
1k
S2
1685 F02
B
1685 F01
Figure 2. Driver DC Test Load
Figure 1. Driver DC Test Load
3V
DE
CL1
A
DI
RDIFF
B
A
S1
RO
B
CL2
OUTPUT
UNDER TEST
RE
15pF
VDD
500Ω
S2
CL
1685 F04
1685 F03
Figure 3. Driver/Receiver Timing Test Circuit
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Figure 4. Driver Timing Test Load #2
LTC1685
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SWITCHI G TI E WAVEFOR S
3V
f = 1MHz, t r ≤ 3ns, t f ≤ 3ns
1.5V
DI
1.5V
0V
t PLH
1/2 VO
t PHL
B
VO
A
tSKEW
1/2 VO
VO
0V
–VO
t SKEW
90%
90%
VDIFF = V(A) – V(B)
10%
tr
10%
1586 F05
tf
Figure 5. Driver Propagation Delays
3V
f = 1MHz, t r ≤ 3ns, t f ≤ 3ns
1.5V
DE
1.5V
0V
5V
t ZL
A, B
t LZ
2.5V
OUTPUT NORMALLY LOW
0.5V
2.5V
OUTPUT NORMALLY HIGH
0.5V
VOL
VOH
A, B
0V
t HZ
t ZH
1686 F06
Figure 6. Driver Enable and Disable Times
VOH
2.5V
RO
VOL
f = 1MHz, t r ≤ 3ns, t f ≤ 3ns
t PHL
VOD2
A–B
–VOD2
0V
2.5V
OUTPUT
t PLH
INPUT
1686 F07
Figure 7. Receiver Propagation Delays
3V
1.5V
RE
f = 1MHz, t r ≤ 3ns, t f ≤ 3ns
1.5V
0V
5V
t ZL
RO
RO
t LZ
2.5V
OUTPUT NORMALLY LOW
0.5V
2.5V
OUTPUT NORMALLY HIGH
0.5V
0V
t ZH
t HZ
1685 F08
Figure 8. Receiver Enable and Disable Times
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LTC1685
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EQUIVALENT INPUT NETWORKS
≥22k
≥22k
A
3.3V
A
≥22k
≥22k
B
B
3.3V
DE = 0, RE = 0 OR 1
VDD = 5V
VDD = 0V
1685 F09
Figure 9. Input Thevenin Equivalent
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APPLICATIONS INFORMATION
Theory of Operation
Fail-Safe Features
Unlike typical CMOS transceivers whose propagation
delay can vary by as much as 500% from package to
package and show significant temperature drift, the
LTC1685 employs a novel architecture that produces a
tightly controlled and temperature compensated propagation delay. The differential timing skew is also minimized
between rising and falling output edges of the receiver
output and the complementary driver outputs.
The LTC1685 has a fail-safe feature that guarantees the
receiver output to be in a logic HIGH state when the inputs
are either shorted or left open (note that when inputs are
left open, large external leakage currents might override
the fail-safe circuitry). In order to maintain good high
frequency performance, it was necessary to slow down
the transient response of the fail-safe feature. When a line
fault is detected, the output will go HIGH typically in 2µs.
Note that the LTC1685 guarantees fail-safe performance
over the entire (– 7V to 12V) common mode range!
The precision timing features of the LTC1685 reduce
overall system timing constraints by providing a narrow
±3.5ns window during which valid data appears at the
receiver/driver output. The driver and receiver pair will
have propagation delays that typically match to within 1ns.
In clocked data systems, the low skew minimizes duty
cycle distortion of the clock signal. The LTC1685 can be
used at data rates of 52Mbps with less than 5% duty cycle
distortion (depending on cable length). When a clock
signal is used to retime parallel data, the maximum recommended data transmission rate is 26Mbps to avoid timing
errors due to clock distortion.
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When the inputs are accidentally shorted (by cutting
through a cable, for example), the short circuit fail-safe
feature will guarantee a high output logic level. Note also
that if the line driver is removed and the termination
resistors are left in place, the receiver will see this as a
“short” and output a logic HIGH. Both of these fail-safe
features will keep the receiver from outputting false data
pulses under line fault conditions.
Thermal shutdown and short-circuit protection prevent
latchup damage to the LTC1685 during fault conditions.
LTC1685
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APPLICATIONS INFORMATION
Output Short-Circuit Protection
The LTC1685 employs voltage sensing short-circuit protection at the output terminals of both the driver and
receiver. For a given input polarity, this circuitry determines what the correct output level should be. If the output
level is different from the expected, it shuts off the big
output devices. For example, if the driver input is >2V, it
expects the “A” output to be >3.25V and the “B” output to
be <1.75V. If the “A” output is subsequently shorted to a
voltage below VDD/2, this circuitry shuts off the big output
devices and turns on a smaller device in its place (the
converse applies for the “B” output). The outputs then
appear as ±10mA current sources. Note that under normal
operation, the output drivers can sink/source >50mA. A
time-out period of about 50ns is used in order to maintain
normal high frequency operation, even under heavy capacitive loads.
If the cable is shorted at a large distance from the device
outputs, it is possible for the short to go unnoticed at the
driver outputs due to parasitic cable resistance. Additionally, when the cable is shorted, it no longer appears as an
ideal transmission line, and the parasitic Ls and Cs might
give rise to ringing and even oscillation. All these conditions
disappear once the device comes out of short-circuit mode.
For cables with the typical RS485 termination (no DC bias
on the cable, such as Figure 10), the LTC1685 will automatically come out of short-circuit mode once the physical
short has been removed. With cable terminations with a
DC bias (such as Fast-20 and Fast-40 differential SCSI
terminators, see Figure 15), the LTC1685 will not come
out of short-circuit mode automatically upon release of the
physical short. In order to resume normal operation, the
DE pin has to be pulsed low for at least 200ns.
High Speed Twisted Pair Transmission
Data rates up to 52Mbps can be transmitted over 100ft of
category 5 twisted pair. Figure 10 shows the LTC1685
receiving differential data from another LTC1685 transceiver. Figure 11a shows a 26MHz (52Mbps) square wave
propagated over 100ft of category 5 UTP. Figure 11b
shows a more stringent case of propagating a single 20ns
pulse over 100ft of category 5 UTP. Figure 12 shows a
4Mbps square wave over 1000ft of category 5 unshielded
twisted pair.
2V/DIV
RO
1685 F11
Figure 11a. 100ft of Category 5 UTP: 50Mbps
DRIVER
INPUT
CABLE DELAY
RE
2
1
1
7
DI
RECEIVER
OUTPUT
10ns/DIV
2V/DIV
RE
2
DRIVER
INPUT
2V/DIV
4
3
DE
LTC1685
6
RO
7
100Ω
100Ω
EN
EN
A 1
4
2 B
1/4 LTC1518
12
4
6
3
DE
2V/DIV
RECEIVER
INPUT
5V/DIV
RECEIVER
OUTPUT
DI
LTC1685
3
RO
1685 F10b
20ns/DIV
1685 F11b
Figure 10
Figure 11b. 100ft of Category 5 UTP: 20ns Pulse
9
LTC1685
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APPLICATIONS INFORMATION
2V/DIV
DRIVER
INPUT
2V/DIV
1V/DIV
RECEIVER
INPUT
5V/DIV
RECEIVER
OUTPUT
RECEIVER
OUTPUT
2V/DIV
1µs/DIV
100ns/DIV
1685 F14a
1685 F12
Figure 12. 1000ft of Category 5 UTP: 4Mbps
Figure 14a. 4000ft of Category 5 UTP: 1µs Pulse
DRIVER INPUT
2V/DIV
2V/DIV
DIFFERENTIAL
RECEIVER
INPUT
2V/DIV
RECEIVER
OUTPUT
20ns/DIV
1685 F13
Figure 13. 100ft of Telephone Grade UTP: 30Mbps
Very inexpensive unshielded telephone grade twisted pair
is shown in Figure 13. In spite of the noticeable loss at the
receiver input, the LTC1685 can still transfer 30Mbps at
100ft of telephone grade UTP. Note that under all these
conditions, the LTC1685 can pass through a single data
pulse equal to the inverse of the data rate (e.g., 20ns for
50Mbps data rate).
Even at distances of 4000ft, 1Mbps data rates are possible
using the LTC1685 and category 5 UTP. Figure 14a shows
a 1µs pulse propagated down 4000ft of category 5 UTP.
Notice both the DC and the AC losses at the receiver input.
The DC attenuation is due to the parasitic resistance of the
cable. Figure 14b shows a 1Mbps square wave over
4000ft. To transmit at this speed but using longer cable
lengths, see the LTC1686/LTC1687 high speed RS485
full-duplex transceivers.
10
DRIVER
INPUT
CABLE DELAY
2V/DIV
DRIVER
INPUT
5V/DIV
RECEIVER
OUTPUT
1µs/DIV
1685 F14b
Figure 14b. 4000ft of Category 5 UTP: 1Mbps Square Wave
High Speed Backplane Transmission
The LTC1685 can also be used in backplane point-to-point
transceiver applications, where the user wants to assure
operation even when the common mode goes above or
below the rails. It is advisable to terminate the PC traces
when approaching maximum speeds. Since the LTC1685
is not intended to drive parallel terminated cables with
characteristic impedances much less than that of twisted
pair, both ends of the PC trace must be series terminated
with the characteristic impedance of the trace. For best
results, the signal should be routed differentially. The true
and complement outputs of the LTC1685 should be routed
on adjacent layers of the PC board. The two traces should
be routed very symmetrically, minimizing and equalizing
parasitics to nearby signal and power/ground layers. For
single-ended transmission, route the series terminated
LTC1685
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APPLICATIONS INFORMATION
single-ended trace over an adjacent ground plane. Then
set the (bypassed) negative input of the receiver to roughly
2.5V. Note that single-ended operation might not reach
maximum speeds.
High Speed Differential SCSI (Fast-20, Fast-40 HVD)
The LTC1685’s high speed, tight propagation delay window and matched driver/receiver propagation delays make
it a natural choice as the external transceiver in high speed
differential SCSI applications. Note that the ±3.5ns propagation delay window covers the entire commercial temperature range. If, for example, a group of 16 transceivers
is placed on the same board, their temperature difference
will be much smaller. Hence, the difference in their propagation delays should be even better than the ±3.5ns
specification (typically better than ±2ns). The LTC1685 is
the most efficient and reliable implementation that meets
the Fast-20 and Fast-40 HVD driver and receiver skew
specifications.
Power-Up Requirements
The LTC1685 has unique short-circuit protection that
shuts off the big output devices (and keeps them off) when
a short is detected. When the LTC1685 is powered up with
the driver outputs enabled (Figure 15 shows a typical
connection), the part will power up in short-circuit mode.
After power-up, the user must hold the DE pin of the
LTC1685 low for at least 200ns in order to start normal
operation. Note also that turning the termination power
on/off might induce the LTC1685 to see a “short.” Consequently, the DE pin should be held low for 200ns after
cable termination power is turned on.
This requirement is solely due to the cable termination
(the 165Ω parallel resistance to both power and ground).
For applications whose connections to the cable are
made exclusively with RS485 devices, the cable can be
terminated only across the two signal wires (as in Figure
10). With cable distances covering under 25 meters, the
common mode range of the LTC1685 should be more
than sufficient to account for any ground differences
between any two communicating devices. The fact that
transmission is differential should greatly improve noise
TERM POWER
RE TERM POWER
2
RO
1
1
330Ω
122Ω CABLE
4
3
DE
6
LTC1685
RO
330Ω
7
DI
RE
2
7
150Ω
150Ω
330Ω
EN
EN
4
A 1
2 B
330Ω
1/4 LTC1518
12
4
6
DI
3
DE
LTC1685
3
RO
1685 F15
Figure 15. Fast-20, Fast-40 Differential SCSI Application
margin. Furthermore, the good high frequency CMRR of
the receiver will serve to reject any common mode
interference.
DE, DI Inputs
It is not necessary that the driver input (DI) have 0V to 3V
signal levels. The DI input can be driven by CMOS levels
(0V to 5V) and still achieve 40Mbps operation. However,
duty cycle will be slightly compromised when driven by a
CMOS device. Care should be taken to minimize the
ringing on the DI input in order to achieve a driver
propagation delay within the ±3.5ns window. This also
improves the package-to-package matching of propagation delays.
The DE pin should be held low for 200ns after the powerup sequence has been completed. After fault conditions
such as an output short or thermal shutdown, the DE pin
should be held low for at least 200ns after the fault has
been removed. This is usually necessary only if the driver
outputs are connected to DC-biased cable terminations
(as in Figure 15).
Layout Considerations
A ground plane is recommended when using a high
frequency device like the LTC1685. A 0.1µF ceramic bypass capacitor less than 1/4 inch away from the VDD pin is
recommended. Good bypassing is especially needed when
operating at maximum frequency or when package-topackage matching is very important. The PC board traces
connected to the “A” and “B” outputs must be kept as
symmetrical and short as possible to obtain the same
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1685
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APPLICATIONS INFORMATION
parasitic board capacitance. This maintains the good
matching characteristics of the low-to-high and high-tolow transitions of the LTC1685. Note that output “A” to
output “B” capacitance should also be minimized. If routed
adjacent to each other on the same layer, they should be
separated by an amount at least as wide as the trace
widths. If output “A” and output “B” are routed on different
signal planes, they should not be routed directly on top of
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PACKAGE DESCRIPTION
each other. A trace width’s lateral separation is also
recommended.
As mentioned before, care should also be taken when
routing the “DI” input. To achieve consistent board-toboard propagation delay, the ringing on this signal should
be kept below a few hundred millivolts.
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
2
3
4
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.050
(1.270)
BSC
SO8 0695
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1485
High Speed RS485 Transceiver
10Mbps, Pin Compatible with LTC485
LTC1518/LTC1519
High Speed Quad RS485 Receivers
52Mbps, Pin Compatible with LTC488/LTC489
LTC1520
High Speed Quad Differential Receiver
52Mbps, ±100mV Threshold, Rail-to-Rail Common Mode
LTC1686/LTC1687
High Speed RS485 Driver/Receiver
52Mbps, Pin Compatible with LTC490/LTC491
LTC1688/LTC1689
High Speed Quad RS485 Drivers
100Mbps, Pin Compatible with LTC486/LTC487
12
Linear Technology Corporation
1685fa LT/LCG 0700 2K REV A • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1997