MC10H350 PECL* to TTL Translator (+5 Vdc Power Supply Only) Description The MC10H350 is a member of the 10H family of high performance ECL logic. It consists of 4 translators with differential inputs and TTL outputs. The 3-state outputs can be disabled by applying a HIGH TTL logic level on the common OE input. The MC10H350 is designed to be used primarily in systems incorporating both ECL and TTL logic operating off a common power supply. The separate VCC power pins are not connected internally and thus isolate the noisy TTL VCC runs from the relatively quiet ECL VCC runs on the printed circuit board. The differential inputs allow the MC10H350 to be used as an inverting or noninverting translator, or a differential line receiver. The MC10H350 can also drive CMOS with the addition of a pullup resistor. www.onsemi.com 16 20 1 1 PDIP−16 P SUFFIX CASE 648−08 PLLC−20 FN SUFFIX CASE 775−02 MARKING DIAGRAMS* Features • Propagation Delay, 3.5 ns Typical • MECL 10K™ Compatible • These Devices are Pb-Free, Halogen Free and are RoHS Compliant 1 20 16 MC10H350P AWLYYWWG 10H350G AWLYYWW 1 PDIP−16 A WL, L YY, Y WW, W G PLLC−20 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping† MC10H350FNG PLLC−20 (Pb-Free) 46 Units / Tube MC10H350FNR2G PLLC−20 (Pb-Free) 500 Tape & Reel MC10H350PG PDIP−16 (Pb-Free) 25 Units / Tube †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2012 August, 2016 − Rev. 11 1 Publication Order Number: MC10H350/D MC10H350 10 13 14 15 VCC (+5.0 VDC) = PINS 1 AND 16 GND = PIN 8 (DIP) Figure 1. Logic Diagram COUT NC TTL VCC ECL VCC TTL VCC AOUT 2 15 COUT AIN 3 14 CIN AIN 4 18 CIN AIN 4 13 CIN AIN 5 17 CIN NC 6 16 NC BIN 7 15 DIN BIN 8 14 DIN BIN 5 12 DIN BIN 6 11 DIN BOUT 7 10 DOUT GND 8 9 OE MC10H350 9 10 11 12 13 OE 11 12 1 20 19 16 DOUT 7 2 1 NC 5 6 3 ECL VCC GND 2 BOUT 3 4 AOUT 9 Pin assignment is for Dual-in-Line Package. Figure 2. Dip Pin Assignment Figure 3. PLCC−20 Pin Assignment Table 1. MAXIMUM RATINGS Symbol VCC Characteristic Power Supply (VEE = GND) TA Operating Temperature Range Tstg Storage Temperature Range − Plastic Rating Unit 7.0 Vdc 0 to +75 °C −55 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2 MC10H350 Table 2. ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%) (Note 1) TA = 0°C to 75°C Symbol Characteristic Min Max Unit ICC Power Supply Current TTL ECL − − 20 12 mA IIH IINH Input Current High Pin 9 Others − − 20 50 IIL IINL Input Current Low Pin 9 Others − − −0.6 50 VIH Input Voltage High Pin 9 2.0 − Vdc VIL Input Voltage Low Pin 9 − 0.8 Vdc mA mA VDIFF Differential Input Voltage (Note 1) Pins 3−6, 11−14 (1) 350 − mV VCM Voltage Common Mode Pins 3−6, 11−14 2.8 VCC Vdc VOH Output Voltage High IOH = 3.0 mA 2.7 − Vdc VOL Output Voltage Low IOL = 20 mA − 0.5 Vdc IOS Short Circuit Current VOUT = 0 V −60 −150 mA IOZH Output Disable Current High VOUT = 2.7 V − 50 mA IOZL Output Disable Current Low VOUT = 0.5 V − −50 mA *Positive Emitter Coupled Logic 1. Common mode input voltage to pins 3−4, 5−6, 11−12, 13−14 must be between the values of 2.8 V and 5.0 V. This common mode input voltage range includes the differential input swing. 2. For single−ended use, apply 3.75 V (VBB) to either input depending on output polarity required. Signal level range to other input is 3.3 V to 4.2 V. 3. Any unused gates should have the inverting inputs tied to VCC and the noninverting inputs tied to ground to prevent output glitching. Table 3. AC PARAMETERS (CL = 50 pF) (VCC = 5.0 ± 5%) (TA = 0°C to 75°C) TA = 0°C to 75°C Symbol Min Max Unit Propagation Delay Data (50% to 1.5 V) 1.5 5.0 ns tr Rise Time (Note 1) 0.3 1.6 ns tf Fall Time (Note 1) 0.3 1.6 ns tpdLZ tpdHZ Output Disable Time 2.0 2.0 6.0 6.0 ns tpdZL tpdZH Output Enable Time 2.0 2.0 8.0 8.0 ns tpd Characteristic NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. 1.0 V to 2.0 V w/50 pF into 500 W. www.onsemi.com 3 MC10H350 3-STATE OUTPUT LOW ENABLE AND DISABLE TIMES 3-STATE OUTPUT HIGH ENABLE AND DISABLE TIMES OE OE 1.5 V 1.5 V TPZL VOUT 1.5 V 1.5 V TPZH TPLZ 1.5 V 1.5 V TPHZ QVOH ≈ 3.5 V VOUT VOL 0.3 V 0.3 V Figure 4. 3-State Switching Waveforms +7.0 V OPEN TPZL, TPLZ, O, C, ALL OTHER 500 W D.U.T . 500 W 50 PF *INCLUDES JIG AND PROBE CAPACITANCE Application Note: Pin 9 is an OE and the MC10H350 is disabled when OE is at VIH or higher. Figure 5. Test Load www.onsemi.com 4 MC10H350 PACKAGE DIMENSIONS 20 LEAD PLLC FN SUFFIX CASE 775−02 ISSUE F B 0.007 (0.180) Y BRK −N− M T L-M 0.007 (0.180) U M N S T L-M S G1 0.010 (0.250) S N S D −L− −M− Z W 20 D 1 X V S T L-M S N S VIEW D−D A 0.007 (0.180) M T L-M S N S R 0.007 (0.180) M T L-M S N S Z C H −T− VIEW S G1 0.010 (0.250) S T L-M SEATING PLANE F 0.007 (0.180) VIEW S S N T L-M S N S K 0.004 (0.100) J M K1 E G 0.007 (0.180) S NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. DIMENSIONS IN INCHES. 3. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). www.onsemi.com 5 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.021 0.050 BSC 0.026 0.032 0.020 −−− 0.025 −−− 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 −−− 0.020 2_ 10 _ 0.310 0.330 0.040 −−− MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.53 1.27 BSC 0.66 0.81 0.51 −−− 0.64 −−− 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 −−− 0.50 2_ 10 _ 7.88 8.38 1.02 −−− M T L-M S N S MC10H350 PACKAGE DIMENSIONS PDIP−16 P SUFFIX CASE 648−08 ISSUE V D A 16 9 E H E1 1 NOTE 8 b2 8 c B TOP VIEW END VIEW WITH LEADS CONSTRAINED NOTE 5 A2 A e/2 NOTE 3 L A1 C D1 e SEATING PLANE M eB END VIEW 16X b SIDE VIEW 0.010 M C A M B M STYLE 1: PIN 1. CATHODE 2. CATHODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE 7. CATHODE 8. CATHODE 9. ANODE 10. ANODE 11. ANODE 12. ANODE 13. ANODE 14. ANODE 15. ANODE 16. ANODE NOTE 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3. 4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE NOT TO EXCEED 0.10 INCH. 5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR TO DATUM C. 6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE LEADS UNCONSTRAINED. 7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE LEADS, WHERE THE LEADS EXIT THE BODY. 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE CORNERS). DIM A A1 A2 b b2 C D D1 E E1 e eB L M INCHES MIN MAX −−−− 0.210 0.015 −−−− 0.115 0.195 0.014 0.022 0.060 TYP 0.008 0.014 0.735 0.775 0.005 −−−− 0.300 0.325 0.240 0.280 0.100 BSC −−−− 0.430 0.115 0.150 −−−− 10 ° MILLIMETERS MIN MAX −−− 5.33 0.38 −−− 2.92 4.95 0.35 0.56 1.52 TYP 0.20 0.36 18.67 19.69 0.13 −−− 7.62 8.26 6.10 7.11 2.54 BSC −−− 10.92 2.92 3.81 −−− 10 ° STYLE 2: PIN 1. COMMON DRAIN 2. COMMON DRAIN 3. COMMON DRAIN 4. COMMON DRAIN 5. COMMON DRAIN 6. COMMON DRAIN 7. COMMON DRAIN 8. COMMON DRAIN 9. GATE 10. SOURCE 11. GATE 12. SOURCE 13. GATE 14. SOURCE 15. GATE 16. SOURCE MECL is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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