Revised December 1999 FST16213 24-Bit Bus Exchange Switch General Description Features The Fairchild Switch FST16213 provides 24-bits of highspeed CMOS TTL-compatible bus switching or exchanging. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. ■ 4Ω switch connection between two ports. The device operates as a 24-bit bus switch or a 12-bit bus exchanger, which allows data exchange between the four signal ports via the data-select terminals. ■ Control inputs compatible with TTL level. ■ Minimal propagation delay through the switch. ■ Low lCC. ■ Zero bounce in flow-through mode. Ordering Code: Order Number Package Number Package Description FST16213MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide FST16213MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Diagram © 1999 Fairchild Semiconductor Corporation DS500039 www.fairchildsemi.com FST16213 24-Bit Bus Exchange Switch July 1997 FST16213 Connection Diagram Pin Descriptions Pin Name Description S2, S1, S0 Data-select inputs A1 , A2 Bus A B1 , B2 Bus B Truth Table S2 S1 S0 www.fairchildsemi.com 2 A1 A2 Function L L L Z Z Disconnect L L H B1 Z A1 = B1 L H L B2 Z A1 = B2 A2 = B1 L H H Z B1 H L L Z B2 H L H A2 and B2 A1 and B2 H H L B1 B2 A1 = B1, A2 = B2 H H H B2 B1 A1 = B2, A2 = B1 A2 = B2 A1 = A2 = B2 Supply Voltage (VCC) Recommended Operating Conditions (Note 3) −0.5V to +7.0V DC Switch Voltage (VS) −0.5V to +7.0V Power Supply Operating (VCC) DC Input Voltage (VIN) (Note 2) −0.5V to +7.0V Input Voltage (VIN) 0V to 5.5V 0V to 5.5V DC Input Diode Current (lIK) VIN<0V −50mA Output Voltage (VOUT) DC Output (IOUT) Sink Current 128mA Input Rise and Fall Time (tr, tf) +/− 100mA DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) 4.0V to 5.5V Switch Control Input −65°C to +150 °C 0nS/V to 5nS/V Switch I/O 0nS/V to DC −40 °C to +85 °C Free Air Operating Temperature (TA) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held high or low. They may not float. DC Electrical Characteristics Symbol VCC (V) Parameter TA = −40 °C to +85 °C Typ (Note 4) Min Max −1.2 Units Conditions IIN = −18mA VIK Clamp Diode Voltage VIH HIGH Level Input Voltage 4.0–5.5 VIL LOW Level Input Voltage 4.0–5.5 0.8 V II Input Leakage Current 5.5 ±1.0 µA 0≤ VIN ≤5.5V 0 10 µA VIN = 5.5V ±1.0 µA 0 ≤A, B ≤VCC 4.5 2.0 V V IOZ OFF-STATE Leakage Current 5.5 RON Switch On Resistance 4.5 4 7 Ω VIN = 0V, IIN = 64mA A to B or B to A 4.5 4 7 Ω VIN = 0V, IIN = 30mA (Note 5) 4.5 8 12 Ω VIN = 2.4V, IIN = 15mA 4.0 11 20 Ω VIN = 2.4V, IIN = 15mA Switch On Resistance 4.5 10 14 Ω VIN = 0V, IIN = 64mA A1 to A2 4.5 10 14 Ω VIN = 0V, IIN = 30mA (Note 5) 4.5 16 22 Ω VIN = 2.4V, IIN = 15mA 4.0 22 30 Ω VIN = 2.4V, IIN = 15mA ICC Quiescent Supply Current 5.5 3 µA VIN = VCC or GND, IOUT = 0 ∆ ICC Increase in ICC per Input 5.5 2.5 mA One input at 3.4V Other inputs at VCC or GND Note 4: Typical values are at VCC = 5.0V and TA = +25°C Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. 3 www.fairchildsemi.com FST16213 Absolute Maximum Ratings(Note 1) FST16213 AC Electrical Characteristics TA = −40 °C to +85 °C, Symbol CL = 50pF, RU = RD = 500Ω Parameter VCC = 4.5 − 5.5V Min Max VCC = 4.0V Min Units Conditions Figure No. Max tPHL,tPLH Prop Delay Bus to Bus (Note 6) 0.25 0.25 ns VI = OPEN Figure 1 Figure 2 tPHL,tPLH Prop Delay A1 to A2 0.5 0.5 ns VI = OPEN Figure 1 Figure 2 tPZH, tPZL Output Enable Time, S to A or B 7.5 8.0 ns VI = 7V for tPZL Figure 1 Figure 2 1.5 VI = OPEN for tPZH tPHZ, tPLZ Output Disable Time S to A or B 1.0 8.5 9.0 ns VI = 7V for tPLZ VI = OPEN for tPHZ tPZH, tPZL Output Enable Time, S0 to A2 and B2 1.5 9.5 10.0 ns VI = 7V for tPZL VI = OPEN for tPZH tPHZ, tPLZ Output Disable Time, S0 to A2 and B2 1.5 9.0 10.0 ns VI = 7V for tPLZ VI = OPEN for tPHZ Figure 1 Figure 2 Figure 1 Figure 2 Figure 1 Figure 2 Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance). Capacitance Symbol (Note 7) Parameter Typ Max Units Conditions CIN Control pin Input Capacitance 3 pF VCC = 5.0V CI/O Input/Output Capacitance 10 pF VCC = 5.0V S0, S1, or S2 = GND Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. AC Loading and Waveforms Note: Input driven by 50 Ω source terminated in 50 Ω Note: CL includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500 ns FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms www.fairchildsemi.com 4 FST16213 Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide Package Number MS56A 5 www.fairchildsemi.com FST16213 24-Bit Bus Exchange Switch Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD56 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6