Data Sheet PD No.60238 IRS2153D(S)PbF SELF-OSCILLATING HALF-BRIDGE DRIVER IC Features Product Summary Integrated 600V Half-Bridge Gate Driver CT, RT programmable oscillator 15.4V Zener Clamp on VCC Micropower Startup Non-latched shutdown on CT pin (1/6th VCC) Internal bootstrap FET Excellent Latch Immunity on All Inputs & Outputs +/- 50V/ns dV/dt immunity ESD Protection on All Pins 8-lead SOIC or PDIP package 1.1 usec (typ.) internal deadtime Description The IRS2153D is based on the popular IR2153 selfoscillating half-bridge gate driver IC using a more advanced silicon platform, and incorporates a high voltage half-bridge gate driver with a front end oscillator similar to the industry standard CMOS 555 timer. HVIC and latch immune CMOS technologies enable rugged monolithic construction. The output driver features a high pulse current buffer stage designed for minimum driver cross-conduction. Noise immunity is achieved with low di/dt peak of the gate drivers. VOFFSET 600V Max Duty Cycle 50% Driver source/sink current 180/260mA typ. Vclamp 15.4V typ. Deadtime 1.1us typ. Package PDIP8 IRS2153DPBF SO8 IRS2153DSPBF Typical Connection Diagram + AC Rectified Line RVCC RT 2 RT CT CVCC 3 CT COM 8 1 4 IRS2153D VCC 7 6 VB CBOOT HO MHS L VS RL 5 LO MLS - AC Rectified Line 1 IRS2153D(S)PbF Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Parameter Definition Symbol Min. Max. Units -0.3 625 V VB High Side Floating Supply Voltage VS High Side Floating Supply Offset Voltage VB - 25 VB + 0.3 V VHO High-Side Floating Output Voltage VS – 0.3 VB + 0.3 V VLO Low-Side Output Voltage -0.3 VCC + 0.3 V IRT RT Pin Current -5 5 mA VRT RT Pin Voltage -0.3 VCC + 0.3 V VCT CT Pin Voltage -0.3 VCC + 0.3 V ICC Supply Current (Note 1) --- 20 mA IOMAX Maximum allowable current at LO and HO due to external power transistor Miller effect. Allowable Offset Voltage Slew Rate -500 500 -50 50 V/ns dVS/dt PD Maximum Power Dissipation @ TA ≤ +25ºC, 8-Pin DIP --- 1.0 W PD Maximum Power Dissipation @ TA ≤ +25ºC, 8-Pin SOIC --- 0.625 W RθJA Thermal Resistance, Junction to Ambient, 8-Pin DIP --- 85 ºC/W RθJA Thermal Resistance, Junction to Ambient, 8-Pin SOIC --- 128 ºC/W TJ Junction Temperature -55 150 TS Storage Temperature -55 150 TL Lead Temperature (Soldering, 10 seconds) --- 300 ºC Note 1: This IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.4V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section. 2 IRS2153D(S)PbF Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. Parameter Definition Symbol Min. Max. Units VCC - 0.7 VCLAMP V VBS High Side Floating Supply Voltage VS Steady State High Side Floating Supply Offset Voltage -3.0 (Note 2) 600 V VCC Supply Voltage VCCUV+ +0.1V VCC CLAMP V ICC Supply Current (Note 3) 5 mA TJ Junction Temperature -40 125 ºC Note 2: Care should be taken to avoid output switching conditions where the VS node flies inductively below ground by more than 5V. Note 3: Enough current should be supplied to the VCC pin of the IC to keep the internal 15.6V zener diode clamping the voltage at this pin. Recommended Component Values Parameter Component Symbol Min. Max. Units RT Timing Resistor Value 1 --- kΩ CT CT Pin Capacitor Value 330 --- pF IRS2153D Frequency vs. RT Frequency (Hz) 1000000 CT Values 100000 330pf 470pF 10000 1nF 2.2nF 1000 4.7nF 10nF 100 10 1000 10000 100000 1000000 RT (Ohm) 3 IRS2153D(S)PbF Electrical Characteristics VBIAS (VCC, VBS) = 14V, CT = 1 nF, VS=0V and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Min Typ Max Units Test Conditions Low Voltage Supply Characteristics VCCUV+ Rising VCC Undervoltage Lockout Threshold 10.2 10.8 11.5 VCCUV- Falling VCC Undervoltage Lockout Threshold 8.3 8.8 9.4 VCC Undervoltage Lockout Hysteresis 1.6 2.0 2.4 Micropower Startup VCC Supply Current --- 130 170 µA IQCC Quiescent VCC Supply Current --- 800 1000 µA ICC VCC Supply Current --- 1.8 --- mA 14.4 15.4 16.8 V Quiescent VBS Supply Current --- 60 80 µA VBSUV+ VBS Supply Undervoltage Positive Going Threshold 8.0 9.0 9.5 V VBSUV- VBS Supply Undervoltage negative Going Threshold 7.0 8.0 9.0 Offset Supply Leakage Current --- --- 50 µA VB = VS = 600V 18.4 19.0 19.6 kHz RT = 36.5kΩ 88 93 100 RT Pin Duty Cycle --- 50 --- % CT Pin Current --- 0.02 1.0 µA mA VCCUVHYS IQCCUV VCC CLAMP VCC Zener Clamp Voltage V VCC ≤ VCCUVRT = 36.9kΩ ICC = 5mA Floating Supply Characteristics IQBS ILK Oscillator I/O Characteristics fOSC d ICT Oscillator Frequency RT = 7.15kΩ fo < 100kHz ICTUV UV-Mode CT Pin Pulldown Current 0.20 0.30 0.6 VCT+ Upper CT Ramp Voltage Threshold --- 9.32 --- VCT- Lower CT Ramp Voltage Threshold --- 4.66 --- VCTSD CT Voltage Shutdown Threshold 2.2 2.3 2.4 VRT+ High-Level RT Output Voltage, VCC - VRT --- 10 50 mV IRT = -100µA --- 100 300 mV IRT = -1mA --- 10 50 mV IRT = 100µA --- 100 300 mV IRT = 1mA VCC ≤ VCCUV- VRT- Low-Level RT Output Voltage VCC = 7V V VRTUV UV-Mode RT Output Voltage --- 0 100 mV VRTSD SD-Mode RT Output Voltage, VCC - VRT --- 10 50 mV IRT = -100µA, VCT = 0V --- 100 300 mV IRT = -1mA, VCT = 0V 4 IRS2153D(S)PbF Electrical Characteristics VBIAS (VCC, VBS) = 14V, CT = 1 nF, VS=0V and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Min Typ Max Units Test Conditions Gate Driver Output Characteristics VOH High-Level Output Voltage --- VCC --- IO = 0A VOL Low-Level Output Voltage --- COM --- IO = 0A VOL_UV UV-Mode Output Voltage --- COM --- IO = 0A, VCC ≤ VCCUV- tr Output Rise Time --- 120 220 tf Output Fall Time --- 50 80 tsd Shutdown Propagation Delay --- 350 --- td Output Deadtime (HO or LO) 0.65 1.1 1.75 µsec mA IO+ Output source current --- 180 --- IO- Output sink current --- 260 --- nsec Bootstrap FET Characteristics VB_ON VB when the bootstrap FET is on --- 13.7 --- V IB_CAP VB source current when FET is on 40 55 --- mA IB_10V VB source current when FET is on 10 12 --- CBS=0.1uF VB=10V 5 IRS2153D(S)PbF Lead Definitions RT CT COM 8 1 2 3 4 IRS2153D VCC 7 6 5 VB HO VS LO Lead Description Symbol VCC Logic and internal gate drive supply voltage RT Oscillator timing resistor input CT Oscillator timing capacitor input COM IC power and signal ground LO Low-side gate driver output VS High voltage floating supply return HO High-side gate driver output VB High side gate driver floating supply Functional Block Diagram RT 2 R HV LEVEL SHIFT + R R + - S Q Q + R/2 S Q R1 R2 R 7 HO 6 VS S PULSE GEN VB Q PULSE FILTER BOOTSTRAP DRIVE DEAD TIME R/2 CT 3 DEAD TIME 8 15.4V DELAY 1 VCC 5 LO 4 COM M1 UV DETECT 6 IRS2153D(S)PbF Timing Diagram Operating Mode VCCUV+ VCC Fault Mode: CT <1/6*VCC 2/3 VCC VCT 1/3 VCC 1/6 VCC VCC LO DT VCC HO DT VCC VRT IRT Switching Time Waveform Deadtime Waverform 90% tr tf LO 10% DTLO DTHO 90% HO HO LO 10% 90% 10% 7 IRS2153D(S)PbF Bootstrap MOSFET Functional Description Under-voltage Lock-Out Mode (UVLO) The under-voltage lockout mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on threshold of the IC. The IRS2153D under voltage lock-out is designed to maintain an ultra low supply current of less than 155uA, and to guarantee the IC is fully functional before the high and low side output drivers are activated. During under voltage lock-out mode, the high and low-side driver outputs HO and LO are both low. Supply voltage + AC Rectified Line RVCC VCC 8 RT 2 RT CT 3 CVCC CT COM IRS2153D 1 7 6 VB CBOOT MHS HO The internal bootstrap FET and supply capacitor (CBOOT) comprise the supply voltage for the high side driver circuitry. The internal boostrap FET only turns on when LO is high. To guarantee that the high-side supply is charged up before the first pulse on pin HO, the first pulse from the output drivers comes from the LO pin. Normal operating mode Once the VCCUV+ threshold is passed, the MOSFET M1 opens, RT increases to approximately VCC (VCC-VRT+) and the external CT capacitor starts charging. Once the CT voltage reaches VCT- (about 1/3 of VCC), established by an internal resistor ladder, LO turns on with a delay equivalent to the deadtime td. Once the CT voltage reaches VCT+ (approximately 2/3 of VCC), LO goes low, RT goes down to approximately ground (VRT-), the CT capacitor discharges and the deadtime circuit is activated. At the end of the deadtime, HO goes high. Once the CT voltage reaches VCT-, HO goes low, RT goes high again, the deadtime is activated. At the end of the deadtime, LO goes high and the cycle starts over again. L VS The following equation provides the oscillator frequency: RL 5 4 MLS LO f ~ 1 1.453 × RT × CT - AC Rectified Line Fig. 1 Typical Connection Diagram Fig. 1 shows an example of supply voltage. The start-up capacitor (CVCC) is charged by current through supply resistor (RVCC) minus the start-up current drawn by the IC. This resistor is chosen to provide sufficient current to supply the IRS2153D from the DC bus. CVCC should be large enough to hold the voltage at Vcc above the UVLO threshold for one half cycle of the line voltage as it will only be charged at the peak, typically 0.1uF. It will be necessary for RVCC to dissipate around 1W. This equation can vary slightly from actual measurements due to internal comparator over- and under-shoot delays. For a more accurate determination of the output frequency, the frequency characteristic curves should be used (RT vs. Frequency, Page 3). Shut-down If CT is pulled down below VCTSD (approximately 1/6 of VCC) by an external circuit, CT doesn’t charge up and oscillation stops. LO is held low and the bootstrap FET is off. Oscillation will resume once CT is able to charge up again to VCT-. The use of a two diode charge pump made of DC1, DC2 and CVS (Fig. 2) from the half bridge (VS) is also possible however the above approach is simplest and the dissipation in RVCC should not be unacceptably high. + AC Rectified Line RVCC RT 2 RT CT CVCC 3 CT COM 8 1 4 IRS2153D VCC 7 VB CBOOT HO MHS DC2 6 L VS CVS 5 LO RL MLS DC1 - AC Rectified Line Fig. 2 Charge pump circuit The supply resistor (RVCC) must be selected such that enough supply current is available over all operating conditions. Once the capacitor voltage on VCC reaches the start-up threshold VCCUV+, the IC turns on and HO and LO begin to oscillate. 8 19 100 18.8 98 Frequency (kHz) Frequency (kHz) IRS2153D(S)PbF 18.6 18.4 96 94 92 18.2 90 -25 18 11 12 13 14 15 0 25 16 50 75 100 125 100 125 Temperature(C) VCC(V) FREQ vs TEMP 1.4 1.25 1.3 1.15 1.2 1.05 DT(uS) DT(uS) FREQ vs VCC 1.1 1 0.95 0.85 0.9 11 12 13 14 15 16 0.75 -25 0 25 VCC(V) 50 75 Temperature(C) DT vs VCC DT vs TEMP 17 90 80 VCC (V) Temperature(C) 70 60 50 40 16 30 20 10 15 0 -25 20 70 120 Frequency(kHz) 0 25 50 75 100 125 Temperature (°C) VCC CLAMP vs TEMP Tj vs. Frequency (SOIC) 9 IRS2153D(S)PbF 300 300 LO Current (mA) 200 150 IsourceHO 100 50 0 -25 IsinkHO 250 IsinkHO 200 150 IsourceLO 100 50 0 25 50 75 100 0 -25 125 0 Temperature(C) 25 50 75 100 125 Temperature(C) IsourceHO,IsinkHO vs Temp IsourceLO,IsinkLO vs Temp 80 70 IB_CAP, IBS_10V (mA) HOCurrent (mA) 250 IB_CAP 60 50 40 30 IBS_10V 20 10 0 -25 0 25 50 75 100 125 Temperature(C) IBCAP, IBS10V vs TEMP 10 IRS2153D(S)PbF IRS2153DSPbF IRS2153DPbF 12 IRS2153D(S)PbF ORDER INFORMATION Leadfree Part 8-Lead PDIP IRS2153D order IRS2153DPbF 8-Lead SOIC IRS2153DS order IRS2153DSPbF WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 726 8000 Sales Offices, Agents and Distributors in Major Cities Throughout the World. Data and specifications subject to change without notice. Qualification: Industrial, MSL2 Leadfree © 2005 International Rectifier 10-15-2005 http://www.irf.com 11