MP6211-3/MP6212-3 3.3V/5V, Single-Channel 1A Current-Limited Power Distribution Switch The Future of Analog IC Technology DESCRIPTION FEATURES The MP6211-3/MP6212-3 single-channel Power Distribution Switch features internal current limiting to prevent damage to host devices due to faulty load conditions. The MP6211-3/MP6212-3 Analog switch has 95mΩ on-resistance and operates from 2.7V to 5.5V input. It is available with guaranteed current limits, making it ideal for load switching applications. The MP6211-3/MP6212-3 has built-in protection for both over current and increased thermal stress. For over current, the device will limit the current by changing to a constant current mode. • • • • • • • • • 1A Continuous Current Accurate Current Limit 2.7V to 5.5V Supply Range 90uA Quiescent Current 95mΩ MOSFET Thermal-Shutdown Protection Under-Voltage Lockout 8ms FLAG Deglitch Time FLAG Won't Change State At Input UVLO Transition Reverse Current Blocking Active High & Active Low Options SOIC8E and MSOP8E Packages • • • As the temperature increases as a result of short circuit, the device will shut off. The device will recover once the device temperature reduces to approx 120°C. APPLICATIONS • • • • • • The FLAG output of MP6211-3/MP6212-3 will report a fail mode (low level) when over current or over temperature is encountered. The FLAG will not change state when the input UVLO is triggered. Smartphone and PDA Portable GPS Device Notebook PC Set-top-box Telecom and Network Systems USB Power Distribution For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic Power Systems, Inc. The MP6211-3/MP6212-3 is available in 8-Pin MSOP package with exposed pad and 8-Pin SOIC8 package with exposed pad. TYPICAL APPLICATION +5V 1 GND MP6211-3/ MP6212-3 2, 3 IN 4 EN* OUT 6, 7,8 To VBUS USB Ports FLAG 5 *EN is active high for MP6211-3 SINGLE-CHANNEL MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 1 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH ORDERING INFORMATION Part Number Enable Switch MP6212DN-3 Maximum Continuous Load Current Typical ShortTop Free Air Circuit Current Package Marking Temperature (TA) @ TA=25°C SOIC8E MP6212-3 Active Low MP6212DH-3 MSOP8E M6212-3 Single MP6211DN-3 1.0A 1.5A Active High MP6211DH-3* -40°C to +85°C SOIC8E MP6211-3 MSOP8E M6211-3 * For Tape & Reel, add suffix –Z (e.g. MP6211DH-3–Z). For RoHS Compliant Packaging, add suffix –LF (e.g. MP6211DH-3–LF–Z) PACKAGE REFERENCE TOP VIEW TOP VIEW GND 1 8 OUT IN 2 7 OUT IN 3 6 OUT EN* 4 5 FLAG EXPOSED PAD ON BACKSIDE GND 1 8 OUT IN 2 7 OUT IN 3 6 OUT EN* 4 5 FLAG EXPOSED PAD ON BACKSIDE CONNECT TO GND MSOP8E SOIC8E MP6211-3/MP6212-3 (* EN is active high for MP6211-3) ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance (3) IN .................................................-0.3V to +6.0V EN, FLAG, OUT to GND ..............-0.3V to +6.0V Continuous Power Dissipation. (TA = +25°C) (2) SOIC8E ...................................................... 2.5W MSOP8E .................................................... 2.3W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature ............... -65°C to +150°C Maximum Junction Temp. (TJ) ............... +125°C SOIC8E .................................. 50 ...... 10... °C/W MSOP8E ................................. 55 ...... 12... °C/W θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Measured on JESD51-7 4-layer PCB. MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 2 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH ELECTRICAL CHARACTERISTICS (4) VIN=5V, TA=+25°C, unless otherwise noted. Parameter IN Voltage Range Supply Current Shutdown Current Off Switch Leakage Condition Min Typ Max Units 5.5 120 1 1 V µA µA µA 2.7 70 90 1.1 1.5 2.2 A 1.7 2.4 A 2.65 0.8 0.4 V mV mΩ V V V 1 µA Turn On Time, Ton (7) VIN=5.5V, CL=1µF, RL=5.5Ω VIN=2.7V, CL=1µF, RL=5.5Ω VIN=5.5V, CL=1µF, RL=5.5Ω VIN=2.7V, CL=1µF, RL=5.5Ω CL=100µF, RL=5.5Ω 140 20 0.9 1.7 0.05 0.04 1.9 2 3 0.5 0.5 3 °C °C ms ms ms ms ms Turn Off Time, Toff (8) CL=100µF, RL=5.5Ω 1.3 10 ms 8 1 0.1 15 ms µA µA Single Channel Device Disable, VOUT=float, VIN=5.5V Device Disable, VIN=5.5V Current Limit Trip Current Under-voltage Lockout Under-voltage Hysteresis FET On Resistance EN Input Logic High Voltage EN Input Logic Low Voltage FLAG Output Logic Low Voltage FLAG Output High Leakage Current Thermal Shutdown Thermal Shutdown Hysteresis VOUT Rising Time, Tr (5) VOUT Falling Time, Tf (6) FLAG Deglitch Time EN Input Leakage Reverse Leakage Current Current Ramp Output Rising Edge (slew rate≤100A/s) on 1.95 250 95 IOUT=100mA (-40°C≤TA≤+85°C) 140 2 ISINK=5mA VIN=VFLAG=5.5V 4 VOUT=5.5V, VIN=0 1 Notes: 4) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization. 5) Measured from 10% to 90%. 6) Measured from 90% to 10% 7) Measured from (50%) EN signal to (90%) output signal. 8) Measured from (50%) EN signal to (10%) output signal. MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 3 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH PIN FUNCTIONS SOIC8E MSOP8E Name Description 1 1 GND Ground. 2, 3 2, 3 IN Input Voltage. Accepts 2.7V to 5.5V input. 4 4 EN Enable Input, Active Low: (MP6212-3), Active High: (MP6211-3) 5 5 FLAG Open-Drain. Flag output stays low after a short output or thermal current limit, and will not change state when input UVLO is triggered. 6, 7, 8 6, 7, 8 OUT Power-Distribution Switch Output. TYPICAL PERFORMANCE CHARACTERISTICS TA = +25ºC, unless otherwise noted. OUT RL tf tr CL Vout 90% 10% TEST CIRCUIT 50% EN 50% T off Ton Vout Ton delay 50% EN 90% 10% 10% 50% Toff Ton 90% 10% 90% Vout Ton delay Toff delay 90% 90% 10% 10% Toff delay VOLTAGE WAVEFORMS Figure 1—Test Circuit and Voltage Waveforms MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 4 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH TYPICAL PERFORMANCE CHARACTERISTICS VIN=5.5V, TA =+25ºC, unless otherwise noted. 1.5 1 2.5 3.5 4.5 5.5 INPUT VOLTAGE (V) 0.7 0.6 0.5 100 55 95 50 90 45 85 40 80 35 75 3 3.5 4 4.5 5 70 5.5 2.5 3 3 91 90 89 88 0 0.2 0.4 0.6 0.8 OUTPUT CURRENT (A) 1 1.2 1 3.5 4 4.5 5 5.5 0.6 2.5 6 6 INPUT TO OUTPUT VOLTAGE (mV) 92 87 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V) INPUT VOLTAGE (V) STATIC DRAIN-SOURCE ON-STATE STATIC DRAIN-SOURCE ON-STATE INPUT VOLTAGE (V) 93 1.4 0.8 0.4 2.5 6.5 60 30 2.5 RISE TIME (ms) 2 1.6 0.8 STATIC DRAIN-SOURCE ON-STATE RESISTANCE VARIATION (%) TURN OFF DELAY (ms) TURN ON DELAY (ms) 1.8 0.9 2.5 130 120 110 100 90 80 2.5 3 3.5 4 4.5 5 INPUT VOLTAGE (V) 5.5 3 3.5 4 4.5 5 INPUT VOLTAGE (V) 5.5 30 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 -45 -30 -15 0 15 30 45 60 75 90 AMBIENT TEMPERATURE (0C) 140 Vin=5.5V 120 100 Vin=5V Vin=4V Vin=3.3V 80 Vin=2.7V 60 40 20 0 0 0.2 0.4 0.6 0.8 1 OUTPUT CURRENT (A) MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 1.2 5 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH TYPICAL PERFORMANCE CHARACTERISTICS (continued) 2 1.75 TRIP CURRENT (A) 1.7 1.65 1.6 1.55 1.5 CURRENT LIMIT RESPONSE (us) SHORT CIRCUIT OUTPUT CURRENT (A) VIN=5.5V, TA = +25ºC, unless otherwise noted. 1.9 1.8 1.7 1.6 1.45 1.4 2.5 3 3.5 4 4.5 5 5.5 6 1.5 2.5 INPUT VOLTAGE (V) 3 3.5 4 4.5 5 5.5 50 45 40 35 30 25 20 15 10 6 INPUT VOLTAGE (V) VOUT 2V/div VOUT 2V/div EN 2V/div EN 2V/div 5 0 0 2 4 6 8 10 12 PEAK CURRENT (A) 1s/div VOUT 2V/div VOUT 2V/div EN 2V/div EN 2V/div MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 6 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN=5.5V, TA = +25ºC, unless otherwise noted. Inrush Current with Different Load Capacitance Enabled Device VEN=5V, CL=1uF 1ms/div 2ms/div Ramped Load on Enabled Device Short Circuit Current, Device Enabled into Short VEN=5V, CL=1uF VEN=5V, CL=1uF Threshold Trip Current with Ramped Load on Enabled Device VEN=5V, CL=1uF 4ms/div IO 500mA/div 2ms/div 2ms/div MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 7 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH FUNCTION BLOCK DIAGRAM Figure 2—Function Block Diagram MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 8 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH DETAILED DESCRIPTION Over Current When the load exceeds trip current (minimum threshold current triggering constant-current mode) or a short is present, MP6211-3/MP62123 switches into to a constant-current mode (current limit value). MP6211-3/MP6212-3 will be shutdown only if the overcurrent condition stays long enough to trigger thermal protection. Trigger overcurrent protection for different overload conditions occurring in applications: 1) The output has been shorted or overloaded before the device is enabled or input applied. MP6211-3/MP6212-3 detects the short or overload and immediately switches into a constant-current mode. 2) A short or an overload occurs after the device is enabled. After the current-limit circuit has been tripped (reached the trip current threshold), the device switches into constantcurrent mode. However, high current may flow for a short period of time before the current-limit circuit can react. 3) Output current has been gradually increased beyond the recommended operating current. The load current rises until the trip current threshold is reached or until the thermal limit of the device is exceeded. The MP62113/MP6212-3 is capable of delivering current up to the trip current threshold without damaging the device. Once the trip threshold has been reached, the device switches into its constant-current mode. Flag Response The FLAG pin is an open drain configuration. When over current or over temperature is encountered, FLAG will report a fail mode (low level). For over current, 8ms deglitch time-out is needed. This is used to ensure that no false fault signal is reported. This internal deglitch circuit eliminates the need for components. For over temperature, the FLAG pin is not deglitched. When the device recovers from over temperature protection and enters over current mode, the FLAG remains low if VOUT is less than 1.4V (Figure 3). Otherwise FLAG will become low after 8ms deglitch time (Figure 4). The FLAG will not change state when the input UVLO is triggered. Vout Vout<1.4V ` Short circuit current limit Iout Deglitch Time Flag Figure 3—Flag Indication When Short Output to Ground Vout Vout>1.4V Short circuit current limit Iout Deglitch Time Deglitch Time Flag Figure 4—Flag Indication When Short with 1Ω Resistor Thermal Protection The purpose of thermal protection is to prevent damage in the IC by allowing exceptive current to flow and heating the junction. The die temp. is internally monitored until the thermal limit is reached. Once this temp. is reached, the switch will turn off and allow the chip to cool. The switch has a built-in hysteresis. Under-voltage Lockout (UVLO) This circuit is used to monitor the input voltage to ensure that the MP6211-3/MP6212-3 is operating correctly. This UVLO circuit also ensures that there is no operation until the input voltage reaches the minimum spec. MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 9 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH Enable The logic pin disables the chip to reduce the supply current. The device will operate once the enable signal reaches the appropriate level. The input is compatible with both COMS and TTL. MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 10 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH APPLICATION INFORMATION Power-Supply Considerations Over 10µF capacitor between IN and GND is recommended. This precaution reduces powersupply transients that may cause ringing on the input and improves the immunity of the device to short-circuit transients. In order to achieve smaller output load transient ripple, placing a high-value electrolytic capacitor on the output pin(s) is recommended when the load is heavy. +5V 1 GND MP6211-3/ MP6212-3 2, 3 IN 4 EN* OUT 6, 7,8 To VBUS USB Ports FLAG 5 *EN is active high for MP6211-3 SINGLE-CHANNEL Figure 5—Application Circuit MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 11 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH PACKAGE INFORMATION MSOP8E (EXPOSED PAD) 0.087(2.20) 0.099(2.50) 0.114(2.90) 0.122(3.10) 5 8 0.114(2.90) 0.122(3.10) PIN 1 ID (NOTE 5) 0.187(4.75) 0.199(5.05) 0.062(1.58) 0.074(1.88) Exposed Pad 0.010(0.25) 0.014(0.35) 4 1 0.0256(0.65)BSC BOTTOM VIEW TOP VIEW GAUGE PLANE 0.010(0.25) 0.030(0.75) 0.037(0.95) 0.043(1.10)MAX SEATING PLANE 0.002(0.05) 0.006(0.15) FRONT VIEW NOTE: 0.181(4.60) 0.040(1.00) 0.016(0.40) 0.016(0.40) 0.026(0.65) SIDE VIEW 0.100(2.54) 0.075(1.90) 0o-6o 0.004(0.10) 0.008(0.20) 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) PIN 1 IDENTIFICATION HAS HALF OR FULL CIRCLE OPTION. 6) DRAWING MEETS JEDEC MO-187, VARIATION AA-T. 7) DRAWING IS NOT TO SCALE. 0.0256(0.65)BSC RECOMMENDED LAND PATTERN MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 12 MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH SOIC8E (EXPOSED PAD) 0.189(4.80) 0.197(5.00) 0.124(3.15) 0.136(3.45) 8 5 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.089(2.26) 0.101(2.56) 4 TOP VIEW BOTTOM VIEW SEE DETAIL "A" 0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SIDE VIEW 0.050(1.27) BSC FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0.050(1.27) 0.024(0.61) 0o-8o 0.016(0.41) 0.050(1.27) 0.063(1.60) DETAIL "A" 0.103(2.62) 0.138(3.51) RECOMMENDED LAND PATTERN 0.213(5.40) NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6211-3/MP6212-3 Rev 1.0 www.MonolithicPower.com 2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 13