ICST MK2705 Audio clock source Datasheet

MK2705
Audio Clock Source
Description
Features
The MK2705 provides synchronous clock generation
for audio sampling clock rates derived from an MPEG
stream, or can be used as a standalone clock source
with a 27 MHz crystal. The device uses the latest PLL
technology to provide good phase noise and long term
jitter characteristics in a small 8-pin package.
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Contact ICS if you have a requirement for an input and
output frequency not included in this document.
Packaged in 8-pin (150 mil wide) SOIC
Clock or crystal input
Low phase noise
Low jitter
Exact (0 ppm) multiplication ratios
Independent output voltage
Support for 256 times sampling rate
Block Diagram
VDD
S0
S1
PLL Clock
Synthesis
and Control
Circuitry
X1/REFIN
27 MHz crystal
or clock input
Crystal
Oscillator
CLK
X2
Optional crystal load capacitors
MDS 2705 C
VDDO
GND
1
Revision 102103
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK2705
Audio Clock Source
Pin Assignment
Output Clock Selection Table
S1
S0
Input
Frequency
(MHz)
Output
Frequency
(MHz)
X1/ REFI N
1
8
X2
VDD
2
7
VDDO
0
0
27
8.192
S0
3
6
S1
0
1
27
11.2896
GND
4
5
CLK
1
0
27
12.288
1
1
27
24.576
8-pin SOIC
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
1
X1/REFIN
Input
Connect this pin to a 27 MHz crystal or clock input
2
VDD
Power
Power supply for crystal oscillator and PLL.
Pin Description
3
S0
Input
Output frequency selection. Determines output frequency per table above. On-chip pull-up.
4
GND
Power
Connect to ground.
5
CLK
Output
6
S1
Input
Output frequency selection. Determines output frequency per table above. On-chip pull-up.
7
VDDO
Power
Power supply for output stage.
8
X2
Input
Connect this pin to a 27 MHz crystal. Leave open if using a clock input.
MDS 2705 C
Clock output.
2
Revision 102103
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK2705
Audio Clock Source
Application Information
Series Termination Resistor
Clock output traces should use series termination. To
series terminate a 50Ω trace (a commonly used trace
impedance), place a 33Ω resistor in series with the
clock line and as close to the clock output pin as
possible. The nominal impedance of the clock output is
20Ω.
Decoupling Capacitors
As with any high-performance mixed-signal IC, the
MK2705 must be isolated from system power supply
noise to perform optimally.
Decoupling capacitors of 0.01µF must be connected
between each VDD and the PCB ground plane. To
further guard against interfering system supply noise,
the MK2705 should use one common connection to the
PCB power plane as shown in the diagram on the next
page. The ferrite bead and bulk capacitor help reduce
lower frequency noise in the supply that can lead to
output clock phase modulation.
Recommended Power Supply Connection for
Optimal Device Performance
Connection to 3.3 V
Power Plane
Ferrite
Bead
The value of the load capacitors can be roughly
determined by the formula C = 2(CL - 6) where C is the
load capacitor connected to X1 and X2, and CL is the
specified value of the load capacitance for the crystal.
A typical crystal CL is 18 pF, so C = 2(18 - 6) = 24 pF.
Because these capacitors adjust the stray capacitance
of the PCB, check the output frequency using your final
layout to see if the value of C should be changed.
PCB Layout Recommendations
Observe the following guidelines for optimum device
performance and lowest output phase noise:
1) Each 0.01µF decoupling capacitor should be
mounted on the component side of the board as close
to the VDD pin as possible. No vias should be used
between decoupling capacitor and VDD pin. The PCB
trace to VDD pin should be kept as short as possible,
as should the PCB trace to the ground via. Distance of
the ferrite bead and bulk decoupling from the device is
less critical.
2) The external crystal should be mounted next to the
device with short traces. The X1 and X2 traces should
not be routed next to each other with minimum spaces,
instead they should be separated and away from other
traces.
VDD Pin
VDD Pin
3) To minimize EMI and obtain the best signal integrity,
the 33Ω series termination resistor should be placed
close to the clock output.
Bulk Decoupling Capacitor
(such as 1 F Tantalum)
0.01 F Decoupling Capacitors
Both VDD pins must be connected to the same voltage.
Crystal Load Capacitors
If a crystal is used, the device crystal connections
should include pads for capacitors from X1 to ground
and from X2 to ground. These capacitors are used to
adjust the stray capacitance of the board to match the
MDS 2705 C
nominally required crystal load capacitance. To reduce
possible noise pickup, use very short PCB traces (and
no vias) been the crystal and device.
3
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers (the ferrite bead and bulk decoupling
capacitor can be mounted on the back). Other signal
traces should be routed away from the MK2705. This
includes signal traces just underneath the device, or on
layers adjacent to the ground plane layer used by the
device.
Revision 102103
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK2705
Audio Clock Source
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK2705. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
4.5 V
All Inputs and Outputs
-0.5 V to VDD+0.5 V
Ambient Operating Temperature
0 to +70°C
Storage Temperature
-65 to +150°C
Junction Temperature
175°C
Soldering Temperature
260°C
Recommended Operation Conditions
Parameter
Min.
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Typ.
Max.
Units
0
+70
°C
+3.0
+3.6
V
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +70°C
Parameter
Operating Voltage
Symbol
Conditions
Min.
Typ.
Max.
Units
VDD
3.0
3.6
V
VDD
V
VDDO
1.8
Input High Voltage
VIH
2
Input Low Voltage
VIL
Output High Voltage
VOH
IOH = -4 mA
VDD-0.4
V
Output High Voltage
VOH
IOH = -20 mA
2.4
V
Output Low Voltage
VOL
IOL = 20 mA
Supply Current
IDD
No Load
Short Circuit Current
IOS
Each output
Nominal Output Impedance
CIN
Internal pull-up resistor value
RPU
MDS 2705 C
0.8
ZOUT
Input Capacitance
V
Input pins
4
0.4
V
V
24
mA
±65
mA
20
Ω
7
pF
120
kΩ
Revision 102103
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK2705
Audio Clock Source
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +70° C
Parameter
Symbol
Conditions
Min.
Input frequency
Typ.
Max.
27
Units
MHz
Output duty cycle
tOD
VDD/2, Note 1
55
%
Output clock rise time
tOR
20% to 80%, Note 1
1.5
ns
Output clock fall time
tOF
80% to 20%, Note 1
1.5
ns
45
49 to 51
Jitter, short term
peak to peak, Note 1
175
ps
Jitter, long term
10 us delay
peak to peak, Note 1
300
ps
0
ppm
-110
dBc
Frequency synthesis error
Single sideband phase noise
10 kHz offset
Note 1: Measured with 15 pF load
MDS 2705 C
5
Revision 102103
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK2705
Audio Clock Source
Package Outline and Package Dimensions (8-pin SOIC, 150 mil Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
8
Symbol
E
A
A1
B
C
D
E
e
H
h
L
α
H
INDEX
AREA
1 2
D
A
Min
Max
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0°
8°
Min
Max
.0532
.0688
.0040
.0098
.013
.020
.0075
.0098
.1890
.1968
.1497
.1574
0.050 BASIC
.2284
.2440
.010
.020
.016
.050
0°
8°
h x 45
A1
C
-Ce
SEATING
PLANE
B
L
.10 (.004)
C
Ordering Information
Part / Order Number
Marking
Shipping
packaging
Package
Temperature
MK2705S
MK2705S
Tubes
8-pin SOIC
0 to +70° C
MK2705STR
MK2705S
Tape and Reel
8-pin SOIC
0 to +70° C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 2705 C
6
Revision 102103
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
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