19-2845; Rev 1; 10/03 USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors Features ♦ Ideal for Enabling USB Dual-Role Components for USB OTG Protocol The MAX3353E integrates a regulated charge pump, switchable pullup/pulldown resistors, and an I2C-compatible 2-wire serial interface. The device provides a detector to monitor ID status and operates with logic supply voltages (VL) between +1.65V and VCC and charge-pump supply voltages (V CC ) from +2.6V to +5.5V. The charge pump supplies an OTG-compatible output on VBUS while sourcing 8mA output current. The MAX3353E enables USB OTG communication between digital logic parts that cannot supply or tolerate the +5V VBUS levels that USB OTG requires. By controlling and measuring VBUS using internal comparators, this device supports USB OTG session request protocol (SRP) and host negotiation protocol (HNP). The MAX3353E has built-in ±15kV ESD protection circuitry to guard VBUS, ID_IN, D+, and D-. The MAX3353E is available in a 5 x 4 chip-scale package (UCSP™) and 16-pin TSSOP package. ♦ Charge Pump for VBUS Signaling and Operation Down to +2.6V ♦ Level Translators Allow Low-Voltage System Interface ♦ Internal VBUS Comparators and ID Detector ♦ Internal Switchable Pullup and Pulldown Resistors for Host/Peripheral Functionality ♦ I2C-Compatible Bus Interface with Command and Status Registers ♦ Interrupt Features ♦ ±15kV ESD Protection on ID_IN, VBUS, D+, and D♦ Supports SRP and HNP ♦ Available in 5 x 4 UCSP and 16-Pin TSSOP Ordering Information PART PINPACKAGE PKG CODE -40°C to +85°C 16 TSSOP -40°C to +85°C 5 x 4 UCSP B20-4 TEMP RANGE MAX3353EEUE MAX3353EEBP-T Applications Functional Diagram Mobile Phones PDAs — C+ C- VCC Digital Cameras VBUS COMPARATORS MP3 Players Photo Printers CHARGE PUMP CURRENT GENERATOR 200kΩ VBUS ID_OUT ID_IN Pin Configurations appear at end of data sheet. VL Typical Applications Circuit appears at end of data sheet. SCL UCSP is a trademark of Maxim Integrated Products, Inc. Purchase of I2C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. SDA INT ADD I2C INTERFACE AND CONTROL LOGIC ID DETECTOR ±15kV ESD PROTECTION D+ DSE0 DRIVER PULLUP/DOWN RESISTORS VTRM 110kΩ MAX3353E ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX3353E General Description The MAX3353E I 2 C™-compatible USB On-The-Go (OTG) regulated charge pump with switchable pullup/pulldown resistors allows peripherals and mobile devices such as PDAs, cellular phones, and digital cameras to be interconnected without a host PC. The MAX3353E enables a system with an integrated USB dual-role transceiver to function as a USB OTG dual-role device. The charge pump in the MAX3353E supplies VBUS power and signaling that is required by the transceiver as defined in On-The-Go Supplement: USB 2.0, Revision 1.0. The MAX3353E provides the switchable pullup and pulldown resistors on D+ and Drequired for a dual-role device. MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) VCC, VL, VTRM ..........................................................-0.3V to +6V D+, D-, ID_IN (Note 1)..............................................-0.3V to +6V VBUS (Notes 1, 2) .....................................................-0.3V to +6V C+..................................................................(VCC - 0.3V) to +6V C-................................................................-0.3V to (VCC + 0.3V) INT, ID_OUT ..................................................-0.3V to (VL + 0.3V) SDA, SCL, ADD .......................................................-0.3V to +6V VBUS Output Short Circuit to Ground ....................... Continuous Output Current (all other pins) .........................................±15mA Continuous Power Dissipation (TA = +70°C) 16-Pin TSSOP (derate 9.4mW/°C above +70°C) .........755mW 5 x 4 UCSP (derate 7.8mW/°C above +70°C) .............625mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering 10s) .................................+300°C Bump Temperature (soldering) Infrared (15s) ...............................................................+200°C Vapor Phase (20s) .......................................................+215°C Note 1: 15kV ESD protected. Note 2: VBUS can be backdriven to +6V. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1µF, VCC decoupled with 1µF capacitor to ground; VTRM and VL decoupled with 0.1µF capacitor to ground; CVBUS = 1µF (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +4V, VL = +1.8V, VTRM = +3.3V, and TA = +25°C.) (Notes 3, 4) PARAMETER MAX UNITS VCC 2.6 5.5 V Logic Supply Voltage VL 1.65 VCC V VTRM Supply Voltage VTRM 3.0 3.6 V Supply Voltage VCC Operating Supply Current VCC Shutdown Supply Current VTRM Supply Current VL Input Current SYMBOL ICC CONDITION 73 100 µA VBUS_DRV = 1, VBUS_CHG1= 0, VBUS_CHG2 = 0, IVBUS = 8mA 18 25 mA 0.4 2 µA DP_PULLDWN = 1, DP_PULLUP = 0, DM_PULLDWN = 1, DM_PULLUP = 0 no activity on USB serial bus 1 µA No activity on I2C serial bus 1 µA ICC(SHDN) No activity on I2C serial bus IVTRM IVL VOH INT configured to push/pull; source current ILOAD = +1mA SDA, INT, ID_OUT Output Voltage Low VOL Sink current ILOAD = -1mA SDA, SCL, ADD Input Voltage High VIH SDA, SCL, ADD Input Voltage Low VIL 2 TYP ID_IN floating, VBUS_CHG1 = 0, VBUS_CHG2 = 0, VBUS_DRV = 0, BDISC_ACONN = 0 ID_OUT, INT Output Voltage High Input/Three-State Output Leakage Current (SDA, SCL, INT) MIN VL - 0.4 V 0.4 0.67 x VL INT configured to open drain _______________________________________________________________________________________ V V 0.4 V ±1 µA USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors (VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1µF, VCC decoupled with 1µF capacitor to ground; VTRM and VL decoupled with 0.1µF capacitor to ground; CVBUS = 1µF (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +4V, VL = +1.8V, VTRM = +3.3V, and TA = +25°C.) (Notes 3, 4) PARAMETER SYMBOL CONDITION MIN ADD Pulldown Resistor TYP MAX 110 UNITS kΩ ESD PROTECTION (VBUS, ID_IN, D+, D-) ESD Protection Human Body Model ±15 IEC1000-4-2 Air-Gap Discharge ±11 IEC1000-4-2 Contact Discharge ±6 kV VBU S/CHARGE-PUMP SPECIFICATIONS (VBUS_DRV = 1, VBUS_DISCHG = 0, VBUS_CHG1 = 0, VBUS_CHG2 = 0, unless otherwise noted.) VBUS Output Voltage VBUS VBUS Output Current IVBUS IVBUS = 0 to 8mA, CVBUS = 1µF 4.63 5.25 8 mA VBUS Short-Circuit Current VBUS shorted to GND 140 Output Ripple IVBUS = 8mA, CVBUS = 1µF 100 Efficiency VCC = 2.6V, IVBUS = 8mA Switching Frequency f VBUS Voltage in Three-State Mode VBUS_DRV = 0, VBUS_DISCHG = 1 3.2 VBUS Input Impedance VBUS_DRV = 0 40 250 mA mV 80 % 600 kHz VBUS_DRV = 0 VBUS Pulldown Resistance V 5.1 0.2 V 6.5 kΩ 100 kΩ VBUS AND CURRENT SOURCE SPECIFICATIONS (VBUS_CHG1 = 1, VBUS_CHG2 = 0, VBUS_DRV = 0, VBUS_DISCHG = 0) VBUS Output Voltage VBUS CLOAD = 15µF 2.1 CLOAD = 95µF 1.9 V VBUS Current Source (Note 5) 450 600 850 µA VBUS Current Gate Time VBUS_CHG1 = 1, VBUS_CHG2 = 0 (Note 5) 56 105 155 ms 4.40 4.55 4.63 V COMPARATOR SPECIFICATIONS VBUS_VALID Comparator Threshold VBUS_VALID Comparator Hysteresis SESSION_VALID Comparator Threshold 20 1.0 SESSION_VALID Comparator Hysteresis B_SESSION_END Comparator Threshold 1.4 mV 1.8 20 0.4 B_SESSION_END Comparator Hysteresis 0.5 V mV 0.6 35 V mV SINGLE-ENDED RECEIVERS AND SE0 SPECIFICATIONS (D+, D-) Low-Level Input Threshold High-Level Input Threshold 0.8 2.0 V V _______________________________________________________________________________________ 3 MAX3353E ELECTRICAL CHARACTERISTICS (continued) MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors ELECTRICAL CHARACTERISTICS (continued) (VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1µF, VCC decoupled with 1µF capacitor to ground; VTRM and VL decoupled with 0.1µF capacitor to ground; CVBUS = 1µF (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +4V, VL = +1.8V, VTRM = +3.3V, and TA = +25°C.) (Notes 3, 4) PARAMETER Hysteresis Voltage SYMBOL CONDITION MIN VHYST Output Voltage Low (D+ and D- in SE0 state) TYP MAX 0.2 UNITS V ISINK = -2.4mA 0.3 V PULLUP/PULLDOWN RESISTOR SPECIFICATIONS (D+, D-, ID_IN) Pulldown Resistor on D+ DP_PULLDWN = 1, DP_PULLUP = 0, BDISC_ACONN = 0 14.25 15.75 kΩ Pulldown Resistor on D- DM_PULLDWN = 1, DM_PULLUP = 0, BDISC_ACONN = 0 14.25 15.75 kΩ Pullup Resistor on D+ DP_PULLDWN = 0, DP_PULLUP = 1, BDISC_ACONN = 0 1.425 1.575 kΩ Pullup Resistor on D- DM_PULLDWN = 0, DM_PULLUP = 1, DP_PULLUP = 0, BDISC_ACONN = 0 1.425 1.575 kΩ D- Leakage Current DM_PULLDWN = 0, DM_PULLUP = 0, BDISC_ACONN = 0 ±1 µA D+ Leakage Current DP_PULLDWN = 0, DP_PULLUP = 0, BDISC_ACONN = 0 ±1 µA Input Impedance on D+/D- DP_PULLUP = 0, DP_PULLDWN = 0, DM_PULLUP = 0, DM_PULLDWN = 0, BDISC_ACONN = 0 ID_IN Pullup Resistor 300 140 kΩ 200 ID_IN Input Voltage Low 270 0.33 x VCC ID_IN Input Voltage High 0.67 x VCC kΩ V V TIMING CHARACTERISTICS (VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1µF, VCC decoupled with 1µF capacitor to ground. VTRM and VL decoupled with 0.1µF capacitor to ground. CVBUS = 1µF (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C, VCC = +4V, VL = +1.8V, VTRM = +3.3V.) (Notes 3, 4) PARAMETER SYMBOL CONDITION Time to Assert D+ Pullup BDISC_ACONN = 1, ID_IN = GND (A Device) Time to Assert SE0 BDISC_ACONN = 1, ID_IN = floating (B Device) Interrupt Propagation Delay (Note 6) VBUS Rise Time From 0 to 4.4V; CLOAD = 1µF; IVBUS = 8mA; VBUS_DRV = 1 INT Out Rise Time INT out push/pull configured, CLOAD = 50pF 4 MIN 0.025 TYP 0.061 20 _______________________________________________________________________________________ MAX UNITS 1 ms 1 ms 1 µs 100 ms ns USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors (VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1µF, VCC decoupled with 1µF capacitor to ground. VTRM and VL decoupled with 0.1µF capacitor to ground. CVBUS = 1µF (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C, VCC = +4V, VL = +1.8V, VTRM = +3.3V.) (Notes 3, 4) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS INT Out Fall Time CLOAD = 50pF 20 ns ID_OUT Rise Time CLOAD = 50pF 30 ns ID_OUT Fall Time CLOAD = 50pF 10 ns Time to Exit Shutdown 500 µs Time to Enter Shutdown 1000 µs I2C/SMBUS-COMPATIBLE TIMING SPECIFICATIONS (VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1µF, VCC decoupled with 1µF capacitor to ground. VTRM and VL decoupled with 0.1µF capacitor to ground. CVBUS = 1µF (min). TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +4V, VL = +1.8V, VTRM = +3.3V, and TA = +25°C.) (Notes 3, 4) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS 400 kHz Serial Clock Frequency fSCL DC Bus Free Time Between Stop and Start Conditions tBUF 1.3 µs Start Condition Hold Time tHD:STA 0.6 µs Stop Condition Setup Time tSU:STO 0.6 µs Clock Low Period tLOW 1.3 µs Clock High Period tHIGH 0.6 µs Data Setup Time tSU:DAT Data Hold Time tHD:DAT (Note 7) Maximum Receive SCL/SDA Rise Time tR (Note 8) 300 ns Minimum Receive SCL/SDA Rise Time tR (Note 8) 20 + 0.1CB ns Maximum Receive SCL/SDA Fall Time tF (Note 8) 300 ns Minimum Receive SCL/SDA Fall Time tF (Note 8) 20 + 0.1CB ns Transmit SDA Fall Time (Note 4) Pulse Width of Suppressed Spike 100 ns 0 0.9 tF CB = 400pF, ISDA = 3mA, VL ≥ 2.5V 20 + 0.1CB 250 tF CB = 50pF, ISDA = 3mA, VL < 2.5 20 + 0.1CB 250 tSP (Note 9) 50 µs ns ns Note 3: All currents into the device are negative; currents out of the device are positive. All voltages are referenced to device ground unless otherwise specified. Note 4: Parameters are 100% production tested at +25°C, limits over temperature are guaranteed by design. Note 5: The VBUS current source and current gate time vary together with process and temperature such that the resulting VBUS pulse is guaranteed to drive a <13µF load to a voltage >2.0V, and to drive a >96µF load to a volatge <2.2V. See the SRP VBUS Pulsing section for an explanation of this self-timed pulse. Note 6: Guaranteed by design, not production tested. Note 7: A master device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL’s falling edge. Note 8: CB is total capacitance of one bus line in pF. Tested with CB = 400pF. Note 9: Input filters on SDA, SCL, and ADD suppress noise spikes less than 50ns. _______________________________________________________________________________________ 5 MAX3353E TIMING CHARACTERISTICS (continued) Typical Operating Characteristics (VCC = +3V, VL = +2.5V, CFLYING = 0.1µF, CVBUS = 1µF (ESRCVBUS = 0.1Ω), TA = +25°C.) VBUS OUTPUT VOLTAGE vs. VBUS OUTPUT CURRENT 80 60 40 MAX3353 toc02 VCC = 4.2V VCC = 3.3V 5.00 4.90 VBUS OUTPUT VOLTAGE (V) VBUS OUTPUT VOLTAGE (V) VCC = 2.6V VCC = 3.3V VCC = 4.2V 100 5.25 MAX3353 toc01 120 VBUS OUTPUT VOLTAGE vs. INPUT VOLTAGE 4.75 VCC = 2.6V 4.50 4.25 20 0 4.00 0 10 20 30 40 50 MAX3353 toc03 INPUT CURRENT vs. OUTPUT CURRENT INPUT CURRENT (mA) 4.85 IVBUS = 8mA 4.80 IVBUS = 0 4.75 4.70 10 0 OUTPUT CURRENT (mA) 20 30 40 50 2.5 3.0 OUTPUT CURRENT (mA) TIME TO ENTER SHUTDOWN 4.0 3.5 4.5 5.0 5.5 INPUT VOLTAGE (V) TIME TO EXIT SHUTDOWN MAX3353 toc04 VBUS WITH CAPACITIVE LOAD MAX3353 toc05 MAX3353 toc06 ICC 10mA/div CL = 10µF VBUS 1V/div ICC 5mA/div SCL 5V/div SCL 5V/div 200µs/div 40ms/div SUPPLY CURRENT vs. TEMPERATURE IVBUS = 8mA SUPPLY CURRENT (mA) 67.5 67.0 66.5 66.0 19 VCC = 2.6V 18 VCC = 3.3V 17 VCC = 4.2V 65.5 65.0 MAX3353 toc08 20 MAX3353 toc07 68.0 16 -40 -15 10 35 TEMPERATURE (°C) 6 CL = 96µF 100µs/div VBUS INPUT IMPEDANCE vs. TEMPERATURE VBUS INPUT IMPEDANCE (kΩ) MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors 60 85 -40 -15 10 35 60 85 TEMPERATURE (°C) _______________________________________________________________________________________ VBUS 1V/div USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors PIN NAME FUNCTION C5 VCC Power-Supply Input. VCC input range is +2.6V to +5.5V. Bypass VCC to GND with a 1µF capacitor. 2 D5 VL 3 D4 SDA Serial Data Input/Output. I2C bus serial data input/open-drain output can be driven above VL. 4 C3 ADD Address Select Input. Address selection for the I2C-compatible interface. ADD has an internal 110kΩ pulldown resistor (see the 2-Wire I2C Compatible Serial Interface section for details). 5 D3 SCL Serial Clock Input. I2C bus serial clock input. Can be driven above VL. 6 D2 INT Interrupt Output. INT is an active-low output and can be set either open-drain or push/pull output through control register 1 (default = open drain). 7 D1 ID_OUT 8 C1 VTRM TSSOP UCSP 1 Logic Supply. VL sets the logic output high voltage and logic input high threshold for SDA, SCL, INT, and ID_OUT. VL can range from +1.65V to VCC. Bypass VL to GND with a 0.1µF capacitor. Device ID Output. Output of ID_IN level translated to VL. Termination Supply Input. Connect +3V to +3.6V supply voltage for internal USB pullup resistors. Bypass VTRM to GND with a 0.1µF capacitor. 9 B1 D- USB D- (±15kV ESD Protected) 10 A1 D+ USB D+ (±15kV ESD Protected) 11 A2 ID_IN Device ID Input. Internally pulled up to VCC. ID_IN logic state is VL level translated to ID_OUT and can be read through the I2C interface (±15kV ESD protected). 12 — N.C. No Connection. Not internally connected. 13 A3 GND 14 A4 C- Charge-Pump Capacitor Negative Connection 15 A5 C+ Charge-Pump Capacitor Positive Connection 16 B5 VBUS Ground OTG Bus Supply. Provides power to the bus. VBUS can be back-driven to +6V. Bypass VBUS to GND with a 1µF capacitor. Detailed Description The MAX3353E integrates a regulated charge pump, switchable pullup/pulldown resistors, and an I 2 Ccompatible 2-wire serial interface. The internal level shifter allows the device to operate with logic supply voltages (VL) between +1.65V and VCC. The MAX3353E’s OTG-compliant charge pump operates with input supply voltages (VCC) from +2.6V to +5.5V and supplies an OTG-compatible output on VBUS while sourcing 8mA output current. The MAX3353E level-detector comparators monitor important VBUS voltages needed to support SRP and HNP and provides an interrupt output signal for OTG events that require action. The VBUS power-control block performs the various switching functions required by an OTG dual-role device and is programmable by system logic. For OTG operation, D+ and D- are connected to switchable pulldown resistors (host) and switchable pullup resistors (peripheral) controlled by internal registers. Charge Pump The MAX3353E’s OTG-compliant charge-pump operates with input supply voltages (VCC) from +2.6V to +5.5V and supplies an OTG-compatible output on VBUS with the capability of sourcing 8mA (min) output current. When VBUS is not providing power, an input impedance of no more than 100kΩ and no less than 40kΩ to GND is present on VBUS. When VBUS provides power, the rise time on VBUS from 0 to 4.4V is no longer than 100ms when driving a constant current load of 8mA and an external load capacitance of 13µF. During a continuous short circuit on VBUS, the chargepump output is current limited to 140mA (typ). Thermalshutdown circuitry turns off the charge pump if the die temperature exceeds +150°C and restarts when the die cools to 140°C. Level Shifters Internal level shifters allow the system-side interface to run at logic supply voltages as low as 1.65V. Interface logic signals are referenced to the voltage applied to VL. _______________________________________________________________________________________ 7 MAX3353E Pin Description MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors VBUS Level-Detection Comparators VBUS Comparators drive status register bits 0, 1, and 2 to indicate these important USB OTG VBUS voltage levels: • VBUS is valid (VBUS > 4.6V) • A USB session is valid (VBUS > 1.4V) • A USB session is ended (VBUS < 0.5V) The 4.6V comparator sets bit 0 in status register VBUS_VALID to 1 if VBUS > 4.6V. The A Device uses the VBUS valid status bit (VBUS_VALID) to determine if the B Device is sinking too much current (i.e., is not supported). The interrupt can be associated to either a positive or a negative transition. The 1.4V comparator sets bit 1 of status register SESSION_VALID to 1 if VBUS > 1.4V. This status bit indicates that a data transfer session is valid and the interrupt can be associated to either a positive or a negative transition. The session-end comparator sets bit 2 in the status register SESSION_END to a 1 when VBUS < 0.5V, and generates an interrupt when VBUS falls below 0.5V. Figure 1 shows the level-detector comparators. VBUS_VALID 4.6V SESSION_VALID 1.4V SESSION_END 0.5V Figure 1. Comparator Network Diagram VCC CURRENT SOURCE Interrupt Logic When OTG events require action, the MAX3353E provides an interrupt output signal on INT. An interrupt is triggered (INT goes low) when one of the conditions specified by the interrupt-mask register and interruptedge register is verified. INT stays active until the interrupt is cleared by reading the interrupt latch register. CHARGE PUMP VBUS ON/OFF 67kΩ Shutdown In shutdown mode, the MAX3353E’s quiescent current is reduced to less than 2µA. Bit 0 in control register 2 controls the shutdown feature. Setting bit 0 = 1 places the device in shutdown mode (Figure 2, Table 5). When in shutdown, the MAX3353E’s charge-pump current generator and VBUS detection comparators are turned off. During shutdown, the I2C serial interface is fully functional and registers can be read from or written to. ID_IN and ID_OUT are both functional in shutdown. VBUS Power Control VBUS is a dual-function I/O that can supply USB OTGcompliant voltage to the USB. The VBUS power-control block performs the various switching functions required by an OTG dual-role device. This action is programmed by the system logic using internal register control bits in control register 2. • Discharge VBUS through a resistor to ensure a session is not in progress. • Charge VBUS through an internal current generator to initiate SRP (session request protocol). • Connect the charge pump to VBUS to provide power on VBUS. 8 CURRENT GATE TIMER 7 0 6 0 5 0 4 0 3 0 2 0 DEFAULT (POWER-ON) VALUES 1 0 5kΩ 0 1 CONTROL REGISTER 2 0 = OPERATING MODE 1 = SHUTDOWN MODE NOTE: SWITCHES ARE SHOWN IN THEIR DEFAULT (POWER-ON) POSITIONS. A "1" CLOSES A SWITCH. Figure 2. Power-Control Block Diagram Bit 0 (SDWN) in control register 2 is used to place the MAX3353E in normal operation or shutdown mode. Setting bit 1 (VBUS_CHG1) issues a timed pulse on VBUS suitable for implementing the session request protocol (see the SRP VBUS Pulsing section). The pulse is created by turning a current source – supplied by VCC and connected to VBUS – on and off. Setting control register bit 2 (VBUS_CHG2) to 1 charges VBUS through the current source continuously. Setting VBUS_CHG2 to zero disconnects the current source. Bit 3 (VBUS_DRV) turns the _______________________________________________________________________________________ USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors Autoconnect and Autoresponse USB OTG defines the HNP, where the default host (A Device) can pass the host responsibilities off to the default peripheral (B Device). This protocol can be handled entirely by the firmware and controlling logic that drives the OTG transceiver. The MAX3353E has the option to automatically perform some of the required signaling for some of the timing-critical events in the HNP process. The automatic signaling used by the A Device, when it transfers host control to the B Device, is defined by the OTG transceiver supplement and is known as autoconnect. Autoconnect allows the transceiver to automatically connect the A Device’s D+ pullup resistor during HNP. Autoconnect is enabled when the MAX3353E is configured as an A Device (ID_IN = 0) and the BDISC_ACONN control bit is set. The MAX3353E also has the capability to automate the signaling used by the B Device when it assumes host control from the A Device. This autoresponse is not specified by the OTG-transceiver supplement. Autoresponse causes the B Device to automatically assert a bus reset by driving a single-ended zero (SE0: both D+ and D- driven low) onto USB in response to the A Device connecting its D+ pullup resistor. Autoresponse is enabled when the MAX3353E is configured as a B Device and the BDISC_ACONN control bit is set. Note: In a system, D+ and D- are also driven by a transceiver in an ASIC or other device. The autoresponse mode should not be used unless the system designer can ensure that there is no bus conflict between the transceiver and the MAX3353E driving USB to SE0. Autoconnect Details When the MAX3353E is configured as an A Device (ID_IN = GND), it can enable autodetect by setting BDISC_ACONN to one. This should be done after the USB is in the suspend state (>3ms with no traffic). The MAX3353E monitors D+/D- for an SE0. The presence of the SE0 indicates that the B Device has disconnected its pullup resistor, the first step in HNP. When SE0 is detected, the MAX3353E automatically turns on its internal pullup resistor to the D+ line within 3ms. There are two ways for firmware to ascertain that the MAX3353E has automatically turned on its D+ pullup during HNP: 1) The A_HNP status bit goes high when the D+ pullup is automatically connected during HNP 2) The A_HNP_EN control bit is set, and an interrupt is issued as the D+ pullup is connected (see also the Interrupt Logic section). By clearing BDISC_ACONN bit, the D+ pullup is disconnected. After a successful autoconnect operation, the firmware should set the DP_PULLUP control bit before clearing the BDISC_ACONN bit; this ensures that the D+ pullup remains connected. Note: The autoconnect works only if MAX3353E is not in shutdown. Autoresponse Details When the MAX3353E is configured as a B Device (ID_IN = open), setting the BDISC_ACONN control bit enables the autoresponse feature. Using this feature, the MAX3353E automatically issues a USB bus reset when the A Device becomes a peripheral. Firmware can take advantage of the autoresponse feature of the MAX3353E by doing the following: • Ensure that the system transceiver is in USB-suspend mode. Wait until the USB-suspend conditions are met (no USB activity for >3ms). Enable autoresponse. Set the BDISC_ACONN control bit. Signal a USB disconnect. Firmware clears the DP_PULLUP control bit, which disconnects the D+ pullup resistor. At this point, the MAX3353E waits at least 25µs before enabling its internal USB line monitor to detect if the A Device has attached its D+ pullup; this ensures that the D+ line is not high due to the residual effect of the B Device pullup. When the A Device has connected its D+ pullup, the MAX3353E issues a bus reset (SE0) and the B_HNP status bit goes high. • Wait for B_HNP to go high; output SE0 from the ASIC or other device on D+/D-. Disable autoresponse. By clearing BDISC_ACONN bit, the SE0 generator is turned off. The SE0 is maintained by the system USB transceiver. Note: The autoresponse works only if the MAX3353E is not in shutdown. SRP VBUS Pulsing Session request protocol (SRP) is designed to allow the A Device (default host) to conserve power by turning off VBUS when there is no USB traffic. The B Device (default peripheral) can request the A Device to turn VBUS on and initiate a new session through SRP. The B Device must initiate SRP in two ways: data-line and VBUS pulsing. Firmware is responsible for turning on and off the pullup resistor on D+ to implement data-line pulsing. Firmware can also be used to turn on and off a current source to implement VBUS pulsing. _______________________________________________________________________________________ 9 MAX3353E charge pump on and off to power VBUS. Bit 4 in control register 2 (VBUS_DISCHG) is used to discharge VBUS through a 5kΩ resistor. Figure 2 and Table 2 show power control. MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors The MAX3353E also has a special feature that allows it to control the timing of the VBUS pulse. Since an OTG device could be plugged into a PC, the VBUS pulse must be particularly well controlled to prevent damage to a PC host. For this reason, VBUS pulsing is done by turning on and off a current source. The VBUS pulse must be timed so it drives a 13µF load (when it is connected to the A Device) to a voltage greater than 2.1V, and it drives a >96µF load (when it is connected to a standard PC) to a voltage less than 2.0V. Firmware can control the current source and the timing of the VBUS pulse through the VBUS_CHG2 control bit. The MAX3353E also has the capability to time the pulse VTRM BIT 4 BIT 5 SW1 SW2 0 0 OPEN OPEN 0 1 OPEN CLOSED 1 0 CLOSED OPEN 1 1 CLOSED OPEN 1.5kΩ SW2 SW1 D+ D15kΩ 15kΩ SW4 itself. Firmware initiates the self-timed VBUS pulse by setting the VBUS_CHG1 control bit to 1. The internal timer and current generator guarantee that the VBUS voltage goes above 2.1V if CVBUS < 13µF within 90ms and stands below 2.0V if CVBUS > 96µF. Once the time has elapsed, if another VBUS pulse is required, it is necessary to clear the VBUS_CHG1 bit and then set it again. Note: SRP VBUS pulsing and its associated current generator work only if the MAX3353E is not in shutdown. Data-Line Pullup and Pulldown Resistance For OTG operation, D+ and D- are connected to switchable pulldown resistors (host) and switchable pullup resistors (peripheral). Data-line pullup/pulldown resistors are individually controlled through data bits 4 through 7 in control register 1. Two 15kΩ pulldown resistors allow the device to be set as a host and are asserted by bits 6 and 7. The 1.5kΩ pullup resistor is applied to the data lines through SW1 and SW2, which are controlled by bits 4 and 5. D+ pullup has higher priority to avoid direct connection of D+ and D-. Each of the control bits controls a designated switch; therefore, pullup and pulldown switches can be asserted at the same time. A simplified schematic of the switching network is shown in Figure 3. The bidirectional D+ and D- lines are ESD protected to ±15kV, reducing external components in many applications. Applications Information SW3 2-Wire I2C-Compatible Serial Interface A register file that interfaces to the control logic uses a simple 2-wire interface operating up to 400kHz to control the various switches and modes. GND 7 0 DEFAULT (POWER ON) VALUES 6 0 5 0 4 0 3 0 2 0 1 0 0 0 Serial Addressing The MAX3353E operates as a slave that sends and receives control and status signals through an I 2Ccompatible 2-wire interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve CONTROL REGISTER 1 NOTE: SWITCHES ARE SHOWN IN THEIR DEFAULT (POWER-ON) POSITIONS. A "1" CLOSES A SWITCH. Figure 3. Pullup and Pulldown Resistors Network SCL tF tHD:STA tR tLOW tHIGH tSU:DAT tHD:DAT tSU:STO SDA tBUF Figure 4. 2-Wire Serial Interface Timing Details 10 ______________________________________________________________________________________ USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors SDA Slave Address SCL S P START CONDITION STOP CONDITION Figure 5. Start and Stop Conditions bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and from the MAX3353E and generates the SCL clock that synchronizes the data transfer (Figure 4). The MAX3353E SDA line operates as both an input and an open-drain output. A pullup resistor (4.7kΩ typ) is required on SDA. The MAX3353E SCL line operates only as an input. A pullup resistor (4.7kΩ typ) is required on SCL if there are multiple masters on the 2wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition (Figure 5) sent by a master, followed by the MAX3353E 7-bit slave address plus R/W bit (Figure 6), a register address byte, one or more data bytes, and finally a STOP condition (Figure 5). Start and Stop Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning the SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 5). Bit Transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable while SCL is high (Figure 7). Acknowledge The acknowledge bit is the clocked ninth bit that the recipient uses to handshake receipt of each byte of data (Figure 8). Thus, each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When The MAX3353E has a 7-bit-long slave address. The eighth bit following the 7-bit slave address is the R/W bit. It is low for a write command, high for a read command. The first 6 bits (MSBs) of the MAX3353E slave address are always 010110. Select slave address bit A0 by connecting the address input ADD to VL, GND, or leave floating (ADD is internally pulled to GND through a 110kΩ resistor). The MAX3353E has two possible slave addresses (Table 1). As a result, only two MAX3353E devices can share the same interface. Write Byte Format A write to the MAX3353E comprises the transmission of the MAX3353E’s slave address with the R/W bit set to zero, followed by 2 bytes of information. The first byte of information is the command byte that determines which register of the MAX3353E is to be written by the second byte. The second byte is the data that goes into the register that is set by the first byte. Figure 9 shows the typical write byte format. Read Byte Format A read from the MAX3353E comprises the transmission of the MAX3353E’s slave address (from the master) with the R/W bit set to zero, followed by one byte containing the address of the register, from which the master is going to read data, and then followed by MAX3353E’s slave address again with the R/W bit set to one. After that one byte of data is being read by the master. Figure 10 shows the read byte format that must be used. To read many contiguous registers, multiple accesses are required. Registers Control Registers (10h, 11h) There are two read/write control registers. Control register 1 is used to set D+, D- pullup or pulldown, and to set interrupt output to open-drain or push-pull. Control register 2 is the bus control register used to control the bus operation and put the device into shutdown mode. (Tables 3, 4, and 5.) Status Register (13h) The status register is a read-only register for determining valid bus and session comparator thresholds, ID_IN status, and HNP success. Tables 6 and 7 show status register address map, bit configuration, and description. ______________________________________________________________________________________ 11 MAX3353E the master is transmitting to the MAX3353E, the MAX3353E generates the acknowledge bit because it is the recipient. When the MAX3353E is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors 1 0 SDA START 1 1 0 0 R/W A0 MSB ACK LSB SCL Figure 6. Slave Address START CONDITION SDA CLOCK PULSE FOR ACKNOWLEDGMENT SCL 1 2 8 9 SDA BY TRANSMITTER SCL DATA LINES STABLE, CHANGE OF DATA VALID DATA ALLOWED SDA BY RECEIVER Figure 8. Acknowledge Figure 7. Bit Transfer S PART ADDRESS A6 A5 A4 A3 A2 R/W A1 A0 A5 A4 A3 REGISTER ADDRESS W DATA A6 ACK 8 bits ACK A2 A1 ACK 0 7 bits A7 S P A0 8 bits Where: Slave address: Part address Register address: Selecting which register to write to Data: Data byte being read by the master R/W: Read/Write (R/W = 1: Read; R/W = 0: Write) S: Start condition P: Stop condition ACK: Acknowledge bit from the slave NACK: Not acknowledged bit from the master Blank: Master transmission Shaded: Slave transmisstion Figure 9. Write Byte Format S PART ADDRESS A6 A5 A4 A3 A2 A1 A0 R/W ACK 0 0 REGISTER ADDRESS 7 bits RS A5 A4 A3 0 8 bits PART ADDRESS A6 A2 A1 A0 R/W ACK 1 0 7 bits Where: Slave address: Part address Register address: Selecting which register to write to Data: Data byte being read by the master R/W: Read/Write (R/W = 1: Read; R/W = 0: Write) S: Start condition DATA NACK 1 8 bits P: Stop condition ACK: Acknowledge bit from the slave NACK: Not acknowledged bit from the master Blank: Master transmission Shaded: Slave transmisstion Figure 10. Read Byte Format 12 ACK ______________________________________________________________________________________ P USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors ADD PIN ADDRESS BITS A6 A5 A4 A3 A2 A1 A0 Float or GND 0 1 0 1 1 0 0 VL 0 1 0 1 1 0 1 Interrupt Registers (14h, 15h, 16h) There are three interrupt registers. Interrupt mask register is a read/write register used to enable interrupts and read status of interrupts. Interrupt edge register is a read/write register for setting and determining interrupts for positive and negative edges. Interrupt latch register is a read only register to check and validate interrupt requests. Table 8 shows the interrupt mask, Table 2. Register Address Map NAME ADD BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Manufacturer Register 0 00h 0 1 1 0 1 0 1 0 Manufacturer Register 1 01h 0 0 0 0 1 0 1 1 Manufacturer Register 2 02h 0 1 0 1 0 0 1 1 Manufacturer Register 3 03h 0 0 1 1 0 0 1 1 Product ID Register 0 04h 0 1 0 0 1 0 0 0 Product ID Register 1 05h 0 1 0 1 1 0 1 0 Product ID Register 2 06h 0 1 0 0 0 0 1 0 Product ID Register 3 07h 0 0 0 0 0 0 0 1 Reserved — — — — — BDISC_ ACONN IRQ_MODE — 08h-0Fh — — — — Control Register 1 10h DM_ PULLDWN DP_ PULLDWN DM_ PULLUP DP_ PULLUP Control Register 2 11h — — — Reserved 12h — — — — — — — — Status Register 13h — B_HNP A_HNP ID_FLOAT ID_GND SESSION_ END SESSION_ VALID VBUS_VALID Interrupt Mask 14h — — A_HNP_EN ID_ FLOAT_EN ID_ GND_EN SESSION_ END_EN SESSION_ VALID_EN VALID_EN — — — SESSION_ VALID_ED VALID_ED Interrupt Edge VBUS_ DISCHG 15h Interrupt Latch 16h Reserved 17h -Ffh — A_HNP_RQ — — — VBUS_DRV VBUS_CHG2 VBUS_CHG1 VBUS_ SDWN VBUS_ VBUS_ ID_ FLOAT_RQ ID_ GND_RQ SESSION_ END_RQ SESSION_ VALID_RN VALID_RN SESSION_ VALID_RP VALID_RP — — — — — — — VBUS_ ______________________________________________________________________________________ 13 MAX3353E Table 1. MAX3353E Address Map MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors interrupt edge, and interrupt latch address maps. Bit configuration is shown in Tables 9, 10, and 11. Manufacturer and ID Register Address Map The manufacturer and ID registers are read-only registers (Table 12). External Capacitors Five external capacitors are recommended for proper operation. Bypass VL and VTRM to GND with a 0.1µF ceramic capacitor. Bypass VBUS and VCC to GND with a 1µF low-ESR ceramic capacitor. For the internal charge pump, use a 0.1µF ceramic capacitor between C+ and C-. Table 3. Control Register Address Map REGISTER ADDRESS Control 1 Control 2 POWER-UP REGISTER STATUS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 10h 0 0 0 0 0 0 0 0 11h 0 0 0 0 0 0 0 1 Table 5. Control Register 2 (11h) Table 4. Control Register 1 (10h) BIT NUMBER SYMBOL 0 — OPERATION SYMBOL 0 SDWN Not used Interrupt pin open-drain/push-pull: 0 = open drain 1 = push/pull 1 IRQ_MODE 2 BDISC_ ACONN 3 — 4 DP_PULLUP D+ pullup (high priority) 0 = D+ pullup unconnected 1 = D+ pullup connected DM_PULLUP D- pullup: 0 = D- pullup unconnected 1 = D- pullup connected 5 BIT NUMBER 0 = disable 1 = enable 1 6 DP_ PULLDWN D+ pulldown: 0 = D+ pulldown unconnected 1 = D+ pulldown connected 7 DM_ PULLDWN D- pulldown: 0 = D- pulldown unconnected 1 = D- pulldown connected 3 4 Puts part in shutdown mode: 0 = operating 1 = shutdown mode VBUS_CHG1 Charge VBUS through a current generator for 105ms: 0 = current generator OFF 1 = current generator ON (automatically turned off after 105ms) VBUS_CHG2 Charge VBUS through a current generator: 0 = current generator OFF 1 = current generator ON Not used 2 OPERATION VBUS_DRV Drive VBUS through charge pump 0 = VBUS not driven 1 = VBUS connected to the charge pump Discharge VBUS through a resistor: VBUS_DISCHG 0 = Resistor disconnected 1 = Resistor connected 5 — Not used 6 — Not used 7 — Not used Table 6. Status Register Address Map REGISTER ADDRESS Status 13h POWER-UP REGISTER STATUS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0 0 0 — — — — — (—) = don’t know 14 ______________________________________________________________________________________ USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E Table 7. Status Register (13h) BIT NUMBER SYMBOL 0 VBUS_VALID Device A VBUS valid comparator, threshold = 4.55V: 0 = VBUS lower than threshold 1 = VBUS higher than threshold 1 SESSION_ VALID Session-valid comparator, threshold = 1.4V: 0 = VBUS lower than threshold 1 = VBUS higher than threshold 2 SESSION_END 3 ID_GND 4 ID_FLOAT 5 A_HNP Set when Device A is configured, BDISC_ACONN is enabled and has attached pullup during HNP; cleared by resetting BDISC_ACONN bit in control register 1. 6 B_HNP Set when Device B is configured, BDISC_ACONN is enabled and has asserted an SE0 during HNP; cleared by resetting BDISC_ACONN bit in control register 1. 7 — CONTENTS VBUS session-end comparator, threshold = 0.5V: 0 = VBUS higher than threshold 1 = VBUS lower than threshold ID_IN grounded: 0 = not grounded 1 = grounded ID_IN floating: 0 = not floating 1 = floating Not used Table 8. Interrupt Register Address Map REGISTER ADDRESS Interrupt Mask Interrupt Edge Interrupt Latch POWER-UP REGISTER STATUS BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 14h 0 0 0 0 0 0 0 0 15h 0 0 0 0 0 0 0 0 16h 0 0 0 0 0 0 0 0 Table 9. Interrupt Mask Register (14h) BIT NUMBER SYMBOL OPERATION 0 VBUS_VALID_EN Enables VBUS_VALID interrupt 1 SESSION_ VALID_EN Enables SESSION_VALID interrupt 2 SESSION_ END_EN Enables SESSION_END interrupt 3 ID_GND_EN 4 ID_FLOAT_EN 5 A_HNP_EN 6 — Not used 7 — Not used Enables ID_GND interrupt Enables ID_FLOAT interrupt Enables A_HNP interrupt ______________________________________________________________________________________ 15 MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors Table 10. Interrupt Edge Register (15h) BIT NUMBER 0 SYMBOL VBUS_ VALID_ED Table 11. Interrupt Latch Register (16h) BIT NUMBER OPERATION VBUS_VALID interrupt on positive/negative edge: 0 = detected on negative edge 1 = detected on positive edge SESSION_VALID interrupt on positive/negative edge: 0 = detected on negative edge 1 = detected on positive edge 1 SESSION_ VALID_ED 2 — Not used 3 — Not used 4 — Not used 5 — Not used 6 — Not used 7 — Not used SYMBOL OPERATION VBUS_VALID positive edge interrupt request: 0 = not asserted 1 = asserted 0 VBUS_VALID_RP 1 SESSION_ VALID _RP 2 VBUS_ VALID _RN 3 SESSION_ VALID _RN SESSION_ VALID negative edge interrupt request: 0 = not asserted 1 = asserted 4 SESSION_END_ RQ SESSION_END interrupt request: 0 = not asserted 1 = asserted 5 ID_GND_RQ 6 ID_FLOAT_RQ 7 A_HNP_RQ SESSION_ VALID positive edge interrupt request: 0 = not asserted 1 = asserted VBUS_VALID negative edge interrupt request: 0 = not asserted 1 = asserted ID_GND interrupt request: 0 = not asserted 1 = asserted ID_FLOAT interrupt request: 0 = not asserted 1 = asserted DP_SRP interrupt request: 0 = not asserted 1 = asserted Table 12. Manufacturer and ID Register Address Map REGISTER ADD BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 hex Manufacturer Register 0 00h 0 1 1 0 1 0 1 0 6A Manufacturer Register 1 01h 0 0 0 0 1 0 1 1 0B Manufacturer Register 2 02h 0 1 0 1 0 0 1 1 53 Manufacturer Register 3 03h 0 0 1 1 0 0 1 1 33 Product ID Register 0 04h 0 1 0 0 1 0 0 0 48 Product ID Register 1 05h 0 1 0 1 1 0 1 0 5A Product ID Register 2 06h 0 1 0 0 0 0 1 0 42 Product ID Register 3 07h 0 0 0 0 0 0 0 1 01 16 ______________________________________________________________________________________ USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors ±15kV ESD Protection To protect the MAX3353E against ESD, D+, D-, ID_IN, and VBUS, have extra protection against static electricity to protect the device up to ±15kV. The ESD structures withstand high ESD in all states—normal operation, shutdown, and powered down. In order for the 15kV ESD structures to work correctly, a 1µF or greater capacitor must be connected from VBUS to GND. ESD protection can be tested in various ways; D+, D-, ID_IN, and VBUS are characterized for protection to the following limits: 1) ±15kV using the Human Body Model 2) ±6kV using the IEC 1000-4-2 Contact Discharge method 3) ±11kV using the IEC 1000-4-2 Air-Gap Discharge method ESD Test Conditions: ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results. Machine Model The Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. All pins require this protection during manufacturing. The Machine Model is less relevant to I/O ports after PC board assembly. Layout Considerations The MAX3353E high oscillator frequency makes proper layout important to ensure stability and maintain the output voltage under all loads. For best performance, minimize the distance between the capacitors and the MAX3353E. UCSP Reliability For the latest application details on UCSP construction, dimensions, tape-carrier information, printed circuit board techniques, bump-pad layout, and recommended reflow temperature profile as well as the latest information on reliability testing results, refer to Maxim Application Note: UCSP – A Wafer-Level Chip Scale Package available on Maxim’s website at www.maxim-ic.com/ucsp. Human Body Model Figure 11 shows the Human Body Model and Figure 12 shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5kΩ resistor. IEC 1000-4-2 The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The major difference between tests done using the Human Body Model and IEC 1000-4-2 is a higher peak current in IEC 1000-4-2, because series resistance is lower in the IEC 1000-4-2 model. Hence, the ESD withstand voltage measured to IEC 1000-4-2 is generally lower than that measured using the Human Body Model. Figure 13 shows the IEC 1000-4-2 model. The Air-Gap Discharge test involves approaching the device with a charged probe. The Contact Discharge method connects the probe to the device before the probe is energized. Figure 14 shows the IEC 1000-4-2 current waveform. ______________________________________________________________________________________ 17 MAX3353E Connect all capacitors as close to the device as possible. VBUS and VCC bypass capacitors should have trace lengths as short as possible MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors RC 1MΩ CHARGE-CURRENTLIMIT RESISTOR RD 1.5kΩ IP 100% 90% DISCHARGE RESISTANCE Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) AMPERES HIGHVOLTAGE DC SOURCE Cs 100pF STORAGE CAPACITOR DEVICE UNDER TEST 36.8% 10% 0 0 Figure 11. Human Body ESD Test Models CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE Cs 150pF Figure 12. Human Body Model Current Waveform RD 330Ω I 100% 90% DISCHARGE RESISTANCE STORAGE CAPACITOR Figure 13. IEC 1000-4-2 ESD Test Model DEVICE UNDER TEST IPEAK RC 50Ω to 100Ω TIME tDL CURRENT WAVEFORM tRL 10% t tr = 0.7ns TO 1ns 30ns 60ns Figure 14. IEC 1000-4-2 Current Waveform 18 ______________________________________________________________________________________ USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors Typical Applications Circuit TOP VIEW VL VL 2 15 C+ SDA 3 14 C- ADD 4 13 GND 0.1µF MAX3353EEUE SCL 5 12 N.C. INT 6 11 ID_IN ID_OUT 7 4.7kΩ 9 D+ ID_IN GND D- C VTRM D VTRM VCC C1+ SCL C1- CFLYING 0.1µF CVBUS 1µF MAX3353E INT C- 0.1µF SDA µP C+ D- B 0.1µF VBUS D- TSSOP A VTRM 4.7kΩ VL 10 D+ VTRM 8 VCC PULLUP RESISTORS 16 VBUS VCC 1 D+ ID_IN ID_OUT D+ ADD D- VBUS ID D+ DGND OTG CONNECTOR GND VBUS MAX3353EEBP VCC ADD ID_OUT INT SCL SDA VL 1 2 3 4 5 Chip Information TRANSISTOR COUNT: 9394 PROCESS: BiCMOS UCSP ______________________________________________________________________________________ 19 MAX3353E Pin Configurations Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 5x4 UCSP.EPS MAX3353E USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors PACKAGE OUTLINE, 5x4 UCSP 21-0095 20 ______________________________________________________________________________________ I 1 1 USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors TSSOP4.40mm.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX3353E Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)