ON MC74ACT05DR2 Hex inverter with open−drain output Datasheet

MC74AC05, MC74ACT05
Hex Inverter with
Open−Drain Outputs
The MC74AC/ACT05 is identical in pinout to the LS05. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with TTL outputs.
http://onsemi.com
Features
• Outputs Source/Sink 24 mA
• ′ACT05 Has TTL Compatible Inputs
• Pb−Free Packages are Available
PDIP−14
N SUFFIX
CASE 646
1
VCC
A6
Y6
A5
Y5
A4
Y4
14
13
12
11
10
9
8
SOIC−14
D SUFFIX
CASE 751A
1
1
2
3
4
5
6
7
A1
Y1
A2
Y2
A3
Y3
GND
TSSOP−14
DT SUFFIX
CASE 948G
1
Top View
SOEIAJ−14
M SUFFIX
CASE 965
Figure 1. Pinout: 14-Lead Packages
1
FUNCTION TABLE
2, 4, 6, 8, 10, 12
A
NOTE:
Input A
Output Y
L
H
Z
L
Z = High Impedance
Y*
ORDERING INFORMATION
1, 3, 5, 9, 11, 13
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
PIN 14 = VCC
PIN 7 = GND
* DENOTES OPEN-DRAIN OUTPUTS
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 6 of this data sheet.
Figure 2. Logic Diagram
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 8
1
Publication Order Number:
MC74AC05/D
MC74AC05, MC74ACT05
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
−0.5 to +7.0
V
Vin
DC Input Voltage (Referenced to GND)
−0.5 to VCC + 0.5
V
Vout
DC Output Voltage (Referenced to GND)
−0.5 to VCC + 0.5
V
Iin
DC Input Current, per Pin
± 20
mA
Iout
DC Output Sink/Source Current, per Pin
± 50
mA
ICC
DC VCC or GND Current per Output Pin
± 50
mA
Tstg
Storage Temperature
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VREG
tr, tf
Parameter
Min
Typ
Min
′AC
2.0
5.0
6.0
′ACT
4.5
5.0
5.5
0
−
VCC
VCC @ 3.0 V
−
150
−
VCC @ 4.5 V
−
40
−
VCC @ 5.5 V
−
25
−
VCC @ 4.5 V
−
10
−
VCC @ 5.5 V
−
8.0
−
−
−
140
°C
−40
25
85
°C
Supply Voltage
DC Regulated Power Voltage (Ref. to GND)
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
Unit
V
V
ns/V
tr, tf
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
TJ
Junction Temperature (PDIP)
TA
Operating Ambient Temperature Range
IOH
Output Current − HIGH
−
−
−24
mA
IOL
Output Current − LOW
−
−
24
mA
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
http://onsemi.com
2
ns/V
MC74AC05, MC74ACT05
DC CHARACTERISTICS
74AC
Symbol
Parameter
VCC
(V)
74AC
TA = +25°C
Typ
VIH
Minimum High Level Input Voltage
VIL
Maximum Low Level Input Voltage
VOL
Maximum Low Level Output Voltage
IIN
IOLD
IOHD
TA = −40°C to +85°C
Unit
Conditions
Guaranteed Limits
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
VOUT = 0.1 V
or VCC − 0.1 V
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
VOUT = 0.1 V
or VCC − 0.1 V
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
V
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
Maximum Input Leakage Current
5.5
−
±0.1
†Minimum Dynamic
Output Current
5.5
−
5.5
−
IOUT = 50 mA
V
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
±1.0
mA
VI = VCC, GND
−
75
mA
VOLD = 1.65 V Max
−
−75
mA
VOHD = 3.85 V Min
mA
VIN = VCC or GND
ICC
Maximum Quiescent Supply Current
5.5
−
4.0
40
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V.
AC CHARACTERISTICS
Symbol
Parameter
VCC*
(V)
74AC
74AC
TA = +25°C CL = 50 pF
TA = −40°C to +85°C CL = 50 pF
Min
Typ
Max
Min
Max
Unit
tPZL
Propagation Delay Output Enable
3.3
5.0
1.5
1.5
−
−
8.0
6.0
1.0
1.0
9.0
6.5
ns
tPLZ
Propagation Delay Output Enable
3.3
5.0
1.5
1.5
−
−
8.0
6.0
1.0
1.0
9.0
6.5
ns
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
http://onsemi.com
3
MC74AC05, MC74ACT05
DC CHARACTERISTICS
74ACT
Symbol
VCC
(V)
Parameter
74ACT
TA = +25°C
TA = −40°C to +85°C
Typ
Unit
Conditions
Guaranteed Limits
VIH
Minimum High Level Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
VOUT = 0.1 V
or VCC − 0.1 V
VIL
Maximum Low Level Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
VOUT = 0.1 V
or VCC − 0.1 V
VOL
Maximum Low Level Output Voltage
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
V
4.5
5.5
−
−
0.36
0.36
0.44
0.44
0.44
Maximum Input Leakage Current
5.5
−
±0.1
±1.0
mA
VI = VCC, GND
DICCT
Additional Max. ICC/Input
5.5
0.6
−
1.5
mA
VI = VCC − 2.1 V
IOLD
IOHD
†Minimum Dynamic Output Current
5.5
5.5
−
−
−
−
75
−75
mA
mA
VOLD = 1.65 V Max
VOHD = 3.85 V Min
ICC
Maximum Quiescent Supply Current
5.5
−
4.0
40
mA
VIN = VCC or GND
IIN
IOUT = 50 mA
*VIN = VIL or VIH
IOH
24 mA
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS
Symbol
VCC*
(V)
Parameter
74ACT
74ACT
TA = +25°C CL = 50 pF
TA = −40°C to +85°C CL = 50 pF
Min
Typ
Max
Min
Max
Unit
tPZL
Propagation Delay Output Enable
5.0
1.5
−
8.0
1.0
8.5
ns
tPLZ
Propagation Delay Output Enable
5.0
1.5
−
8.5
1.0
9.0
ns
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Parameter
Value Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
30
pF
VCC = 5.0 V
http://onsemi.com
4
MC74AC05, MC74ACT05
ORDERING INFORMATION
Device
Package
MC74AC05N
PDIP−14
MC74AC05NG
PDIP−14
(Pb−Free)
MC74AC05D
SOIC−14
MC74AC05DG
SOIC−14
(Pb−Free)
MC74AC05DR2
SOIC−14
MC74AC05DR2G
SOIC−14
(Pb−Free)
MC74AC05MEL
SOEIAJ−14
MC74AC05MELG
SOEIAJ−14
(Pb−Free)
MC74ACT05N
PDIP−14
MC74ACT05NG
PDIP−14
(Pb−Free)
MC74ACT05D
SOIC−14
MC74ACT05DG
SOIC−14
(Pb−Free)
MC74ACT05DR2
SOIC−14
MC74ACT05DR2G
SOIC−14
(Pb−Free)
MC74ACT05DTR2
TSSOP−14*
MC74ACT05DTR2G
TSSOP−14*
MC74ACT05MEL
SOEIAJ−14
MC74ACT05MELG
SOEIAJ−14
(Pb−Free)
Shipping †
25 Units / Rail
55 Units / Rail
2500 / Tape & Reel
2000 / Tape & Reel
25 Units / Rail
55 Units / Rail
2500 / Tape & Reel
2000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*These packages are inherently Pb−Free.
http://onsemi.com
5
MC74AC05, MC74ACT05
MARKING DIAGRAMS
PDIP−14
SOIC−14
SOEIAJ−14
14
14
14
AC05G
AWLYWW
MC74AC05N
AWLYYWWG
1
1
14
14
74AC05
ALYWG
1
14
14
ACT
05
ALYWG
G
ACT05G
AWLYWW
MC74ACT05N
AWLYYWWG
1
TSSOP−14
1
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
http://onsemi.com
6
74ACT05
ALYWG
1
MC74AC05, MC74ACT05
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE P
14
8
1
7
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
B
A
F
L
N
C
−T−
SEATING
PLANE
H
G
D 14 PL
J
K
0.13 (0.005)
M
M
http://onsemi.com
7
DIM
A
B
C
D
F
G
H
J
K
L
M
N
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.290
0.310
−−−
10 _
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.37
7.87
−−−
10 _
0.38
1.01
MC74AC05, MC74ACT05
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
M
7
1
G
−T−
D 14 PL
0.25 (0.010)
T B
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
M
F
R X 45 _
C
SEATING
PLANE
B
M
S
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
8
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0_
7_
0.228 0.244
0.010 0.019
MC74AC05, MC74ACT05
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
N
2X
14
L/2
M
B
−U−
L
PIN 1
IDENT.
N
F
7
1
0.15 (0.006) T U
0.25 (0.010)
8
S
DETAIL E
K
A
−V−
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÇÇÇ
K1
J J1
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
G
H
DETAIL E
http://onsemi.com
9
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.50
0.60
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.020 0.024
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0_
8_
MC74AC05, MC74ACT05
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE A
14
LE
8
Q1
E HE
L
7
1
M_
DETAIL P
Z
D
VIEW P
A
e
DIM
A
A1
b
c
D
E
e
HE
0.50
LE
M
Q1
Z
A1
b
0.13 (0.005)
c
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
M
0.10 (0.004)
MILLIMETERS
MIN
MAX
−−−
2.05
0.05
0.20
0.35
0.50
0.10
0.20
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
−−−
1.42
INCHES
MIN
MAX
−−− 0.081
0.002
0.008
0.014
0.020
0.004
0.008
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
−−− 0.056
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
10
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MC74AC05/D
Similar pages