Maxim MAX4721EUA 4.5 dual spst analog switches in ucsp Datasheet

19-2632; Rev 0; 10/02
4.5Ω Dual SPST Analog Switches in UCSP
Features
♦
♦
♦
♦
♦
USB 1.1 Signal Switching
<2ns Differential Skew
-3dB Bandwidth: >300MHz
Low 15pF On-Channel Capacitance
Low RON (max) Switches
4.5Ω (max) (+3V Supply)
3Ω (max) (+5V Supply)
♦
♦
♦
♦
♦
♦
♦
♦
♦
0.3Ω (max) RON Match (+3V Supply)
1.2Ω (max) RON Flatness (+3V Supply)
<0.5nA Leakage Current at TA = +25°C
High Off-Isolation: -55dB (10MHz)
Low Crosstalk: -80dB (10MHz)
Low Distortion: 0.03%
+1.8V CMOS-Logic Compatible
Single-Supply Operation from +1.8V to +5.5V
Rail-to-Rail® Signal Handling
Applications
Ordering Information
Battery-Operated Equipment
PART
Audio/Video-Signal Routing
TEMP RANGE
PIN/BUMPPACKAGE
Low-Voltage Data-Acquisition Systems
MAX4721EUA
-40°C to +85°C
8 µMAX
Sample-and-Hold Circuits
MAX4721EBL-T*
-40°C to +85°C
9 UCSP-9
MAX4722EUA
-40°C to +85°C
8 µMAX
MAX4722EBL-T*
-40°C to +85°C
9 UCSP-9
MAX4723EUA
-40°C to +85°C
8 µMAX
MAX4723EBL-T*
-40°C to +85°C
9 UCSP-9
Communications Circuits
TOP
MARK
—
ABP
—
ABQ
—
ABR
Note: UCSP package requires special solder temperature profile described in the Absolute Maximum Ratings section.
*UCSP reliability is integrally linked to the user’s assembly methods, circuit board material, and environment. See the UCSP reliability notice in the UCSP Reliability section of this data sheet for
more information.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
UCSP is a trademark of Maxim Integrated Products, Inc.
Pin Configurations/Functional Diagrams/Truth Tables
MAX4722
MAX4721
TOP VIEW
1
2
3
IN2
GND
NO2
MAX4723
1
2
3
IN2
GND
NC2
1
2
3
IN2
GND
NC2
(BUMP SIDE DOWN)
A
A
B
A
B
COM1
COM2
C
B
COM1
COM2
C
NO1
V+
UCSP
IN1
COM1
COM2
IN_
LOW
HIGH
NO_
OFF
ON
NC_
ON
OFF
C
NC1
V+
UCSP
IN1
NO1
V+
IN1
UCSP
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX4721/MAX4722/MAX4723
General Description
The MAX4721/MAX4722/MAX4723 low-voltage, low onresistance (RON), dual single-pole/single throw (SPST)
analog switches operate from a single +1.8V to +5.5V
supply. These devices are designed for USB 1.1 and
audio switching applications.
The MAX4721/MAX4722/MAX4723 feature 4.5Ω RON
(max) with 1.2Ω flatness and 0.3Ω matching between
channels. These new switches feature guaranteed
operation from +1.8V to +5.5V and are fully specified at
3V and 5V. These switches offer break-before-make
switching (1ns) with t ON <80ns and t OFF <40ns at
+2.7V. The digital logic inputs are +1.8V logic compatible with a +2.7V to +3.6V supply.
These switches are packaged in a chip-scale package
(UCSP™), significantly reducing the required PC board
area. The chip occupies only a 1.52mm ✕ 1.52mm area
and has a 3 ✕ 3 bump array with a bump pitch of
0.5mm. These switches are also available in an 8-pin
µMAX package.
MAX4721/MAX4722/MAX4723
4.5Ω Dual SPST Analog Switches in UCSP
ABSOLUTE MAXIMUM RATINGS
(All Voltages Referenced to GND, Unless Otherwise Noted.)
V+, IN_...................................................................-0.3V to +6.0V
COM_, NO_, NC_ (Note 1) ...........................-0.3V to (V+ + 0.3V)
Continuous Current COM_, NO_, NC_ ...........................±100mA
Peak Current COM_, NO_, NC_
(pulsed at 1ms, 10% duty cycle)................................±200mA
Continuous Power Dissipation (TA = +70°C)
8-Pin µMAX (derate 4.5mW/°C above +70°C) .............362mW
9-Bump UCSP (derate 4.7mW/°C above +70°C).........379mW
ESD Method 3015.7 .............................................................>2kV
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Bump Temperature (soldering) (Note 2)
Infrared (15s) ...............................................................+220°C
Vapor Phase (60s) .......................................................+215°C
Note 1: Signals on COM_, NO_, or NC_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating.
Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device
can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry standard specification, JEDEC 020A, paragraph 7.6, table 3 for IR/VPR and convection reflow.
Preheating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
Analog Signal Range
SYMBOL
CONDITIONS
TA
VCOM_,
VNO_, VNC_
MIN
TYP
0
MAX
UNITS
V+
V
ANALOG SWITCH
+25°C
On-Resistance (Note 5)
RON
V+ = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.5V
∆RON
V+ = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.5V
3.0
TMIN to
TMAX
5
+25°C
On-Resistance Match Between
Channels (Notes 5, 6)
0.1
TMIN to
TMAX
On-Resistance Flatness (Note 7)
RFLAT(ON)
NO_, NC_ Off-Leakage Current
(Note 8)
INO_(OFF),
INC_(OFF)
V+ = 3.6V, VCOM_ = 0.3V, 3.3V;
VNO_ or VNC_ = 3.3V, 0.3V
COM_ Off-Leakage Current
(Note 8)
ICOM_ (OFF), V+ = 3.6V, VCOM_ = 0.3V, 3.3V;
ICOM_ (OFF) VNO_ or VNC_ = 3.3V, 0.3V
COM_ On-Leakage Current
(Note 8)
ICOM_(ON)
V+ = 3.6V, VCOM_ = 0.3V, 3.3V;
VNO_ or VNC_ = 0.3V, 3.3V, or
floating
tON
VNO_, VNC_ = 1.5V;
RL = 300Ω, CL = 35pF, Figure 1
TMIN to
TMAX
-0.5
TMIN to
TMAX
-1.5
+25°C
-0.5
TMIN to
TMAX
-1.5
+25°C
-1
TMIN to
TMAX
-2
2
+0.01
TMIN to
TMAX
_______________________________________________________________________________________
nA
+1
+2
40
nA
+0.5
+1.5
+0.01
Ω
+0.5
+1.5
+0.01
Ω
1.2
1.5
+25°C
+25°C
Turn-On Time
0.6
Ω
0.3
0.4
+25°C
V+ = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.0V, 1.5V, 2.0V
4.5
nA
80
100
ns
4.5Ω Dual SPST Analog Switches in UCSP
(V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
Turn-Off Time
tOFF
VNO_, VNC_ = 1.5V;
RL = 300Ω, CL = 35pF, Figure 1
20
40
Break-Before-Make Time Delay
(MAX4723 Only) (Note 8)
tBBM
VNO_, VNC_ = 1.5V;
RL = 300Ω, CL = 35pF, Figure 2
Skew (Note 8)
tSKEW
RS = 39Ω, CL = 50pF, Figure 3
TMIN to
TMAX
0.15
VGEN = 2V, RGEN = 0Ω,
CL = 1.0nF, Figure 4
+25°C
5
UNITS
DYNAMIC CHARACTERISTICS
+25°C
TMIN to
TMAX
50
+25°C
Charge Injection
Q
Off-Isolation (Note 9)
Crosstalk (Note 10)
VISO
VCT
f = 10MHz; VNO_, VNC_ = 1VP-P;
RL = 50Ω, CL = 5pF, Figure 5a
TMIN to
TMAX
8
ns
1
0.2
ns
pC
-55
+25°C
dB
f = 1MHz; VNO_, VNC_ = 1VP-P;
RL = 50Ω, CL = 5pF, Figure 5a
f = 10MHz; VNO_, VNC_ = 1VP-P;
RL = 50Ω, CL = 5pF, Figure 5b
ns
-80
-80
+25°C
dB
f = 1MHz; VNO_, VNC_ = 1VP-P;
RL = 50Ω, CL = 5pF, Figure 5b
-110
On-Channel -3dB Bandwidth
BW
Signal = 0dBm, CL = 5pF,
RL = 50Ω, Figure 5a
+25°C
>300
MHz
Total Harmonic Distortion
THD
RL = 600Ω
+25°C
0.03
%
+25°C
9
pF
+25°C
15
pF
NO_, NC_ Off-Capacitance
Switch On-Capacitance
CNO_(OFF)
f = 1MHz, Figure 6
CNC_(OFF)
C(ON)
f = 1MHz, Figure 6
DIGITAL I/O
Input Logic High Voltage
VIH
TMIN to
TMAX
Input Logic Low Voltage
VIL
TMIN to
TMAX
Input Leakage Current
IIN
V+ = +3.6V, VIN_ = 0 or 5.5V
1.4
V
0.5
V
TMIN to
TMAX
-0.1
+0.1
µA
TMIN to
TMAX
1.8
5.5
V
1
µA
SUPPLY
Supply Voltage Range
V+
Positive Supply Current
I+
V+ = 5.5V, VIN_ = 0V or V+
TMIN to
TMAX
_______________________________________________________________________________________
3
MAX4721/MAX4722/MAX4723
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
MAX4721/MAX4722/MAX4723
4.5Ω Dual SPST Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
Analog Signal Range
SYMBOL
CONDITIONS
VCOM_,
VNO_, VNC_
TA
MIN
TMIN to
TMAX
0
TYP
MAX
UNITS
V+
V
ANALOG SWITCH
+25°C
On-Resistance (Note 5)
RON
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 3.5V
∆RON
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 3.5V
1.7
TMIN to
TMAX
3.5
+25°C
On-Resistance Match Between
Channels (Notes 5, 6)
0.1
TMIN to
TMAX
RFLAT(ON)
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.0V, 2.0V, 3.5V
NO_, NC_ Off-Leakage Current
(Note 8)
INO_(OFF),
INC_(OFF)
V+ = 5.5V, VCOM_ = 1.0V, 4.5V;
VNO_ or VNC_ = 4.5V, 1.0V
COM _ Off-Leakage Current
(Note 8)
ICOM_(OFF)
V+ = 5.5V, VCOM_ = 1V, 4.5V;
VNO_ or VNC_ = 4.5V, 1V
COM_ On-Leakage Current
(Note 8)
ICOM_(ON)
V+ = 5.5V, VCOM_ = 1.0V, 4.5V;
VNO_ or VNC_ = 1.0V, 4.5V, or
floating
tON
VNO_, VNC_ = 3.0V;
RL = 300Ω, CL = 35pF, Figure 1
Turn-Off Time
tOFF
VNO_, VNC_ = 3.0V;
RL = 300Ω, CL = 35pF, Figure 1
Break-Before-Make Time Delay
(MAX4723 Only) (Note 8)
tBBM
VNO_, VNC_ = 3.0V;
RL = 300Ω, CL = 35pF, Figure 2
Skew (Note 8)
tSKEW
RS = 39Ω, CL = 50pF, Figure 3
0.4
TMIN to
TMAX
-0.5
TMIN to
TMAX
-1.5
+25°C
-0.5
TMIN to
TMAX
-1.5
+25°C
-1
TMIN to
TMAX
-2
+0.01
nA
+0.5
+1.5
+0.01
Ω
+0.5
+1.5
+0.01
Ω
1.2
1.5
+25°C
Ω
0.3
0.4
+25°C
On-Resistance Flatness (Note 7)
3.0
nA
+1
+2
nA
DYNAMIC CHARACTERISTICS
+25°C
Turn-On Time
30
TMIN to
TMAX
90
+25°C
20
TMIN to
TMAX
ns
40
50
+25°C
TMIN to
TMAX
80
ns
8
ns
1
TMIN to
TMAX
1.5
2
ns
DIGITAL I/O
Input Logic High Voltage
VIH
TMIN to
TMAX
Input Logic Low Voltage
VIL
TMIN to
TMAX
4
2.0
_______________________________________________________________________________________
V
0.8
V
4.5Ω Dual SPST Analog Switches in UCSP
(V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
SYMBOL
Input Leakage Current
IIN
CONDITIONS
V+ = 5.5V, VIN_ = 0V or V+
TA
MIN
TMIN to
TMAX
TMIN to
TMAX
TYP
MAX
UNITS
-0.1
+0.1
µA
1.8
5.5
V
1
µA
POWER SUPPLY
Power-Supply Range
V+
Positive Supply Current
I+
TMIN to
TMAX
V+ = 5.5V, VIN_ = 0V or V+
UCSP parts are 100% tested at +25°C only, and guaranteed by design over the specified temperature range. µMAX parts
are 100% tested at TMAX and guaranteed by design over the specified temperature range.
Note 4: The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive
value is a maximum.
Note 5: Guaranteed by design for UCSP parts.
Note 6: ∆RON = RON(MAX) - RON(MIN).
Note 7: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 8: Guaranteed by design.
Note 9: Off-Isolation = 20log10 (VCOM / VNO), VCOM = output, VNO = input to off switch.
Note 10: Between any two switches.
Note 3:
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
V+ = 2.5V
V+ = 3V
4
2
MAX4721/22/23 toc02
5
4
TA = +85°C
TA = +25°C
3
V+ = 4.2V
1
2
3
VCOM (V)
4
4
3
TA = +85°C
1
TA = -40°C
TA = -40°C
V+ = 5V
0
V+ = 5V
2
2
0
5
RON (Ω)
6
V+ = 3V
RON (Ω)
RON (Ω)
MAX4721/22/23 toc01
V+ = 1.8V
8
ON-RESISTANCE vs. VCOM
ON-RESISTANCE vs. VCOM
6
MAX4721/22/23 toc03
ON-RESISTANCE vs. VCOM
10
5
TA = +25°C
0
1
0
0.5
1.0
1.5
VCOM (V)
2.0
2.5
3.0
0
1
2
3
4
5
VCOM (V)
_______________________________________________________________________________________
5
MAX4721/MAX4722/MAX4723
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
300
COM ON-LEAKAGE
COM OFF-LEAKAGE
200
COM OFF-LEAKAGE
400
-15
10
35
60
85
CL = 1nF
V+ = 5V
30
CL = 1nF
V+ = 3V
20
10
0
-40
0
-40
-15
10
35
60
85
1
0
2
3
4
TEMPERATURE (°C)
TEMPERATURE (°C)
VCOM (V)
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT vs. LOGIC LEVEL
TURN-ON/OFF TIME
vs. SUPPLY VOLTAGE
V+ = 5V
3
2
V+ = 3V
1
V+ = 5V
60
40
80
-15
10
35
60
0
0
1
2
3
4
1.5
5
4.5
TURN-ON/OFF TIME
vs. TEMPERATURE
RISE/FALL-TIME DELAY
vs. SUPPLY VOLTAGE
RISE/FALL-TIME DELAY
vs. TEMPERATURE
20
tOFF, V+ = 3.0V
tOFF, V+ = 5.0V
10
0
2.5
2.0
1.5
RISE DELAY
1.0
0.5
FALL DELAY
35
TEMPERATURE (°C)
60
85
INPUT RISE/FALL TIME = 15ns
FIGURE 3, CL = 50pF
V+ = 4.2V
1.5
1.0
RISE DELAY
FALL DELAY
0.5
0
0
10
2.0
5.5
MAX4721/22/23 toc11
MAX4721/22/23 toc10
INPUT RISE/FALL TIME = 15ns
FIGURE 3, CL = 50pF
OUTPUT RISE/FALL-TIME DELAY (ns)
30
3.0
OUTPUT RISE/FALL-TIME DELAY (ps)
tON, V+ = 5.0V
MAX4721/22/23 toc09
SUPPLY VOLTAGE (V)
40
-15
3.5
LOGIC LEVEL (V)
tON, V+ = 3.0V
-40
2.5
TEMPERATURE (°C)
60
50
85
tON
40
20
0
-40
60
tOFF
V+ = 3V
20
0
5
MAX4721/22/23 toc08
80
tON/tOFF (ns)
4
100
MAX4721/22/23 toc07
5
100
SUPPLY CURRENT (µA)
MAX4721/22/23 toc06
6
SUPPLY CURRENT (nA)
COM ON-LEAKAGE
40
200
0
6
600
50
MAX4721/22/23 toc05
800
100
CHARGE INJECTION vs. VCOM
MAX4721/22/23 toc04b
400
V+ = 5V
LEAKAGE CURRENT (pA)
MAX4721/22/23 toc04a
V+ = 3V
LEAKAGE CURRENT (pA)
LEAKAGE CURRENT vs. TEMPERATURE
1000
CHARGE INJECTION (pC)
LEAKAGE CURRENT vs. TEMPERATURE
500
tON/tOFF (ns)
MAX4721/MAX4722/MAX4723
4.5Ω Dual SPST Analog Switches in UCSP
1.5
2.5
3.5
SUPPLY VOLTAGE (V)
4.5
5.5
-40
-15
10
35
TEMPERATURE (°C)
_______________________________________________________________________________________
60
85
4.5Ω Dual SPST Analog Switches in UCSP
INPUT RISE/FALL TIME = 15ns
FIGURE 3, CL = 50pF
V+ = 4.2V
INPUT RISE/FALL TIME = 15ns
FIGURE 3, CL = 50pF
300
SKEW (ps)
150
MISMATCH (ps)
200
100
200
50
100
100
0
0
3.5
4.5
0
-40
5.5
SUPPLY VOLTAGE (V)
-15
10
35
60
85
1.5
100
V+ = 3V/5V
0
-20
ON-LOSS (dB)
150
4.5
5.5
FREQUENCY RESPONSE
20
MAX4721/22/23 toc15
INPUT RISE/FALL TIME = 15ns
FIGURE 3, CL = 50pF
V+ = 4.2V
3.5
SUPPLY VOLTAGE (V)
SKEW vs. TEMPERATURE
200
50
ON-LOSS
-40
-60
OFF-ISOLATION
-80
-100
CROSSTALK
-120
0
-40
-15
10
35
60
-140
0.0001
85
0.01
TEMPERATURE (°C)
100
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
2.0
V+ = 3V
RL = 600Ω
0.1
1.6
LOGIC THRESHOLD (V)
MAX4721/22/23 toc17
1
1
FREQUENCY (MHz)
VTH+
MAX4721/22/23 toc18
SKEW (ps)
2.5
TEMPERATURE (°C)
MAX4721/22/23 toc16
2.5
1.5
THD (%)
MISMATCH (ps)
300
400
MAX4721/22/23 toc13
INPUT RISE/FALL TIME = 15ns
FIGURE 3, CL = 50pF
SKEW vs. SUPPLY VOLTAGE
200
MAX4721/22/23 toc12
400
RISE TIME TO FALL TIME MISMATCH
vs. TEMPERATURE
MAX4721/22/23 toc14
RISE TIME TO FALL TIME MISMATCH
vs. SUPPLY VOLTAGE
1.2
VTH0.8
0.4
0
1.5
0.01
10
100
1k
10k
100k
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
_______________________________________________________________________________________
7
MAX4721/MAX4722/MAX4723
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX4721/MAX4722/MAX4723
4.5Ω Dual SPST Analog Switches in UCSP
Pin Description
PIN
MAX4722
MAX4721
UCSP
MAX4723
µMAX
UCSP
NAME
µMAX
µMAX
A1
3
A1
3
A1
3
IN2
A2
4
A2
4
A2
4
GND
Ground. Connect to digital ground.
A3
5
—
—
—
—
NO2
Analog-Switch Normally Open Terminal
B1
2
B1
2
B1
2
COM1
Analog-Switch Common Terminal
B3
6
B3
6
B3
6
COM2
Analog-Switch Common Terminal
C1
1
—
—
C1
1
NO1
C2
8
C2
8
C2
8
V+
Positive Analog Supply
C3
7
C3
7
C3
7
IN1
Logic-Control Digital Input
—
—
C1
1
—
—
NC1
Analog-Switch Normally Closed Terminal
—
—
A3
5
A3
5
NC2
Analog-Switch Normally Closed Terminal
Detailed Description
The MAX4721/MAX4722/MAX4723 dual SPST analog
switches operate from a single +1.8V to +5.5V supply.
The MAX4721/MAX4722/MAX4723 offer excellent AC
characteristics, <0.5nA leakage current, less than 2ms
differential skew, and 15pF on-channel capacitance. All
of these devices are CMOS-logic compatible with railto-rail signal handling capability.
The MAX4721/MAX4722/MAX4723 are USB-compliant
switches that provide 4.5Ω (max) on-resistance, and
15pF on-channel capacitance to maintain signal integrity. At 12Mbps (USB full-speed data rate specification)
the MAX4721/MAX4722/MAX4723 introduce less than
2ns propagation delay between input and output signals and less than 0.5ns change in skew for the output
signals (see Figure 3 for more details).
The MAX4721 has two normally open (NO) switches, the
MAX4722 has two normally closed (NC) switches, and
the MAX4723 has one NO switch and one NC switch.
8
FUNCTION
UCSP
Logic-Control Digital Input
Analog-Switch Normally Open Terminal
Applications Information
Digital Control Inputs
The MAX4721/MAX4722/MAX4723 logic inputs accept
up to +5.5V regardless of supply voltage. For example,
with a +3.3V supply, IN_ can be driven low to GND and
high to +5.5V allowing for mixing of logic levels in a
system. Driving the control logic inputs rail-to-rail minimizes power consumption. For a +3.0V supply voltage,
the logic thresholds are 0.5V (low) and 1.4V (high); for
a +5V supply voltage, the logic thresholds are 0.8V
(low) and 2.0V (high).
Analog Signal Levels
Analog signals that range over the entire supply voltage
(V+ to GND) are passed with very little change in on-resistance (see the Typical Operating Characteristics). The
switches are bidirectional, so the NO_, NC_, and COM_
pins can be either inputs or outputs.
_______________________________________________________________________________________
4.5Ω Dual SPST Analog Switches in UCSP
V+
MAX4721/
MAX4722/
MAX4723
V+
COM_
NO_
OR NC_
VN_
LOGIC
INPUT
VIH
50%
VIL
VOUT
RL
t OFF
CL
VOUT
IN_
SWITCH
OUTPUT
GND
LOGIC
INPUT
(
0.9 x VOUT
t ON
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
RL
RL - RON
VOUT = VCOM
0.9 x V0UT
0V
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
)
Figure 1. Switching Time
V+
MAX4723
V+
VCOM1
VCOM2
COM1
LOGIC
INPUT
RL2
IN_
LOGIC
INPUT
VOUT2
NC_
COM2
RL1
50%
VIL
VOUT1
NO_
VIH
CL1
SWITCH
OUTPUT 1
(VOUT1)
0.9 x V0UT1
0V
CL2
SWITCH
OUTPUT 2
(VOUT2)
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
0.9 x VOUT2
0V
tD
tD
Figure 2. Break-Before-Make Interval
Power-Supply Bypassing
UCSP Reliability
Power-supply bypassing improves noise margin and
prevents switching noise from propagating from the V+
supply to other components. A 0.1µF capacitor connected from V+ to GND is adequate for most applications.
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical reliability tests. UCSP reliability is integrally linked to the
user’s assembly methods, circuit board material, and
usage environment. The user should closely review
these areas when considering use of a UCSP package.
Performance through Operating Life Test and Moisture
Resistance remains uncompromised as it is primarily
determined by the wafer-fabrication process.
Mechanical stress performance is a greater consideration for a UCSP package. UCSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be considered. Information on Maxim’s qualification plan, test
data, and recommendations are detailed in the UCSP
application note, which can be found on Maxim’s website at www.maxim-ic.com.
Power-Supply Sequencing
and Overvoltage Protection
Caution: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings may
cause permanent damage to the device.
UCSP Package Considerations
For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Chip-Scale Package).
_______________________________________________________________________________________
9
MAX4721/MAX4722/MAX4723
Test Circuits/Timing Diagrams
4.5Ω Dual SPST Analog Switches in UCSP
MAX4721/MAX4722/MAX4723
Test Circuits/Timing Diagrams (continued)
tri
90%
50%
A
TxD+
B
INPUT A
10%
tskew_i
CL
Rs
INPUT A-
90%
50%
10%
tfi
tro
A-
TxDRs
Rs = 39Ω
CL = 50pF
B-
OUTPUT B
10%
90%
50%
tskew_o
CL
OUTPUT B-
90%
50%
10%
tfo
|tro - tri| DELAY DUE TO SWITCH FOR RISING INPUT AND RISING OUTPUT SIGNALS.
|tfo - tfi|
DELAY DUE TO SWITCH FOR FALLING INPUT AND FALLING OUTPUT SIGNALS.
|tskew_o| CHANGE IN SKEW THROUGH THE SWITCH FOR OUTPUT SIGNALS.
|tskew_i| CHANGE IN SKEW THROUGH THE SWITCH FOR INPUT SIGNALS.
Figure 3. Input/Output Skew Timing Diagram
10
______________________________________________________________________________________
4.5Ω Dual SPST Analog Switches in UCSP
V+
MAX4721/
MAX4722/
MAX4723
∆VOUT
V+
RGEN
VOUT
COM_
NC_
OR NO_
VOUT
IN
OFF
CL
V GEN
GND
OFF
ON
IN_
IN
VIL TO VIH
ON
OFF
OFF
Q = (∆V OUT )(C L )
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 4. Charge Injection
V+
C = 0.1µF
C = 0.1µF
SIGNAL
GENERATOR
0dBm
MAX4721/
MAX4722/
MAX4723
V+
MAX4721/
MAX4722/
MAX4723
NC_ or NO_
50Ω*
SIGNAL GENERATOR
0dBm
0V OR V+
V+
COM1
NO1
50Ω
IN1
0V TO V+
IN_
ANALYZER
V+
IN2
0V OR V+
COM_
GND
ANALYZER
NO2
COM2
GND
N.C.
*USED ONLY FOR OFF-ISOLATION TEST.
Figure 5a. On-Loss, Off-Isolation, and Crosstalk
C = 0.1µF
Figure 5b. Crosstalk Test Circuit
Chip Information
V+
TRANSISTOR COUNT: 181
PROCESS: BiCMOS
V+
NC_ or NO_
MAX4721/
MAX4722/
MAX4723
IN_ 0V OR V+
CAPACITANCE
METER
COM_
f = 1MHz
GND
Figure 6. Channel Off/On-Capacitance
______________________________________________________________________________________
11
MAX4721/MAX4722/MAX4723
Test Circuits/Timing Diagrams (continued)
4.5Ω Dual SPST Analog Switches in UCSP
MAX4721/MAX4722/MAX4723
Pin Configurations/Functional Diagrams/Truth Tables (continued)
TOP VIEW
MAX4721
MAX4722
MAX4723
NO1
1
8
V+
NC1
1
8
V+
NO1
1
8
COM1
2
7
IN1
COM1
2
7
IN1
COM1
2
7
IN1
IN2
3
6
COM2
IN2
3
6
COM2
IN2
3
6
COM2
GND
4
5
NO2
GND
4
5
NC2
GND
4
5
NC2
µMAX
µMAX
LOGIC
0
SWITCH
OFF
LOGIC
0
SWITCH
ON
1
ON
1
OFF
µMAX
LOGIC SWITCH1 SWITCH2
0
OFF
ON
1
ON
OFF
SWITCHES SHOWN FOR LOGIC "0" INPUT
12
V+
______________________________________________________________________________________
4.5Ω Dual SPST Analog Switches in UCSP
______________________________________________________________________________________
13
MAX4721/MAX4722/MAX4723
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
4X S
8
E
ÿ 0.50±0.1
8
INCHES
DIM
A
A1
A2
b
H
c
D
e
E
H
0.6±0.1
1
L
1
α
0.6±0.1
S
BOTTOM VIEW
D
MIN
0.002
0.030
MAX
0.043
0.006
0.037
0.014
0.010
0.007
0.005
0.120
0.116
0.0256 BSC
0.120
0.116
0.198
0.188
0.026
0.016
6∞
0∞
0.0207 BSC
8LUMAXD.EPS
MAX4721/MAX4722/MAX4723
4.5Ω Dual SPST Analog Switches in UCSP
MILLIMETERS
MAX
MIN
0.05
0.75
1.10
0.15
0.95
0.25
0.36
0.13
0.18
2.95
3.05
0.65 BSC
2.95
3.05
5.03
4.78
0.41
0.66
0∞
6∞
0.5250 BSC
TOP VIEW
A1
A2
e
A
α
c
b
L
SIDE VIEW
FRONT VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 8L uMAX/uSOP
APPROVAL
DOCUMENT CONTROL NO.
21-0036
REV.
J
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.