MCP2120
Infrared Encoder/Decoder
Features
Pin Diagrams
®
CMOS Technology
•
•
•
•
•
Low-power, high-speed CMOS technology
Fully static design
Low voltage operation
Commercial and Industrial temperature ranges
Low power consumption
- < 1 mA @ 3.3V, 8 MHz (typical)
- 3 mA typical @ 5.0V when disabled
PDIP, SOIC
VDD
OSC1/CLKIN
OSC2
RESET
RXIR
TXIR
MODE
14
13
12
11
10
9
8
VSS
EN
TX
RX
BAUD0
BAUD1
BAUD2
Block Diagram
MCP2120
TX
EN
Encode
TXIR
Logic
BAUD2
BAUD1
BAUD0
MODE
RX
© 2007 Microchip Technology Inc.
1
2
3
4
5
6
7
MCP2120
• Supports with IrDA Physical Layer Specification
(version 1.3)
• UART to IR Encoder/Decoder
- Interfaces with IrDA Compliant Transceivers
- Used with any UART, including standard
16550 UART and microcontroller UART
• Transmit/Receive formats supported:
- 1.63 µs
• Hardware or Software Baud rate selection
- Up to IrDA standard 115.2 kbaud operation
- Up to 312.5 kbaud operation (at 20 MHz)
- Low power mode
• Pb-free packaging
Baud Rate
Generator
Decode
RXIR
DS21618B-page 1
MCP2120
NOTES:
DS21618B-page 2
© 2007 Microchip Technology Inc.
MCP2120
1.0
DEVICE OVERVIEW
1.1
This document contains device specific information for
the following device:
• MCP2120
This device is a low-cost, high-performance, fully-static
infrared encoder/decoder. This device sits between a
UART and an infrared (IR) optical transceiver.
The data received from a standard UART is encoded
(modulated), and output as electrical pulses to the IR
Transceiver. The IR Transceiver also receives data
which it outputs as electrical pulses. The MCP2120
decodes (demodulates) these electrical pulses and
then the data is transmitted by the MCP2120 UART.
This modulation and demodulation method is
performed in accordance with the IrDA standard.
Typically a microcontroller interfaces to the IR encoder/
decoder.
Applications
The MCP2120 is a stand–alone IrDA Encoder/Decoder
product. Figure 1-1 shows a typical application block
diagram. Table 1-2 shows the pin definitions in the user
(normal) mode of operation.
TABLE 1-1:
MCP2120 FEATURES
OVERVIEW
Features
MCP2120
Serial Communications:
Baud Rate Selection:
UART, IR
Hardware/Software
Low Power Mode:
Yes
Resets: (and Delays)
Wake-up (DRT)
Packages:
14-pin DIP
14-pin SOIC
Infrared communication is a wireless two-way data
connection using infrared light generated by low-cost
transceiver signaling technology. This provides reliable
communication between two devices.
Infrared technology offers:
• Universal standard for connecting portable
computing devices
• Easy, effortless implementation
• Economical alternative to other connectivity
solutions
• Reliable, high speed connection
• Safe to use in any environment; can even be used
during air travel
• Eliminates the hassle of cables
• Allows PC’s and non-PC’s to communicate to
each other
• Enhances mobility by allowing users to easily
connect
FIGURE 1-1:
System Block Diagram
Micro–
Controller
MCP2120
TX
UART
TX
RX
BAUD2
BAUD1
BAUD0
I/O
© 2007 Microchip Technology Inc.
MODE
(S/W Mode)
TXIR
Power
Down
Logic
EN
RX
Encode
Optical
Transceiver
TXD
Decode
RXIR
RXD
Baud Rate
Generator
DS21618B-page 3
MCP2120
TABLE 1-2:
PIN DESCRIPTION USER MODE
Pin Number
PDIP
SOIC
Pin
Type
VDD
1
1
—
OSC1/CLKIN
2
2
I
Pin Name
Buffer
Type
P
Description
Positive supply for logic and I/O pins
CMOS Oscillator crystal input/external clock source input
OSC2
3
3
O
—
Oscillator crystal Output
RESET
4
4
I
ST
Resets the Device
RXIR
5
5
I
ST
Asynchronous receive from infrared transceiver
TXIR
6
6
O
—
Asynchronous transmit to infrared transceiver
MODE
7
7
I
TTL
Selects the device mode (Data/Command) for Software Baud
Rate operation. For more information see Section 2.4.1.2 “Software Selection”.
BAUD2
8
8
I
TTL
BAUD2:BAUD0 specify the Baud rate of the device, or if the
device operates in Software Baud Rate mode. For more information see Section 2.4.1 “Baud Rate”.
BAUD1
9
9
I
TTL
BAUD0
10
10
I
TTL
RX
11
11
O
—
Asynchronous transmit to controller UART
TX
12
12
I
TTL
EN
13
13
I
—
Device Enable.
VSS
14
14
—
P
Ground reference for logic and I/O pins
Legend:
TTL = TTL compatible input
I = Input
P = Power
DS21618B-page 4
Asynchronous receive from controller UART
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input
© 2007 Microchip Technology Inc.
MCP2120
2.0
DEVICE OPERATION
2.4
UART Interface
The MCP2120 is a low cost infrared Encoder/Decoder.
The baud rate is user selectable to standard IrDA baud
rates between 9600 baud to 115.2 kbaud. The maximum baud rate is 312.5 kbaud.
The UART interface communicates with the "controller". This interface is a Half duplex interface, meaning
that the system is either transmitting or receiving, but
not both at the same time.
2.1
2.4.1
Power-up
The baud rate for the MCP2120 can be configured
either by the state of three hardware pins (BAUD2,
BAUD1, and BAUD0) or through software selection.
Any time that the device is powered up, the Device
Reset Timer delay (parameter 32) must occur before
any communication with the device is initiated. This is
from both the infrared transceiver side as well as the
controller UART interface.
2.2
2.4.1.1
Hardware Selection
Three device pins are used to select the baud rate that
the MCP2120 will transmit and receive data. These
pins are called BAUD2, BAUD1, and BAUD0. There is
one pin state (device mode) where the application software can specify the baud rate. Table 2-1 shows the
baud rate configurations.
Device Reset
The MCP2120 is forced into the reset state when the
RESET pin is in the low state. After the RESET pin is
brought to a high state, the Device Reset Timer occurs.
Once the DRT times out, normal operation occurs.
2.3
BAUD RATE
Bit Clock
The device crystal is used to derive the communication
bit clock (BITCLK). There are 16 BITCLKs for each bit
time. The BITCLKs are used for the generation of the
Start bit and the eight data bits. The Stop bit uses the
BITCLK when the data is transmitted (not for reception).
This clock is a fixed frequency, and has minimal variation in frequency (specified by crystal manufacturer).
TABLE 2-1:
HARDWARE BAUD RATE SELECTION VS. FREQUENCY
Frequency (MHz)
(1)
BAUD2:BAUD0 0.6144
2.000
3.6864
4.9152
7.3728
14.7456(2)
20.000(2)
Bit Rate
000
800
2604
4800
6400
9600
19200
26042
FOSC / 768
1600
5208
9600
12800
19200
38400
52083
FOSC / 384
001
010
3200
10417
19200
25600
38400
78600
104167
FOSC / 192
4800
15625
28800
38400
57600
115200
156250
FOSC / 128
011
9600
31250
57600
78600
115200
230400
312500
FOSC / 64
100
Note 1: An external clock is recommended for frequencies below 2 MHz.
2: For frequencies above 7.5 MHz, the TXIR pulse width (parameter IR121) will be shorter than the minimum
pulse width of 1.6 µs in the IrDA standard specification.
© 2007 Microchip Technology Inc.
DS21618B-page 5
MCP2120
2.4.1.2
Software Selection
2.4.3
RECEIVING
When the BAUD2:BAUD0 pins are configured as ’111’
the MCP2120 defaults to a baud rate of FOSC / 768.
When the controller receives serial data from the
MCP2120, the baud rates are required to match.
To place the MCP2120 into Command Mode, the
MODE pin must be at a low level. When in this mode,
any data that is received by the MCP2120’s UART is
"echoed" back to the controller and no encoding/
decoding occurs. The echoed data will be skewed less
than 1 bit time (see parameter IR141). When the
MODE pin goes high, the device is returned to Data
Mode where the encoder/decoder is in operation.
There will be some jitter on the detection of the high to
low edge of the start bit. This jitter will affect the placement of the decoded Start bit. All subsequent bits will
be 16 BITCLK times later.
FIGURE 2-1:
Data Mode
Table 2-2 shows the software hex commands to configure the MCP2120’s baud rate.
Data/Command Mode
Flow
The MCP2120 receives data bytes at the existing baud
rate. When the change baud rate command (0x11) is
received, the last valid baud rate value received
becomes the new baud rate. The new baud rate is
effective after the stop bit of the echoed data.
Figure 2-2 shows this sequence.
2.4.2
Data Mode
Command Mode
MODE pin goes high
New baud rate
MCP2120 echoes 0x11
Controller sends 0x11
TRANSMITTING
MCP2120 echoes baud
Controller sends baud
When the controller sends serial data to the MCP2120,
the baud rates are required to match.
MODE pin goes low
There will be some jitter on the detection of the high to
low edge of the start bit. This jitter will affect the placement of the encoded start bit. All subsequent bits will be
16 BITCLK times later.
TABLE 2-2:
Hex
Command(3, 4)
When echoing the Data, once the first bit is
detected, it is echoed back. This means that
the echoed data is skewed no more than 1 bit
time.
The new baud rate can occur once the echoed
stop bit completes.
SOFTWARE BAUD RATE SELECTION VS. FREQUENCY
Frequency (MHz)
0.6144(1)
2.000
3.6864
4.9152
7.3728
14.7456(2)
20.000(2)
Bit Rate
800
2604
4800
6400
9600
19200
26042
FOSC / 768
0x87
1600
5208
9600
12800
19200
38400
52083
FOSC / 384
0x8B
3200
10417
19200
25600
38400
78600
104167
FOSC / 192
0x85
0x83
4800
15625
28800
38400
57600
115200
156250
FOSC / 128
9600
31250
57600
78600
115200
230400
312500
FOSC / 64
0x81
Note 1: An external clock is recommended for frequencies below 2 MHz.
2: For frequencies above 7.3728 MHz, the TXIR pulse width (parameter IR121) will be shorter than the 1.6 µs
IrDA standard specification.
3: Command 0x11 is used to change to the new baud rate.
4: All other command codes are reserved for possible future use.
DS21618B-page 6
© 2007 Microchip Technology Inc.
MCP2120
2.5
Modulation
2.6
When the UART receives data to be transmitted, the
data needs to be modulated. This modulated signal
drives the IR transceiver module. Figure 2-2 shows the
encoding of the modulated signal.
The modulated signal from the IR transceiver module
needs to be demodulated to form the received data. As
demodulation occurs, the bit value is placed on the RX
pin in UART format. Figure 2-3 shows the decoding of
the modulated signal.
Each bit time is comprised of 16-bit clocks. If the value
to be transmitted (as determined by the TX pin) is a
logic low, then the TXIR pin will output a low level for
7-bit clock cycles, a logic high level for 3-bit clock
cycles, and then the remaining 6-bit clock cycles will be
low. If the value to transmit is a logic high, then the
TXIR pin will output a low level for the entire 16-bit clock
cycles.
FIGURE 2-2:
Demodulation
Each bit time is comprised of 16 bit clocks. If the value
to be received is a logic low, then the RXIR pin will be
a low level for the first 3-bit clock cycles, and then the
remaining 13-bit clock cycles will be high. If the value to
be received is a logic high, then the RXIR pin will be a
high level for the entire 16-bit clock cycles. The level on
the RX pin will be in the appropriate state for the entire
16 clock cycles.
Encoding
Start Bit
16 CLK
Data bit 0
Data bit 1
Data bit 2
Data bit...
0
0
1
BITCLK
TX
7 CLK
TXIR
12 Tosc
0
FIGURE 2-3:
1
0
Decoding
Start Bit
Data bit 0
Data bit 1
Data bit 2
Data bit ...
16 CLK
BITCLK
(CLK)
RXIR
13 CLK (or ≤ 50.5 µs typical)
≥ 1.6 µs
8 CLK
16 CLK
16 CLK
16 CLK
16 CLK
0
0
16 CLK
16 CLK
RX
0
© 2007 Microchip Technology Inc.
1
1
0
DS21618B-page 7
MCP2120
2.7
Encoding/Decoding Jitter and
Offset
2.8
The device can be placed in a low power mode by
disabling the device (holding the EN pin at the low
state). The internal state machine is monitoring this pin
for a low level, and once this is detected the device is
disabled and enters into a low power state.
Figure 2-4 shows the jitter and offset that is possible on
the RX pin and the TXIR pin.
Jitter is the possible variation of the desired edge.
Offset is the propagation delay of the input signal (RXIR
or TX) to the output signal (RX or TXIR).
2.8.1
The first bit on the output pin (on RX or TXIR) will show
jitter compared to the input pin (RXIR or TX), but all
remaining bits will be a constant distance.
FIGURE 2-4:
Minimizing Power
RETURNING TO OPERATION
When the device is disabled, the device is in a low
power state. When the EN pin is brought to a high level,
the device will return to the operating mode. The device
requires a delay of 1000 TOSC before data may be
transmitted or received.
Effects of Jitter and Offset
16 CLK
16 CLK
BITCLK
3 CLK
RXIR
RX Offset
16 CLK
RX
RX Jitter
TX
16 CLK
TX Offset
TXIR
3 CLK
TX Jitter
DS21618B-page 8
© 2007 Microchip Technology Inc.
MCP2120
3.0
DEVELOPMENT TOOLS
The MCP212X Developer’s Daughter Board is used to
evaluate and demonstrate the MCP2122 or the
MCP2120 IrDA® Standard Encoder/Decoder devices.
The MCP2120/MCP2150 Developer’s Kit has been
obsoleted but if you have access to one of these kits, it
can be used to demonstrate the operation of the
MCP2120.
A header allows the MCP212X Developer’s Daughter
Board to be jumpered easily into systems for
development purposes.
The MCP212X Developer’s Daughter Board is
designed to interface to several of the “new” low cost
PIC® Demo Boards. These include the PICDEM HPC
Explorer Demo board, the PICDEM FS USB Demo
board, and the PICDEM LCD Demo board.
When the MCP212X Developer’s Daughter Board is
used in conjunction with the PICDEM HPC Explorer
Demo board, the MCP212x can be connected to either
of the PIC18F8772's two UARTs or the RX and TX signals can be "crossed" so the MCP212x device can
communicate directly out the PICDEM HPC Explorer
Demo Board's UART (DB-9).
Features:
• 8-pin socket for installation of MCP2122
(installed) and 14-pin socket for installation of
MCP2120
• Three Optical Transceiver circuits (1 installed)
• Headers to interface to low cost PICDEM Demo
Boards, including:
- • PICDEM™ HPC Explorer Demo Board
- • PICDEM™ LCD Demo Board
- • PICDEM™ FS USB Demo Board
- • PICDEM™ 2 Plus Demo Board
• Headers to easily connect to the user’s
embedded system
• Jumpers to select routing of MCP212X signals to
the PICDEM™ Demo Board Headers
• Jumpers to configure the operating mode of the
board
© 2007 Microchip Technology Inc.
DS21618B-page 9
MCP2120
NOTES:
DS21618B-page 10
© 2007 Microchip Technology Inc.
MCP2120
4.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Ambient Temperature under bias ........................................................................................................... –40°C to +125°C
Storage Temperature ............................................................................................................................. –65°C to +150°C
Voltage on VDD with respect to VSS .....................................................................................................................0 to +7V
Voltage on RESET with respect to VSS .............................................................................................................0 to +14V
Voltage on all other pins with respect to VSS ................................................................................. –0.6V to (VDD + 0.6V)
Total Power Dissipation (1) ...................................................................................................................................700 mW
Max. Current out of VSS pin ..................................................................................................................................150 mA
Max. Current into VDD pin .....................................................................................................................................125 mA
Input Clamp Current, IIK (VI < 0 or VI > VDD) ................................................................................................................... ±20 mA
Output Clamp Current, IOK (V0 < 0 or V0 > VDD)............................................................................................................. ±20 mA
Max. Output Current sunk by any Output pin..........................................................................................................25 mA
Max. Output Current sourced by any Output pin.....................................................................................................25 mA
Note 1: Power Dissipation is calculated as follows:
PDIS = VDD x {IDD - ∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOL x IOL)
†NOTICE:
Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
© 2007 Microchip Technology Inc.
DS21618B-page 11
MCP2120
Voltage-Frequency Graph, -40°C ≤ TA ≤ +85°C
FIGURE 4-1:
6.0
5.5
5.0
VDD
(Volts)
4.5
4.0
3.5
3.0
2.5
2.0
0
4
8
10
12
16
20
Frequency (MHz)
FMAX = (8.0 MHz/V) (VDDAPPMIN -2.5V) + 4 MHz
Note: VDDAPPMIN is the minimum voltage of the MCP2120 in the application.
DS21618B-page 12
© 2007 Microchip Technology Inc.
MCP2120
4.1
DC Characteristics
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C ≤ TA ≤ +85°C (industrial)
DC Characteristics
Param.
No.
Sym
D001
VDD
D002
Min
Typ(1)
Max
Units
Supply Voltage
2.5
—
5.5
V
See Figure 4-1
VDR
RAM Data Retention
Voltage (2)
2.5
—
—
V
Device Oscillator/Clock stopped
D003
VPOR
VDD Start Voltage to
ensure Power-on
Reset
—
VSS
—
V
D004
SVDD
VDD Rise Rate to
ensure Power-on
Reset
0.05
—
—
V/ms
D010
IDD
Supply Current (3)
—
—
—
—
—
—
0.8
0.6
0.4
3
4
4.5
1.4
1.0
0.8
7
12
16
mA
mA
mA
mA
mA
mA
FOSC = 4 MHz, VDD = 5.5V
FOSC = 4 MHz, VDD = 3.0V
FOSC = 4 MHz, VDD = 2.5V
FOSC = 10 MHz, VDD = 3.0V
FOSC = 20 MHz, VDD = 4.5V
FOSC = 20 MHz, VDD = 5.5V
D020
IPD
Device Disabled
Current (3, 4)
—
—
—
—
0.25
0.25
0.4
3
4
3
5.5
8
µA
µA
µA
µA
VDD = 3.0V, 0°C ≤ TA ≤ +70°C
VDD = 2.5V, 0°C ≤ TA ≤ +70°C
VDD = 4.5V, 0°C ≤ TA ≤ +70°C
VDD = 5.5V, –40°C ≤ TA ≤ +85°C
Note 1:
2:
3:
4:
Characteristic
Conditions
Data in the Typical (“Typ”) column is based on characterization results at +25°C. This data is for design
guidance only and is not tested.
This is the limit to which VDD can be lowered without losing RAM data.
The supply current is mainly a function of the operating voltage and frequency. Pin loading, pin rate, and
temperature have an impact on the current consumption.
a) The test conditions for all IDD measurements are made when device is enabled (EN pin is high):
OSC1 = external square wave, from rail-to-rail; all input pins pulled to VSS, RXIR = VDD,
RESET = VDD;
b) When device is disabled (EN pin is low), the conditions for current measurements are the same.
When the device is disabled (EN pin is low), current is measured with all input pins tied to VDD or VSS and
the output pins driving a high or low level into infinite impedance.
© 2007 Microchip Technology Inc.
DS21618B-page 13
MCP2120
DC Characteristics (Continued)
DC CHARACTERISTICS
Param
No.
Sym
Characteristic
Standard Operating Conditions (unless otherwise specified)
Operating temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating voltage VDD range as described in DC spec Section 4.1 “DC
Characteristics”.
Min
Typ
Max
Units
Vss
Vss
Conditions
—
0.8V
V
For all 4.5 ≤ VDD ≤ 5.5V
—
0.15VDD
V
otherwise
Input Low Voltage
VIL
D030
Input pins
with TTL buffer
D030A
D031
with Schmitt Trigger
buffer
VSS
—
0.2VDD
V
D032
RESET, RXIR
VSS
—
0.2VDD
V
D033
OSC1
VSS
—
0.3VDD
V
2.0
—
VDD
V
0.25VDD
+ 0.8VDD
—
VDD
V
Input High Voltage
VIH
D040
Input pins
with TTL buffer
D040A
—
4.5 ≤ VDD ≤ 5.5V
otherwise
D041
with Schmitt Trigger
buffer
0.8VDD
—
VDD
V
D042
RESET, RXIR
0.8VDD
—
VDD
V
D043
OSC1
0.7VDD
—
VDD
V
—
—
±1
µA
For entire VDD range
Input Leakage
Current (1, 2)
D060
IIL
Input pins
VSS ≤ VPIN ≤ VDD, Pin at
hi-impedance
D061
RESET
—
—
±30
µA
VSS ≤ VPIN ≤ VDD
D063
OSC1
—
—
±5
µA
VSS ≤ VPIN ≤ VDD, XT, HS and LP
osc configuration
weak pull-up current
50
250
400
µA
VDD = 5V, VPIN = VSS
D070
Note 1:
2:
Ipur
The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
Negative current is defined as coming out of the pin.
DS21618B-page 14
© 2007 Microchip Technology Inc.
MCP2120
DC Characteristics (Continued)
Standard Operating Conditions (unless otherwise specified)
Operating temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating voltage VDD range as described in DC spec Section 4.1
“DC Characteristics”
DC CHARACTERISTICS
Param
No.
Sym
D080
VOL
Min
Typ
Max
Units
Output Low Voltage
TXIR, RX
—
—
0.6
V
OSC2
—
—
0.6
V
Output High Voltage
TXIR, RX (1)
VDD - 0.7
—
—
V
OSC2
VDD - 0.7
—
—
V
—
—
15
pF
CIO
All Input or Output pins
—
—
Negative current is defined as coming out of the pin.
50
pF
D083
D090
D092
D100
D101
Note 1:
VOH
Characteristic
Capacitive Loading Specs
on Output Pins
COSC2 OSC2 pin
© 2007 Microchip Technology Inc.
Conditions
IOL = 8.5 mA, VDD = 4.5V,
–40°C to +85°C
IOL = 1.6 mA, VDD = 4.5V,
–40°C to +85°C
IOH = -3.0 mA, VDD = 4.5V,
–40°C to +85°C
IOH = -1.3 mA, VDD = 4.5V,
–40°C to +85°C
when external clock is used
to drive OSC1.
DS21618B-page 15
MCP2120
4.2
Timing Parameter Symbology and Load Conditions
The timing parameter symbols have been created following one of the following formats:
4.2.1
TIMING CONDITIONS
The temperature and voltages specified in Table 4-2 apply to all timing specifications unless otherwise noted. Figure 42 specifies the load conditions for the timing specifications.
TABLE 4-1:
SYMBOLOGY
1. TppS2ppS
T
F
Frequency
E
Error
Lowercase letters (pp) and their meanings:
pp
io
Input or Output pin
rx
Receive
bitclk
RX/TX BITCLK
drt
Device Reset Timer
Uppercase letters and their meanings:
S
F
Fall
H
High
I
Invalid (Hi-impedance)
L
Low
TABLE 4-2:
T
Time
osc Oscillator
tx
Transmit
RST Reset
P
R
V
Z
Period
Rise
Valid
Hi-impedance
AC TEMPERATURE AND VOLTAGE SPECIFICATIONS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating voltage VDD range as described in DC spec Section 4.1 “DC Characteristics”.
AC CHARACTERISTICS
FIGURE 4-2:
2. TppS
Load Conditions for Device Timing Specifications
CL
PIN
CL = 50 pF for all pins except OSC2
15 pF for OSC2 when external clock is used to drive OSC1
VSS
DS21618B-page 16
© 2007 Microchip Technology Inc.
MCP2120
4.3
Timing Diagrams and Specifications
FIGURE 4-3:
External Clock Timing
Q4
Q1
Q3
Q2
Q4
Q1
OSC1
1
TABLE 4-3:
1
Sym
3
4
4
EXTERNAL CLOCK TIMING REQUIREMENTS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1 “DC
Characteristics”
AC Characteristics
Param.
No.
3
Characteristic
Min
Typ(1)
Max
Units
Conditions
External CLKIN Period (2,3)
50
—
—
ns
(2)
Oscillator Period
50
—
500
ns
DC
—
20
MHz
FOSC External CLKIN
Frequency (2,3)
2
—
20
MHz
Oscillator Frequency (2)
—
—
0.01
%
ECLK Clock Error
TosL, Clock in (OSC1)
10
—
—
ns
TosH Low or High Time
TosR, Clock in (OSC1)
—
—
15
ns
TosF Rise or Fall Time
Data in the Typical (“Typ”) column is at 5V, +25°C unless otherwise stated. These parameters are for
design guidance only and are not tested.
All specified values are based on characterization data for that particular oscillator type under standard
operating conditions with the device executing code. Exceeding these specified limits may result in an
unstable oscillator operation and/or higher than expected current consumption.
When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices.
A duty cycle of no more than 60/40 (High Time / Low Time or Low Time / High Time) is recommended for
external clock inputs.
TOSC
1A
1C
3
4
Note 1:
2:
3:
© 2007 Microchip Technology Inc.
DS21618B-page 17
MCP2120
FIGURE 4-4:
I/O Waveform
Q1
Q4
Q2
Q3
OSC1
Input Pin
17
Output Pin
19
18
New Value
Old Value
20, 21
Note:
TABLE 4-4:
Refer to Figure 4-2 for load conditions.
I/O TIMING REQUIREMENTS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1 “DC
Characteristics”
AC Characteristics
Param.
No.
17
18
19
20
21
Note
Sym
Characteristic
Min
Typ(1)
Max
Units
Conditions
TosH2ioV OSC1↑ (Q1 cycle) to Output
—
—
100
ns
valid (2)
TosH2ioI OSC1↑ (Q2 cycle) to Input
200
—
—
ns
invalid (I/O in hold time)
TioV2osH Input valid to OSC1↑
0
—
—
ns
(I/O in setup time)
—
10
25
ns
ToR
RX and TXIR pin rise time (2)
ToF
RX and TXIR pin fall time (2)
—
10
25
ns
1: Data in the Typical (“Typ”) column is at 5V, +25°C unless otherwise stated.
2: See Figure 4-2 for loading conditions.
DS21618B-page 18
© 2007 Microchip Technology Inc.
MCP2120
FIGURE 4-5:
Reset and Device Reset Timer Timing
VDD
RESET
30
32
32
32
DRT
Time-out
Internal
RESET
Low Power
Timer
Reset
31
34
34
Output pin
TABLE 4-5:
RESET AND DEVICE RESET TIMER REQUIREMENTS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1 “DC
Characteristics”
AC Characteristics
Param.
No.
Sym
30
TRSTL
31
TLPT
Low Power Time-out Period
32
TDRT
34
TioZ
Min
Typ(1)
Max
Units
2000
—
—
ns
VDD = 5.0 V
9
18
30
ms
VDD = 5.0 V
Device Reset Timer Period
9
18
30
ms
VDD = 5.0 V
Output Hi-impedance from
RESET Low or device Reset
—
—
2
µs
Characteristic
RESET Pulse Width (low)
Conditions
Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated.
© 2007 Microchip Technology Inc.
DS21618B-page 19
MCP2120
FIGURE 4-6:
USART ASynchronous Transmission Waveform
Start Bit
Data Bit
IR100
IR100
Data Bit
Data Bit
IR100
IR100
TX pin
IR103
IR103
Note:
Refer to Figure 4-2 for load conditions.
TABLE 4-6:
USART ASYNCHRONOUS TRANSMISSION REQUIREMENTS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1 “DC
Characteristics”
AC Characteristics
Param.
No.
IR100
Sym
Characteristic
Min
Typ
Max
Units
768
384
192
128
64
—
—
—
—
—
768
384
192
128
64
TOSC
TOSC
TOSC
TOSC
TOSC
768
384
192
128
64
—
—
—
—
—
—
—
768
384
192
128
64
1
TOSC
TOSC
TOSC
TOSC
TOSC
%
—
1
%
—
25
ns
TTXBIT Transmit Baud rate
ETXBIT Transmit (TX pin) Baud rate
Error (into MCP2120)
—
IR102 ETXIRBIT Transmit (TXIR pin) Baud rate
Error (out of MCP2120)(1)
—
IR103 TTXRF TX pin rise time and fall time
Note 1: This error is not additive to IR101 parameter.
IR101
DS21618B-page 20
Conditions
Hardware Selection
BAUD2:BAUD0 = 000
BAUD2:BAUD0 = 001
BAUD2:BAUD0 = 010
BAUD2:BAUD0 = 011
BAUD2:BAUD0 = 100
Software Selection
BAUD2:BAUD0 = 111
Hex Command = 0x87
Hex Command = 0x8B
Hex Command = 0x85
Hex Command = 0x83
Hex Command = 0x81
© 2007 Microchip Technology Inc.
MCP2120
FIGURE 4-7:
USART ASynchronous Receive Timing
Start Bit
Data Bit
Data Bit
Data Bit
IR110
IR110
IR110
IR110
RX pin
IR112
IR112
Note:
TABLE 4-7:
Refer to Figure 4-2 for load conditions.
USART ASYNCHRONOUS RECEIVE REQUIREMENTS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1 “DC
Characteristics”
AC Characteristics
Param.
No.
IR110
Sym
Characteristic
Min
Typ
Max
Units
768
384
192
128
64
—
—
—
—
—
768
384
192
128
64
TOSC
TOSC
TOSC
TOSC
TOSC
768
384
192
128
64
—
—
—
—
—
—
—
768
384
192
128
64
1
TOSC
TOSC
TOSC
TOSC
TOSC
%
—
1
%
—
25
ns
TRXBIT Receive Baud Rate
Receive (RXIR pin) Baud rate
Error (into MCP2120)
—
IR112 ERXBIT Receive (RX pin) Baud rate
Error (out of MCP2120)(1)
—
IR113 TTXRF RX pin rise time and fall time
Note 1: This error is not additive to IR111 parameter.
IR111 ERXBIT
© 2007 Microchip Technology Inc.
Conditions
Hardware Selection
BAUD2:BAUD0 = 000
BAUD2:BAUD0 = 001
BAUD2:BAUD0 = 010
BAUD2:BAUD0 = 011
BAUD2:BAUD0 = 100
Software Selection
BAUD2:BAUD0 = 111
Hex Command = 0x87
Hex Command = 0x8B
Hex Command = 0x85
Hex Command = 0x83
Hex Command = 0x81
DS21618B-page 21
MCP2120
FIGURE 4-8:
TX and TXIR Waveforms
Start Bit
Data bit 7
Data bit 6
Data bit 5
Data bit ...
IR100
BITCLK
TX
IR122
IR122
IR122
IR122
IR122
IR122
IR120
TXIR
IR121
0
TABLE 4-8:
1
0
1
0
TX AND TXIR REQUIREMENTS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1 “DC
Characteristics”
AC Characteristics
Param.
No.
0
Sym
IR100 TTXBIT
Characteristic
Typ
Max
Units
Transmit Baud Rate
IR120 TTXL2TXIRH TX falling edge (↓) to
TXIR rising edge (↑) (1)
IR121 TTXIRPW
TXIR pulse width
IR122 TTXIRP
TXIR bit period (1)
Note 1: TBITCLK = TTXBIT/16
DS21618B-page 22
Min
768
384
192
128
64
—
—
—
—
—
768
384
192
128
64
7TBITCLK
- 8.34 µs
12
—
—
—
—
—
—
7
—
16
768
384
192
128
64
8
TOSC
TOSC
TOSC
TOSC
TOSC
768
TOSC
384
TOSC
192
TOSC
128
TOSC
64
TOSC
7TBITCLK TBITCLK
+ 8.34 µs
12
TOSC
—
TBITCLK
Conditions
Hardware Selection
BAUD2:BAUD0 = 000
BAUD2:BAUD0 = 001
BAUD2:BAUD0 = 010
BAUD2:BAUD0 = 011
BAUD2:BAUD0 = 100
Software Selection
BAUD2:BAUD0 = 111
Hex Command = 0x87
Hex Command = 0x8B
Hex Command = 0x85
Hex Command = 0x83
Hex Command = 0x81
© 2007 Microchip Technology Inc.
MCP2120
FIGURE 4-9:
RXIR and RX Waveforms
Start Bit
Data bit 7
Data bit 6
Data bit 5
Data bit ...
IR110
BITCLK
RXIR
IR131A
IR130
IR131B
IR131B
0
Start Bit
1
Data bit 7
IR131B
IR131B
IR131B
IR131B
0
Data bit 5
1
Data bit ...
0
RX
TABLE 4-9:
0
Data bit 6
RXIR REQUIREMENTS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1 “DC
Characteristics”
AC Characteristics
Param.
No.
Sym
IR110
TRXBIT
Characteristic
Min
Typ
Max
Units
768
384
192
128
64
—
—
—
—
—
768
384
192
128
64
TOSC
TOSC
TOSC
TOSC
TOSC
768
384
192
128
64
8TBITCLK
- 8.34 µs
3
—
—
—
—
—
—
8
Receive Baud Rate
IR130 TRXIRL2RXH RXIR falling edge (↓) to RX
falling edge (↓) (1)
IR131A TRXIRPW RXIR pulse width
IR132
TRXIRP
RXIR bit period (1)
Note 1: TBITCLK = TRXBIT/16
© 2007 Microchip Technology Inc.
—
16
768
TOSC
384
TOSC
192
TOSC
128
TOSC
64
TOSC
8TBITCLK TBITCLK
+ 8.34 µs
3
TOSC
—
TBITCLK
Conditions
Hardware Selection
BAUD2:BAUD0 = 000
BAUD2:BAUD0 = 001
BAUD2:BAUD0 = 010
BAUD2:BAUD0 = 011
BAUD2:BAUD0 = 100
Software Selection
BAUD2:BAUD0 = 111
Hex Command = 0x87
Hex Command = 0x8B
Hex Command = 0x85
Hex Command = 0x83
Hex Command = 0x81
DS21618B-page 23
MCP2120
FIGURE 4-10:
Command Mode: TX and RX Waveforms
Start Bit
Data bit 7
Data bit 6
IR140A
IR140A
IR140A
Data bit ...
Stop bit
IR140A
IR140A
Start Bit Data bit 7
(new Baud rate)
BITCLK
IR140A
TX
IR140B
IR140B
IR140B
IR140B
IR140B
IR140B
RX
IR141
IR141
IR141
IR141
TABLE 4-10:
IR141
IR141
IR141
IR142
TX AND TXIR REQUIREMENTS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1
“DC Characteristics”
AC Characteristics
Param.
No.
Sym
Characteristic
Min
Typ
Max
Units
IR140A
IR140B
IR141
IR142
BTX
BRX
TTXE2RXE
TRXP2TXS
Transmit Baud Rate
Receive Baud Rate
TX edge to RX edge (delay)
Delay from RX Stop bit complete
to TX Start bit (new baud rate)
16
16
5.5
—
—
—
8
—
16
16
10.5
0
TBITCLK
TBITCLK
TBITCLK
TOSC
DS21618B-page 24
Conditions
© 2007 Microchip Technology Inc.
MCP2120
5.0
DC AND AC CHARACTERISTICS GRAPHS AND TABLES
The graphs and tables provided in this section are for design guidance and are not tested. In some graphs or tables the
data presented is outside specified operating range (e.g., outside specified VDD range). This is for information only and
devices will operate properly only within the specified range.
The data presented in this section is a statistical summary of data collected on units from different lots over a period of
time. “Typical” represents the mean of the distribution while “max” or “min” represents (mean + 3s) and (mean – 3s)
respectively, where s is standard deviation.
FIGURE 5-1:
Short DRT Period Vs. VDD
950
850
750
DRT period (µs)
650
550
Max +85°C
450
350
Typ +25°C
250
MIn –40°C
150
0
0
2.5
3.5
4.5
5.5
6.5
VDD (Volts)
© 2007 Microchip Technology Inc.
DS21618B-page 25
MCP2120
FIGURE 5-2:
IOH vs. VOH, VDD = 2.5V
FIGURE 5-4:
IOL vs. VOL, VDD = 2.5V
25
0
-1
20
Max –40°C
15
-3
IOL (mA)
IOH (mA)
-2
-4
Typ +25°C
10
-5
-6
Min +85°C
85°C
Min +
5
5°C
Typ +2
40°C
Max –
-7
500m
1.0
1.5
2.0
2.5
0
VOH (Volts)
0
250.0m
500.0m
1.0
VOL (Volts)
FIGURE 5-3:
IOH vs. VOH, VDD = 5.5V
FIGURE 5-1:
0
IOL vs. VOL, VDD = 5.5V
50
-5
Max –40°C
40
Typ +25°C
30
-20
-25
IOL (mA)
-15
-30
3.5
4.0
Min +85°C
20
M
in
T
+8
M
ax yp
5°
+
C
–4
25
0°
C °C
IOH (mA)
-10
10
4.5
VOH (Volts)
5.0
5.5
0
250.0m
500.0m
750.0m
1.0
VOL (Volts)
DS21618B-page 26
© 2007 Microchip Technology Inc.
MCP2120
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
14-Lead PDIP (300 mil)
XXXXXXXX
XXXXXNNN
YYWW
14-Lead SOIC (150 mil)
XXXXXXX
XXXXXXX
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example:
MCP2120 e3
PSAZNNN
YYWW
Example:
MCP2120 e3
/SL
YYWWNNN
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2007 Microchip Technology Inc.
DS21618B-page 27
MCP2120
14-Lead Plastic Dual In-Line (P) – 300 mil Body [PDIP]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
N
NOTE 1
E1
1
3
2
D
E
A2
A
L
A1
c
b1
b
e
eB
Units
Dimension Limits
Number of Pins
INCHES
MIN
N
NOM
MAX
14
Pitch
e
Top to Seating Plane
A
–
–
.210
Molded Package Thickness
A2
.115
.130
.195
Base to Seating Plane
A1
.015
–
–
Shoulder to Shoulder Width
E
.290
.310
.325
Molded Package Width
E1
.240
.250
.280
Overall Length
D
.735
.750
.775
Tip to Seating Plane
L
.115
.130
.150
Lead Thickness
c
.008
.010
.015
b1
.045
.060
.070
b
.014
.018
.022
eB
–
–
Upper Lead Width
Lower Lead Width
Overall Row Spacing §
.100 BSC
.430
Notes:
1. Pin 1 visual index feature may vary, but must be located with the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-005B
DS21618B-page 28
© 2007 Microchip Technology Inc.
MCP2120
14-Lead Plastic Small Outline (SL) – Narrow, 3.90 mm Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
NOTE 1
1
2
3
e
h
b
A
A2
c
φ
L
A1
β
L1
Units
Dimension Limits
Number of Pins
α
h
MILLMETERS
MIN
N
NOM
MAX
14
Pitch
e
Overall Height
A
–
1.27 BSC
–
Molded Package Thickness
A2
1.25
–
–
Standoff §
A1
0.10
–
0.25
Overall Width
E
Molded Package Width
E1
3.90 BSC
Overall Length
D
8.65 BSC
1.75
6.00 BSC
Chamfer (optional)
h
0.25
–
0.50
Foot Length
L
0.40
–
1.27
Footprint
L1
1.04 REF
Foot Angle
φ
0°
–
8°
Lead Thickness
c
0.17
–
0.25
Lead Width
b
0.31
–
0.51
Mold Draft Angle Top
α
5°
–
15°
Mold Draft Angle Bottom
β
5°
–
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-065B
© 2007 Microchip Technology Inc.
DS21618B-page 29
MCP2120
FIGURE 6-1:
EMBOSSED CARRIER DIMENSIONS (16 MM TAPE)
Top
Cover
Tape
A0
W
B0
K0
P
TABLE 6-1:
CARRIER TAPE/CAVITY DIMENSIONS
Case
Outline
Carrier
Dimensions
Package
Type
SL
SOIC .150”
FIGURE 6-2:
14L
Cavity
Dimensions
W
mm
P
mm
A0
mm
B0
mm
K0
mm
16
8
6.5
9.5
2.1
Output
Quantity
Units
Reel
Diameter in
mm
2600
330
SOIC DEVICE
User Direction of Feed
Pin 1
Pin 1
W, Width
of Carrier
Tape
P, Pitch
Standard Reel Component Orientation
DS21618B-page 30
Reverse Reel Component Orientation
© 2007 Microchip Technology Inc.
MCP2120
APPENDIX A:
REVISION HISTORY
Revision B (February 2007)
• Updated Development Tools section
• Update packaging outline drawings
• Updates Product Identification System section.
Revision A (March 2001)
• Initial release of this document
© 2007 Microchip Technology Inc.
DS21618B-page 31
NOTES:
DS21618B-page 32
© 2007 Microchip Technology Inc.
MCP2120
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature
Range
Package
Examples:
a)
b)
c)
Device
MCP2120: Infrared Encoder/Decoder
MCP2120T: Infrared Encoder/Decoder, Tape and Reel
Temperature Range
I
= -40×C to+85×C
Package
P
SL
= Plastic DIP (300 mil, Body), 14-lead
= Plastic SOIC (150 mil, Body), 14-lead
© 2007 Microchip Technology Inc.
MCP2120-I/P:
Industrial Temperature,
PDIP packaging
MCP2120-I/SL: Industrial Temperature,
SOIC package
MCP2120T-I/SL: Tape and Reel,
Industrial Temperature,
SOIC package
DS21618B-page 33
MCP2120
NOTES:
DS21618B-page 34
© 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC,
PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and
SmartShunt are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Linear Active Thermistor, Migratable
Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor
and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi,
MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit,
PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB,
rfPICDEM, Select Mode, Smart Serial, SmartTel, Total
Endurance, UNI/O, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2007, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona, Gresham, Oregon and Mountain View, California. The
Company’s quality system processes and procedures are for its PIC®
MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial
EEPROMs, microperipherals, nonvolatile memory and analog
products. In addition, Microchip’s quality system for the design and
manufacture of development systems is ISO 9001:2000 certified.
© 2007 Microchip Technology Inc.
DS21618B-page 35
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Habour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-4182-8400
Fax: 91-80-4182-8422
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
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Tel: 630-285-0071
Fax: 630-285-0075
Dallas
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Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Kokomo
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Tel: 765-864-8360
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Los Angeles
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Tel: 949-462-9523
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Tel: 408-961-6444
Fax: 408-961-6445
Toronto
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Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Korea - Gumi
Tel: 82-54-473-4301
Fax: 82-54-473-4302
China - Fuzhou
Tel: 86-591-8750-3506
Fax: 86-591-8750-3521
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Penang
Tel: 60-4-646-8870
Fax: 60-4-646-5086
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
China - Shunde
Tel: 86-757-2839-5507
Fax: 86-757-2839-5571
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xian
Tel: 86-29-8833-7250
Fax: 86-29-8833-7256
12/08/06
DS21618B-page 36
© 2007 Microchip Technology Inc.