ON MC10SX1189DG Fibre channel coaxial cable driver and loop resiliency circuit Datasheet

MC10SX1189
Fibre Channel Coaxial
Cable Driver and Loop
Resiliency Circuit
Description
The MC10SX1189 is a differential receiver, differential transmitter
specifically designed to drive coaxial cables. It incorporates the output
cable drive capability of the MC10EL89 Coaxial Cable Driver with
additional circuitry to multiplex the output cable drive source between
the cable receiver or the local transmitter inputs. The multiplexer
control circuitry is TTL compatible for ease of operation.
The MC10SX1189 is useful as a bypass element for Fibre
Channel-Arbitrated Loop (FC-AL) or Serial Storage Architecture
(SSA) applications, to create loop style interconnects with fault
tolerant, active switches at each device node. This device is
particularly useful for back panel applications where small size is
desirable.
The EL89 style drive circuitry produces swings twice as large as
a standard PECL output. When driving a coaxial cable, proper
termination is required at both ends of the line to minimize reflections.
The 1.6 V output swings allow for proper termination at both ends
of the cable, while maintaining the required swing at the receiving end
of the cable. Because of the larger output swings, the QT, QT outputs
are terminated into the thevenin equivalent of 50 W to VCC − 3.0 V
instead of 50 W to VCC − 2.0 V.
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FIBRE CHANNEL COAXIAL
CABLE DRIVER AND LOOP
RESILIENCY CIRCUIT
16
1
SOIC−16
CASE 751B−05
MARKING DIAGRAM*
10SX1189G
AWLYWW
Features
• 425 ps Propagation Delay
• 1.6 V Output Swing on the Cable Driving Output
• Operation Range:
•
•
•
•
♦ VCC = 4.5 V to 5.5 V
75 kW Internal Input Pull Down Resistors
>1000 V ESD Protection
Transistor Count = 102
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
10SX1189 = Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
Y
= Year
WW
= Work Week
G
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
MC10SX1189DG
© Semiconductor Components Industries, LLC, 2016
August, 2016 − Rev. 5
1
Package
Shipping
SOIC−16
(Pb-Free)
48 Units/Tube
Publication Order Number:
MC10SX1189/D
MC10SX1189
TRUTH TABLE
VCC
DR
DR
GND
VBB
DT
DT
SEL
16
15
14
13
12
11
10
9
SEL
Function
L
H
DR → QT
DT → QT
PIN NAMES
1
2
3
4
5
6
7
QR
QR
VCC
NC
VCC
QT
QT
Function
DR/DR
QR/QR
Differential Input from Receive Cable
Buffered Differential Output from Receive Cable
Differential Input to Transmit Cable
Buffered Differential Output to
Transmit Cable
Multiplexer Control Signal (TTL)
Positive Power Supply
Ground
Reference Voltage Output
DT/DT
QT/QT
8
VCC
Figure 1. Pinout: SOIC−16 (Top View)
LOCAL
RECEIVE DATA
(ECL LEVELS)
Pins
SEL
VCC
GND
VBB
QR
QR
DR
DR
FROM
INPUT CABLE
(ECL LEVELS)
VBB
1
LOCAL
TRANSMIT DATA
(ECL LEVELS)
DT
DT
0
QT
QT
TO OUTPUT CABLE
(ENHANCED SWING)
SEL (TTL)
Figure 2. LOGIC DIAGRAM
Table 1. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
Power Supply Voltage (Referenced to GND)
0 to +7.0
Vdc
VIN
Input Voltage (Referenced to GND)
0 to +6.0
Vdc
IOUT
Output Current
Continuous
Surge
TA
TSTG
50
100
mA
Operating Temperature Range
−40 to +85
°C
Storage Temperature Range
−50 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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2
MC10SX1189
Table 2. DC CHARACTERISTICS (VCC = 5.0 V, VEE = 0 V)
-40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
VOH
Output Voltage High (QR,QR)
VCC = 5.0 V, GND = 0 V (Notes 1, 2)
3.92
4.05
4.22
3.97
4.11
4.27
4.00
4.16
4.30
V
VOL
Output Voltage Low (QR,QR)
VCC = 5.0 V, GND = 0 V (Notes 1, 2)
3.05
3.23
3.35
3.07
3.24
3.37
3.10
3.25
3.41
V
VOH
Output Voltage High (QT,QT)
VCC = 5.0 V, GND = 0 V (Notes 1, 3)
3.83
3.95
4.10
3.88
4.02
4.15
3.90
4.09
4.17
V
VOL
Output Voltage Low (QT,QT)
VCC = 5.0 V, GND = 0 V (Notes 1, 3)
1.90
2.33
2.50
1.85
2.26
2.45
1.85
2.23
2.45
V
ICC
Quiescent Supply Current (Note 4)
20
25
42
23
27
47
25
28
47
mA
VIH
Input Voltage High (DR,DR & DT,DT)
VCC = 5.0 V, GND = 0 V (Note 1)
3.77
4.11
3.87
4.19
3.94
4.28
V
VIL
Input Voltage Low (DR,DR & DT,DT)
VCC = 5.0 V, GND = 0 V (Note 1)
3.05
3.50
3.05
3.52
3.05
3.56
V
VIH
Input Voltage High SEL
2.0
VIL
Input Voltage Low SEL
VBB
Output Reference Voltage
VCC = 5.0 V, GND = 0 V (Note 1)
IIH
Input HIGH Current
IIL
Input LOW Current
2.0
2.0
0.8
3.57
3.63
3.70
0.8
3.65
150
0.5
V
3.70
3.75
3.69
150
0.5
0.5
3.75
0.8
V
3.81
V
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Values will track 1:1 with the VCC supply. VEE can vary +0.5 V to −0.5 V.
2. Outputs loaded with 50 W to VCC − 2.0 V.
3. Outputs loaded with 50 W to VCC − 3.0 V.
4. Outputs open circuited.
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3
MC10SX1189
Table 3. AC CHARACTERISTICS (VCC = 4.5 V to 5.5 V) (Note 1)
−40°C
Symbol
tPLH,
tPHL
Characteristic
Propagation Delay to Output
DR → QR (Diff)
(SE)
DR → QT (Diff)
(SE)
DT → QT (Diff)
(SE)
Min
Typ
0 to 85°C
Max
Min
Typ
Max
Unit
ps
Condition
Note 2
Note 3
175
150
250
225
225
200
300
300
425
425
400
400
450
500
650
700
650
725
225
175
300
250
275
225
325
325
450
450
425
425
500
550
650
700
650
725
Propagation Delay
SEL → QT,QT
450
600
850
500
650
800
tr,
tf
Rise TimeQR,QR
Fall Time
100
100
275
275
400
400
125
125
275
275
400
400
ps
20% to 80%
80% to 20%
tr,
tf
Rise TimeQT,QT
Fall Time
150
150
300
300
550
550
150
150
300
300
550
550
ps
20% to 80%
80% to 20%
ps
Note 4
15
15
1.5V to 50% Pt
tskew
Within Device Skew
VPP
Minimum Input Swing
200
1000
200
1000
mV
Note 5
VCMR
Common Mode Range
3.00
4.35
3.00
4.35
V
Note 6
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. VEE can vary +0.5 V to −0.5 V.
2. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
3. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
4. Duty cycle skew is the difference between tPLH and tPHL propagation delay through a device.
5. Minimum input swing for which AC parameters are guaranteed.
6. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls
within the specified range and the peak-to-peak voltage lies between VPP Min and 1.0 V.
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4
MC10SX1189
PACKAGE DIMENSIONS
SOIC−16
CASE 751B−05
ISSUE K
−A−
16
9
1
8
−B−
P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS AAND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
8 PL
0.25 (0.010)
M
B
S
DIM
A
B
C
D
F
G
J
K
M
P
R
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
STYLE 5:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
16 PL
0.25 (0.010)
STYLE 1:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
J
M
D
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
COLLECTOR
BASE
EMITTER
NO CONNECTION
EMITTER
BASE
COLLECTOR
COLLECTOR
BASE
EMITTER
NO CONNECTION
EMITTER
BASE
COLLECTOR
EMITTER
COLLECTOR
STYLE 2:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
DRAIN, DYE #1
DRAIN, #1
DRAIN, #2
DRAIN, #2
DRAIN, #3
DRAIN, #3
DRAIN, #4
DRAIN, #4
GATE, #4
SOURCE, #4
GATE, #3
SOURCE, #3
GATE, #2
SOURCE, #2
GATE, #1
SOURCE, #1
STYLE 6:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
M
T B
S
A
S
CATHODE
ANODE
NO CONNECTION
CATHODE
CATHODE
NO CONNECTION
ANODE
CATHODE
CATHODE
ANODE
NO CONNECTION
CATHODE
CATHODE
NO CONNECTION
ANODE
CATHODE
STYLE 3:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
COLLECTOR, DYE #1
BASE, #1
EMITTER, #1
COLLECTOR, #1
COLLECTOR, #2
BASE, #2
EMITTER, #2
COLLECTOR, #2
COLLECTOR, #3
BASE, #3
EMITTER, #3
COLLECTOR, #3
COLLECTOR, #4
BASE, #4
EMITTER, #4
COLLECTOR, #4
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
STYLE 7:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
SOURCE N‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
GATE P‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
SOURCE P‐CH
SOURCE P‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
GATE N‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
SOURCE N‐CH
STYLE 4:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
SOLDERING FOOTPRINT
COLLECTOR, DYE #1
COLLECTOR, #1
COLLECTOR, #2
COLLECTOR, #2
COLLECTOR, #3
COLLECTOR, #3
COLLECTOR, #4
COLLECTOR, #4
BASE, #4
16X
EMITTER, #4
0.58
BASE, #3
EMITTER, #3
BASE, #2
EMITTER, #2
BASE, #1
EMITTER, #1
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5
8X
6.40
16X
1
1.12
16
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free
strategy and soldering details, please
download the ON Semiconductor Soldering
and Mounting Techniques Reference Manual, SOLDERRM/D.
MC10SX1189
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