TI1 LM27761 Low-noise regulated switched-capacitor voltage inverter Datasheet

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LM27761
SNVSA85B – OCTOBER 2015 – REVISED FEBRUARY 2016
LM27761 Low-Noise Regulated Switched-Capacitor Voltage Inverter
1 Features
3 Description
•
•
•
The LM27761 low-noise regulated switched-capacitor
voltage inverter delivers a very low-noise adjustable
output for an input voltage in the range of 2.7 V to
5.5 V. Four low-cost capacitors are used in the
application solution to provide up to 250 mA of output
current. The regulated output for the device is
adjustable between −1.5 V and −5 V. The LM27761
operates at 2-MHz (typical) switching frequency to
reduce output resistance and voltage ripple. With an
operating current of only 370 µA (charge-pump power
efficiency greater than 80% with most loads) and
7-µA typical shutdown current, the LM27761 provides
ideal performance when driving power amplifiers,
DAC bias rails, and other high-current, low-noise
voltage applications.
1
•
•
•
•
•
•
•
•
Inverts and Regulates the Input Supply Voltage
Low Output Ripple
Shutdown Lowers Quiescent Current to 7 µA
(Typical)
Up to 250-mA Output Current
2.5-Ω Inverter Output Impedance, VIN = 5 V
±4% Regulation at Peak Load
370-µA Quiescent Current
2-MHz (Typical) Low-Noise Fixed-Frequency
Operation
35-dB (Typical) LDO PSRR at 2 MHz
With 80-mA Load Current
30-mV LDO Dropout Voltage at 100 mA,
VOUT = –5 V
Current Limit and Thermal Protection
Device Information(1)
PART NUMBER
LM27761
2 Applications
•
•
•
•
•
•
•
PACKAGE
WSON (8)
BODY SIZE (NOM)
2.00 mm × 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Operational Amplifier Power
Wireless Communication Systems
Cellular-Phone Power-Amplifier Biasing
Interface Power Supplies
Handheld Instrumentation
Hi-Fi Headphone Amplifiers
Powering Data Converters
Typical Application
LM27761
VIN
C2
4.7 µF
VOUT
R1
EN
VFB
C1+
C4
2.2 µF
R2
CPOUT
C3
4.7 µF
C1
1 µF
C1-
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM27761
SNVSA85B – OCTOBER 2015 – REVISED FEBRUARY 2016
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 10
8
Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Application - Regulated Voltage Inverter.... 11
9 Power Supply Recommendations...................... 16
10 Layout................................................................... 16
10.1 Layout Guidelines ................................................. 16
10.2 Layout Example .................................................... 17
11 Device and Documentation Support ................. 18
11.1
11.2
11.3
11.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
18
12 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
Changes from Revision A (December 2015) to Revision B
Page
•
Changed reversed "C1" and "C2" in Typ App drawing ......................................................................................................... 1
•
Deleted footnote 3 to Abs Max table ..................................................................................................................................... 4
•
updated Specifications tables................................................................................................................................................. 4
•
Added Condition statement for Typical Charcteristics............................................................................................................ 6
•
Changed Figures 3 and 4; added Figures 16 through 18 ..................................................................................................... 8
•
Changed "... reducing the quiescent current to 1 µA" to "...reducing the quiescent current to 7 µA" .................................. 10
•
Changed "1-µA typical shutdown current" to "7-µA typical shutdown current"..................................................................... 11
•
Changed "C2 is charging C3" to "C1 is charging C3" .......................................................................................................... 12
•
Changed "VOUT" to "CPOUT" on Figure 20 ........................................................................................................................ 12
•
Changed "C2" to "C1" .......................................................................................................................................................... 12
•
Changed "RSW" to "(2 × RSW)" .............................................................................................................................................. 12
•
Changed equation 1 ............................................................................................................................................................ 12
•
Changed "–1.2 V" to "–1.22 V" ............................................................................................................................................ 13
Changes from Original (October 2015) to Revision A
•
2
Page
Changed device from one-page product preview to full advance information data sheet .................................................... 1
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5 Pin Configuration and Functions
DSG Package
8-Pin WSON With Thermal Pad
Top View
8
PA
D
1
RM
AL
2
TH
E
3
4
7
6
5
Pin Functions
PIN
NUMBER
NAME
TYPE (1)
DESCRIPTION
1
VIN
P
Positive power supply input.
2
GND
G
Ground
3
CPOUT
P
Negative unregulated output voltage.
4
VOUT
P
Regulated negative output voltage.
P
Feedback input. Connect VFB to an external resistor divider between VOUT and
GND. DO NOT leave unconnected.
5
VFB
6
EN
I
Active high enable input.
7
C1–
P
Negative terminal for C1.
8
C1+
P
Positive terminal for C1.
—
Thermal Pad
G
Ground. DO NOT leave unconnected.
(1)
P: Power; G: Ground; I: Input.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
MAX
UNIT
5.8
V
Ground voltage, VIN to GND or GND to VOUT
(GND − 0.3 V)
EN
(VIN + 0.3 V)
Continuous output current, CPOUT and VOUT
300
mA
TJMAX (3)
150
°C
150
°C
Storage temperature, Tstg
(1)
(2)
(3)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under . Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.
The maximum power dissipation must be de-rated at elevated temperatures and is limited by TJMAX (maximum junction temperature), TA
(ambient temperature) and RθJA (junction-to-ambient thermal resistance). The maximum power dissipation at any temperature is:
PDissMAX = (TJMAX – TA)/RθJA up to the value listed in the Absolute Maximum Ratings.
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±250
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
Operating ambient temperature, TA
–40
85
°C
Operating junction temperature, TJ
–40
125
°C
Operating input voltage, VIN
2.7
5.5
V
0
250
mA
Operating output current, IOUT
UNIT
6.4 Thermal Information
LM27761
THERMAL METRIC (1)
WSON (DSG)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
67.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
89.9
°C/W
RθJB
Junction-to-board thermal resistance
37.6
°C/W
ψJT
Junction-to-top characterization parameter
2.4
°C/W
ψJB
Junction-to-board characterization parameter
38
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
9.4
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report SPRA953.
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6.5 Electrical Characteristics
Typical limits apply for TA = 25°C, and minimum and maximum limits apply over the full temperature range. Unless otherwise
specified, VIN = 5 V and values for C1 to C4 are as shown in the Typical Application.
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
370
600
µA
Supply current
ISD
Shutdown supply current
ƒSW
Switching frequency
VIN = 3.6 V
RNEG
Output resistance to CPOUT
VIN = 5.5 V
2
Ω
VDO
LDO dropout voltage
ILOAD = 100 mA, VOUT = −5 V
30
mV
PSRR
Power supply rejection ratio
ILOAD = 80 mA, VCPOUT = −5 V
35
dB
VN
Output noise voltage
ILOAD = 80 mA, 10 Hz to 100 kHz
20
µVRMS
VFB
Feedback pin reference voltage
VOUT
Adjustable output voltage
5.5 V ≥ VIN ≥ 2.7 V
Load regulation
0 to 250 mA, VOUT = −1.8 V
4.6
µV/mA
Line regulation
5.5 V ≥ VIN ≥ 2.7 V, ILOAD = 50 mA
1.5
mV/V
VIH
Enable pin input voltage high
5.5 V ≥ VIN ≥ 2.7 V
VIL
Enable pin input voltage low
5.5 V ≥ VIN ≥ 2.7 V
UVLO
Undervoltage lockout
Open circuit, no load
TYP
Iq
1.7
1.202
7
12
µA
2
2.3
MHz
1.22
–5
1.238
V
–1.5
V
1.2
V
0.4
VIN falling
2.6
VIN rising
2.4
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V
5
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6.6 Typical Characteristics
Unless otherwise specified, TA = 25°C, VIN = 5 V, and values for C1 to C4 are as shown in the Typical Application.
3.5
2
1.8
Output Voltage Ripple (mV)
Output Voltage Ripple (mV)
3
2.5
2
1.5
1
0.5
VIN = 3 V, VOUT = -1.8 V
VIN = 5.5 V, VOUT = -5 V
50
100
150
Output Current (mA)
200
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
1.6
0
2.7
250
3.2
3.7
D001
VOUT = –1.8 V
Figure 1. Output Voltage Ripple vs Output Current
25°C
85°C
-40°C
5.5
D002
IOUT = 100 mA
8
7
300
6
250
200
5
4
150
3
100
2
50
1
3.2
EN = 1
25qC
85qC
-40qC
9
350
0
2.7
5.2
Figure 2. Output Voltage Ripple vs Input Voltage
ISD (PA)
IQ (µA)
400
4.7
10
500
450
4.2
VIN (V)
3.7
4.2
VIN (V)
4.7
5.2
0
2.7
5.5
3.2
3.7
D015
ILOAD = 0 mA
4.2
VIN (V)
4.7
5.2
5.7
D016
EN = 0
Figure 3. Quiescent Current
Figure 4. Shutdown Current
-1.75
-4.8
25°C
85°C
-40°C
-1.77
-4.85
-1.79
VOUT (V)
VOUT (V)
-4.9
-1.81
-4.95
-5
-5.05
-5.1
-1.83
25°C
85°C
-40°C
-5.15
-1.85
0.001
VIN = 3 V
R1 = 237 kΩ
0.01
IOUT (A)
VOUT = –1.8 V
R2 = 500 kΩ
0.1
0.25
-5.2
0.001
0.1
IOUT (A)
VIN = 5.5 V
R1 = 1.54 MΩ
Figure 5. Load Regulation
6
0.01
D006
1
D007
VOUT = –5 V
R2 = 500 kΩ
Figure 6. Load Regulation
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Typical Characteristics (continued)
Unless otherwise specified, TA = 25°C, VIN = 5 V, and values for C1 to C4 are as shown in the Typical Application.
-3.2
VOUT (V)
-3.25
-3.3
-3.35
-3.4
0.001
0.01
IOUT (A)
VIN = 5 V
R1 = 856 kΩ
0.1
0.25
D011
VIN = 3 V
VOUT = –3.3 V
R2 = 500 kΩ
VOUT = –5 V
IOUT = 250 mA
Figure 8. Output Voltage Ripple
Figure 7. Load Regulation
VIN = 5.5 V
VOUT = –1.8 V
IOUT = 250 mA
Figure 9. Output Voltage Ripple
Figure 10. Enable High
100
90
Dropout Voltage (mV)
80
70
60
50
40
30
VOUT = -5 V
VOUT = -3 V
VOUT = -3.3 V
VOUT = -4.5 V
20
10
0
0
50
100
150
IOUT (mA)
200
250
D008
Figure 12. LDO Dropout Voltage vs IOUT
Figure 11. Enable Low
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Typical Characteristics (continued)
Unless otherwise specified, TA = 25°C, VIN = 5 V, and values for C1 to C4 are as shown in the Typical Application.
-1.77
-1.77
25°C
85°C
-40°C
-1.79
-1.8
-1.81
-1.79
-1.8
-1.81
-1.82
-1.82
-1.83
2.7
25°C
85°C
-40°C
-1.78
Output Voltage (V)
Output Voltage (V)
-1.78
3.2
VOUT = –1.8 V
R1 = 237 kΩ
3.7
4.2
VIN (V)
4.7
5.2
-1.83
2.7
5.5
3.2
3.7
D012
IOUT = 50 mA
R2 = 500 kΩ
VOUT = –1.8 V
R1 = 237 kΩ
4.2
VIN (V)
4.7
5.2
5.5
D013
IOUT = 100 mA
R2 = 500 kΩ
Figure 13. Line Regulation
Figure 14. Line Regulation
-1.78
25°C
85°C
-40°C
Output Voltage (V)
-1.79
-1.8
-1.81
-1.82
-1.83
2.7
VOUT = –1.8
3.2
3.7
IOUT = 250 mA
4.2
VIN (V)
4.7
5.2
5.5
D014
R1 = 237 kΩ
R2 = 500 kΩ
Figure 15. Line Regulation
8
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7 Detailed Description
7.1 Overview
The LM27761 regulated charge-pump voltage converter inverts a positive voltage in the range of 2.7 V to 5.5 V
to a negative voltage in the range of –1.5 V to –5 V. The negative LDO (low drop-out regulator), at the output of
the charge-pump voltage converter, allows the device to provide a very low noise output, low output-voltage
ripple, high PSRR, and low line and load transient responses. The output is externally configurable with gainsetting resistors. The LM27761 uses four low-cost capacitors to deliver up to 250 mA of output current.
7.2 Functional Block Diagram
VIN
Current Limit
C1+
Switch Array Switch
Drivers
2-MHz
Oscillator
C1-
CPOUT
EN
GND
Reference
LPF
VOUT
Negative
Bandgap
LPF
VFB
LDO
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7.3 Feature Description
7.3.1 Undervoltage Lockout
The LM27761 has an internal comparator that monitors the voltage at VIN and forces the device into shutdown if
the input voltage drops to 2.4 V. If the input voltage rises above 2.6 V, the LM27761 resumes normal operation.
7.3.2 Input Current Limit
The LM27761 contains current limit circuitry that protects the device in the event of excessive input current
and/or output shorts to ground. The input current is limited to 500 mA (typical) when the output is shorted directly
to ground. When the LM27761 is current limiting, power dissipation in the device is likely to be quite high. In this
event, thermal cycling is expected.
7.3.3 PFM Operation
To minimize quiescent current during light load operation, the LM27761 allows PFM or pulse-skipping operation.
By allowing the charge pump to switch less when the output current is low, the quiescent current drawn from the
power source is minimized. The frequency of pulsed operation is not limited and can drop into the sub-2-kHz
range when unloaded. As the load increases, the frequency of pulsing increases until it transitions to constant
frequency. The fundamental switching frequency in the LM27761 is 2 MHz.
7.3.4 Output Discharge
In shutdown, the LM27761 actively pulls down on the output of the device until the output voltage reaches GND.
In this mode, the current drawn from the output is approximately 1.85 mA.
7.3.5 Thermal Shutdown
The LM27761 implements a thermal shutdown mechanism to protect the device from damage due to
overheating. When the junction temperature rises to 150°C (typical), the device switches into shutdown mode.
The LM27761 releases thermal shutdown when the junction temperature is reduced to 130°C (typical).
Thermal shutdown is most often triggered by self-heating, which occurs when there is excessive power
dissipation in the device and/or insufficient thermal dissipation. The LM27761 device power dissipation increases
with increased output current and input voltage. When self-heating brings on thermal shutdown, thermal cycling
is the typical result. Thermal cycling is the repeating process where the part self-heats, enters thermal shutdown
(where internal power dissipation is practically zero), cools, turns on, and then heats up again to the thermal
shutdown threshold. Thermal cycling is recognized by a pulsing output voltage and can be stopped by reducing
the internal power dissipation (reduce input voltage and/or output current) or the ambient temperature. If thermal
cycling occurs under desired operating conditions, thermal dissipation performance must be improved to
accommodate the power dissipation of the device.
7.4 Device Functional Modes
7.4.1 Shutdown Mode
An enable pin (EN) pin is available to disable the device and place the LM27761 into shutdown mode reducing
the quiescent current to 7 µA. In shutdown, the output of the LM27761 is pulled to ground by an internal pullup
current source (approximately 1.85 mA).
7.4.2 Enable Mode
Applying a voltage greater than 1.2 V to the EN pin brings the device into enable mode. When unloaded, the
input current during operation is 370 µA. As the load current increases, so does the quiescent current. When
enabled, the output voltage is equal to the inverse of the input voltage minus the voltage drop across the charge
pump.
10
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM27761 low-noise charge-pump voltage converter inverts a positive voltage in the range of 2.7 V to 5.5 V
to a negative output voltage configurable with external gain setting resistors. The device uses four low-cost
capacitors to provide up to 250 mA of output current. The LM27761 operates at a 2-MHz oscillator frequency to
reduce charge-pump output resistance and voltage ripple under heavy loads. With an operating current of only
370 µA and 7-µA typical shutdown current, the LM27761 provides ideal performance for battery-powered
systems.
8.2 Typical Application - Regulated Voltage Inverter
LM27761
VIN
C2
4.7 µF
VOUT
R1
C4
2.2 µF
EN
VFB
C1+
R2
CPOUT
C3
4.7 µF
C1
1 µF
C1-
GND
Figure 16. LM27761 Typical Application
8.2.1 Design Requirements
Example requirements for typical applications using the LM27761 device are listed in Table 1:
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage
2.7 V to 5.5 V
Output voltage
–1.5 V to –5 V
Output current
0 mA to 250 mA
Boost switching frequency
2 MHz
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8.2.2 Detailed Design Procedure
8.2.2.1 Charge-Pump Voltage Inverter
The main application of the LM27761 is to generate a regulated negative supply voltage. The voltage inverter
circuit uses only three external capacitors, and the LDO regulator circuit uses one additional output capacitor.
The voltage inverter portion of the LM27761 contains four large CMOS switches which are switched in sequence
to invert the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 17
shows the voltage switches S2 and S4 are open. In the second time interval, S1 and S3 are open; at the same
time, S2 and S4 are closed, and C1 is charging C3. After a number of cycles, the voltage across C3 is pumped
into VIN. Because the anode of C3 is connected to ground, the output at the cathode of C3 equals –(VIN) when
there is no load current. When a load is added the output voltage dropis determined by the parasitic resistance
(RDSON of the MOSFET switches and the equivalent series resistance (ESR) of the capacitors) and the charge
transfer loss between the capacitors.
S1
VIN
C1+
S2
GND
CIN
C1
COUT
GND
S3
S4
C1-
CPOUT
OSC.
2 MHz
+
PFM COMP
VIN
Figure 17. Voltage Inverting Principle
The output characteristic of this circuit can be approximated by an ideal voltage source in series with a
resistance. The voltage source equals –(VIN). The output resistance ROUT is a function of the ON resistance of
the internal MOSFET switches, the oscillator frequency, the capacitance, and the ESR of C1 and C3. Because
the switching current charging and discharging C1 is approximately twice as the output current, the effect of the
ESR of the pumping capacitor C1 is multiplied by four in the output resistance. The charge-pump output
capacitor C3 is charging and discharging at a current approximately equal to the output current; therefore, its
ESR only counts once in the output resistance. A good approximation of charge-pump ROUT is shown in
Equation 1:
ROUT = (2 × RSW) + [1 / (ƒSW × C)] + (4 × ESRC1) + ESRCOUT
where
•
RSW is the sum of the ON resistance of the internal MOSFET switches shown in Figure 17.
(1)
High capacitance and low-ESR ceramic capacitors reduce the output resistance.
8.2.2.2 Negative Low-Dropout Linear Regulator
At the output of the inverting charge-pump the LM27761 features a low-dropout, linear negative voltage regulator
(LDO). The LDO output is rated for a current of 250 mA. This negative LDO allows the device to provide a very
low noise output, low output voltage ripple, high PSRR, and low line or load transient response.
12
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8.2.2.3 Power Dissipation
The allowed power dissipation for any package is a measure of the ability of the device to pass heat from the
junctions of the device to the heatsink and the ambient environment. Thus, the power dissipation is dependent
on the ambient temperature and the thermal resistance across the various interfaces between the die junction
and ambient air.
The maximum allowable power dissipation can be calculated by Equation 2:
PD-MAX = (TJ-MAX – TA) / RθJA
(2)
The actual power being dissipated in the device can be represented by Equation 3:
PD = PIN – POUT = [VIN × (–IOUT + IQ) – (VOUT × IOUT)]
(3)
Equation 2 and Equation 3 establish the relationship between the maximum power dissipation allowed due to
thermal consideration, the voltage drop across the device, and the continuous current capability of the device.
These equations must be used to determine the optimum operating conditions for the device in a given
application.
In lower power dissipation applications the maximum ambient temperature (TA-MAX) may be increased. In higher
power dissipation applications the maximum ambient temperature(TA-MAX) may have to be derated. TA-MAX can be
calculated using Equation 4:
TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX)
where
•
•
•
TJ-MAX-OP = maximum operating junction temperature (125°C)
PD-MAX = the maximum allowable power dissipation
RθJA = junction-to-ambient thermal resistance of the package
(4)
Alternately, if TA-MAX cannot be derated, the power dissipation value must be reduced. This can be accomplished
by reducing the input voltage as long as the minimum VIN is not violated, or by reducing the output current, or
some combination of the two.
8.2.2.4 Output Voltage Setting
The output voltage of the LM27761 is externally configurable. The value of R1 and R2 determines the output
voltage setting. The output voltage can be calculated using Equation 5:
VOUT = –1.22 V × (R1 + R2) / R2
(5)
The value for R2 must be no less than 50 kΩ.
8.2.2.5 External Capacitor Selection
The LM27761 requires 4 external capacitors for proper operation. Surface-mount multi-layer ceramic capacitors
are recommended. These capacitors are small, inexpensive, and have very low ESR (≤ 15 mΩ typical). Tantalum
capacitors, OS-CON capacitors, and aluminum electrolytic capacitors generally are not recommended for use
with the LM27761 due to their high ESR compared to ceramic capacitors.
For most applications, ceramic capacitors with an X7R or X5R temperature characteristic are preferable for use
with the LM27761. These capacitors have tight capacitance tolerances (as good as ±10%) and hold their value
over temperature (X7R: ±15% over –55°C to +125°C; X5R ±15% over –55°C to +85°C).
Using capacitors with a Y5V or Z5U temperature characteristic is generally not recommended for the LM27761.
These capacitors typically have wide capacitance tolerance (80%, ….20%) and vary significantly over
temperature (Y5V: 22%, –82% over –30°C to +85°C range; Z5U: 22%, –56% over 10°C to 85°C range). Under
some conditions a 1-µF-rated Y5V or Z5U capacitor could have a capacitance as low as 0.1 µF. Such
detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum capacitance
requirements of the LM27761.
Net capacitance of a ceramic capacitor decreases with increased DC bias. This degradation can result in lowerthan-expected capacitance on the input and/or output, resulting in higher ripple voltages and currents. Using
capacitors at DC bias voltages significantly below the capacitor voltage rating usually minimizes DC bias effects.
Consult capacitor manufacturers for information on capacitor DC bias characteristics.
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Capacitance characteristics can vary quite dramatically with different application conditions, capacitor types, and
capacitor manufacturers. TI strongly recommends that the LM27761 circuit be evaluated thoroughly early in the
design-in process with the mass-production capacitor of choice. This helps ensure that any such variability in
capacitance does not negatively impact circuit performance.
8.2.2.5.1 Charge-Pump Output Capacitor
In typical applications, a 4.7-µF low-ESR ceramic charge-pump output capacitor (C3) is recommended. Different
output capacitance values can be used to reduce charge pump ripple, shrink the solution size, and/or cut the
cost of the solution. However, changing the output capacitor may also require changing the flying capacitor or
input capacitor to maintain good overall circuit performance.
In higher-current applications, a 10-µF, 10-V low-ESR ceramic output capacitor is recommended. If a small
output capacitor is used, the output ripple can become large during the transition between PFM mode and
constant switching. To prevent toggling, a 2-µF capacitance is recommended. For example, 10-µF, 10-V output
capacitor in a 0402 case size typically has only 2-µF capacitance when biased to 5 V.
8.2.2.5.2 Input Capacitor
The input capacitor (C2) is a reservoir of charge that aids in a quick transfer of charge from the supply to the
flying capacitors during the charge phase of operation. The input capacitor helps to keep the input voltage from
drooping at the start of the charge phase when the flying capacitors are connected to the input. It also filters
noise on the input pin, keeping this noise out of the sensitive internal analog circuitry that is biased off the input
line.
Input capacitance has a dominant and first-order effect on the input ripple magnitude. Increasing (decreasing) the
input capacitance results in a proportional decrease (increase) in input voltage ripple. Input voltage, output
current, and flying capacitance also affects input ripple levels to some degree.
In typical applications, a 4.7-µF low-ESR ceramic capacitor is recommended on the input. When operating near
the maximum load of 250 mA, after taking into the DC bias derating, a minimum recommended input capacitance
is 2 µF or larger. Different input capacitance values can be used to reduce ripple, shrink the solution size, and/or
cut the cost of the solution.
8.2.2.5.3 Flying Capacitor
The flying capacitor (C1) transfers charge from the input to the output. Flying capacitance can impact both output
current capability and ripple magnitudes. If flying capacitance is too small, the LM27761 may not be able to
regulate the output voltage when load currents are high. On the other hand, if the flying capacitance is too large,
the flying capacitor might overwhelm the input and charge pump output capacitors, resulting in increased input
and output ripple.
In typical high-current applications, 0.47-µF or 1-µF 10-V low-ESR ceramic capacitors are recommended for the
flying capacitors. Polarized capacitors (tantalum, aluminum, electrolytic, etc.) must not be used for the flying
capacitor, as they could become reverse-biased during LM27761 operation.
8.2.2.5.4 LDO Output Capacitor
The LDO output capacitor (C4) value and the ESR affect stability, output ripple, output noise, PSRR and
transient response. The LM27761 only requires the use of a 2.2-µF ceramic output capacitor for stable operation.
For typical applications, a 2.2-µF ceramic output capacitor located close to the output is sufficient.
14
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8.2.3 Application Curves
100
200
10
1
0.001
VIN = 3 V
0.01
IOUT (A)
0.1
10
1
0.001
0.25
0.01
IOUT (A)
D003
VOUT = –1.8 V
VIN = 5.5 V
Figure 18. Charge-Pump Output Impedance vs
Output Current
VIN = 4V to 4.5 V
25°C
85°C
-40°C
100
ROUT (:)
ROUT (:)
25°C
85°C
-40°C
VOUT = –1.8 V
0.1
0.25
D004
VOUT = –5 V
Figure 19. Charge-Pump Output Impedance vs
Output Current
VIN = 3 V
IOUT = 100 mA
VOUT = –1.8 V
Figure 21. Load Step
Figure 20. Line Step
100%
90%
80%
Efficiency (%)
70%
60%
50%
40%
30%
20%
25°C
85°C
-40°C
10%
0
0.0001
VIN = 5.5 V
0.001
VOUT = –5 V
0.01
Output Current (A)
0.1
R1 = 1.54 MΩ
1
D005
R2 = 500 kΩ
Figure 22. Efficiency vs Output Current
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9 Power Supply Recommendations
The LM27761 is designed to operate from an input voltage supply range between 2.7 V and 5.5 V. This input
supply must be well regulated and capable of supplying the required input current. If the input supply is located
far form the LM27761, additional bulk capacitance may be required in addition to the ceramic bypass capacitors.
10 Layout
10.1 Layout Guidelines
The high switching frequency and large switching currents of the LM27761 make the choice of layout important.
Use the following steps as a reference to ensure the device is stable and maintains proper LED current
regulation across its intended operating voltage and current range:
• Place CIN on the top layer (same layer as the LM27761) and as close to the device as possible. Connecting
the input capacitor through short, wide traces to both the VIN and GND pins reduces the inductive voltage
spikes that occur during switching which can corrupt the VIN line.
• Place CCPOUT on the top layer (same layer as the LM27761) and as close to the VOUT and GND pins as
possible. The returns for both CIN and CCPOUT must come together at one point, as close to the GND pin
as possible. Connecting CCPOUT through short, wide traces reduces the series inductance on the VCPOUT
and GND pins that can corrupt the VCPOUT and GND lines and cause excessive noise in the device and
surrounding circuitry.
• Place C1 on top layer (same layer as the LM27761) and as close to the device as possible. Connect the
flying capacitor through short, wide traces to both the C1+ and C1– pins.
• Place COUT on the top layer (same layer as the LM27761) and as close to the VOUT pin as possible. For
best performance the ground connection for COUT must connect back to the GND connection at the thermal
pad of the device.
• Place R1 and R2 on the top layer (same layer as LM27761) and as close to the VFB pin as possible. For best
performance the ground connection of R2 must connect back to the GND connection at the thermal pad of
the device.
Connections using long trace lengths, narrow trace widths, or connections through vias must be avoided. These
add parasitic inductance and resistance that results in inferior performance, especially during transient
conditions.
16
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10.2 Layout Example
R1
VFB
EN
C1-
C1+
C1
VOUT
CPOUT
VIN
GND
Thermal
Pad
To Load
R2
COUT
To Supply
CIN
CCPOUT
To GND Plane
Figure 23. LM27761 Layout Example
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
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PACKAGE OUTLINE
DSG0008B
WSON - 0.8 mm max height
SCALE 5.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
A
B
(0.08)
(0.05)
PIN 1 INDEX AREA
SECTION A-A
SECTION A-A
2.1
1.9
SCALE 30.000
TYPICAL
0.3
0.2
0.4
0.2
OPTIONAL TERMINAL
TYPICAL
C
0.8 MAX
SEATING PLANE
0.05
0.00
0.08 C
EXPOSED
THERMAL PAD
(0.2) TYP
0.9±0.1
5
4
6X 0.5
SEE OPTIONAL
TERMINAL
A
A
2X
1.5
1.6±0.1
8
1
PIN 1 ID
(OPTIONAL)
8X
0.4
8X
0.2
0.3
0.2
0.1
0.05
C A
C
B
4222124/A 06/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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LM27761
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EXAMPLE BOARD LAYOUT
DSG0008B
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.9)
8X (0.5)
( 0.2) VIA
TYP
1
8
8X (0.25)
(0.55)
SYMM
(1.6)
6X (0.5)
5
4
SYMM
(R0.05) TYP
(1.9)
LAND PATTERN EXAMPLE
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4222124/A 06/2015
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
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EXAMPLE STENCIL DESIGN
DSG0008B
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
8X (0.5)
SYMM
METAL
1
8
8X (0.25)
(0.45)
SYMM
(0.7)
6X (0.5)
5
4
(R0.05) TYP
(0.9)
(1.9)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
87% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
4222124/A 06/2015
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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PACKAGE OPTION ADDENDUM
www.ti.com
13-Feb-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM27761DSGR
ACTIVE
WSON
DSG
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ZGLI
LM27761DSGT
ACTIVE
WSON
DSG
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ZGLI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
13-Feb-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Feb-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM27761DSGR
WSON
DSG
8
3000
180.0
8.4
2.3
2.3
1.15
4.0
8.0
Q2
LM27761DSGT
WSON
DSG
8
250
180.0
8.4
2.3
2.3
1.15
4.0
8.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Feb-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM27761DSGR
WSON
DSG
8
3000
210.0
185.0
35.0
LM27761DSGT
WSON
DSG
8
250
210.0
185.0
35.0
Pack Materials-Page 2
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