This version: Mar. 3. 1999 Semiconductor MSC23237D-xxBS18/DS18 2,097,152-word x 36-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The MSC23237D-xxBS18/DS18 is a fully decoded, 2,097,152-word x 36-bit CMOS dynamic random access memory module composed of eighteen 4Mb DRAMs in SOJ packages mounted with eighteen decoupling capacitors on a 72-pin glass epoxy single-inline package. This module supports any application where high density and large capacity of storage memory are required. FEATURES · 2,097,152-word x 36-bit organization · 72-pin Single Inline Memory Module MSC23237D-xxBS18 : Gold tab MSC23237D-xxDS18 : Solder tab · Single +5V supply ± 10% tolerance · Input : TTL compatible · Output : TTL compatible, 3-state · Refresh : 1024cycles/16ms · /CAS before /RAS refresh, hidden refresh, /RAS only refresh capability · Fast page mode capability · Multi-bit test mode capability PRODUCT FAMILY Access Time (Max.) Cycle Power Dissipation Time Family tRAC tAA tCAC tOEA (Min.) Operating (Max.) MSC23237D-60BS18/DS18 60ns 30ns 15ns 15ns 110ns 4703mW MSC23237D-70BS18/DS18 70ns 35ns 20ns 20ns 130ns 4208mW Standby (Max.) 99mW Semiconductor MSC23237D MODULE OUTLINE (Unit : mm) MSC23237D-xxBS18/DS18 9.3Max. 107.95±0.2*1 101.19Typ. 3.38Typ. ( 3.18 25.4±0.2 Typ. Typ. 10.16 6.35 2.03Typ. 6.35Typ. 1 72 1.27±0.1 R1.57 6.35 1.04Typ. 95.25 *1 The common size difference of the board width 12.5mm of its height is specified as ±0.2. The value above 12.5mm is specified as ±0.5. 3.7Min. +0.1 1.27 -0.08 6.7Min. Semiconductor MSC23237D PIN CONFIGURATION Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name 1 VSS 19 /OE 37 DQ19 55 DQ28 2 DQ0 20 DQ8 38 DQ20 56 DQ29 3 DQ1 21 DQ9 39 VSS 57 DQ30 4 DQ2 22 DQ10 40 /CAS0 58 DQ31 5 DQ3 23 DQ11 41 NC 59 VCC 6 DQ4 24 DQ12 42 NC 60 DQ32 7 DQ5 25 DQ13 43 /CAS1 61 DQ33 8 DQ6 26 DQ14 44 /RAS0 62 DQ34 9 DQ7 27 DQ15 45 /RAS1 63 DQ35 10 VCC 28 A7 46 DQ21 64 NC 11 NC 29 DQ16 47 /WE 65 NC 12 A0 30 VCC 48 VSS 66 NC 13 A1 31 A8 49 DQ22 67 PD1 14 A2 32 A9 50 DQ23 68 PD2 15 A3 33 NC 51 DQ24 69 PD3 16 A4 34 NC 52 DQ25 70 PD4 17 A5 35 DQ17 53 DQ26 71 NC 18 A6 36 DQ18 54 DQ27 72 VSS Presence Detect Pins Pin No. Pin Name MSC23237D -60BS18/DS18 MSC23237D -70BS18/DS18 67 PD1 NC NC 68 PD2 NC NC 69 PD3 NC VSS 70 PD4 NC NC Semiconductor MSC23237D BLOCK DIAGRAM A0-A9 /RAS0 /CAS0 /WE /OE A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC /RAS1 /CAS1 VCC VSS C1-C18 DQ DQ DQ DQ DQ0 DQ1 DQ2 DQ3 VSS DQ DQ DQ DQ VSS DQ4 DQ5 DQ6 DQ7 VSS DQ DQ DQ DQ DQ8 DQ9 DQ10 DQ11 VSS DQ DQ DQ DQ VSS DQ12 DQ13 DQ14 DQ15 VSS DQ DQ DQ DQ DQ DQ DQ DQ VSS VSS DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ VSS DQ16 DQ17 DQ18 DQ19 DQ DQ DQ DQ VSS A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC DQ DQ DQ DQ DQ20 DQ21 DQ22 DQ23 VSS DQ DQ DQ DQ VSS DQ24 DQ25 DQ26 DQ27 VSS DQ DQ DQ DQ VSS DQ DQ DQ DQ VSS DQ28 DQ29 DQ30 DQ31 VSS DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ VSS DQ32 DQ33 DQ34 DQ35 DQ DQ DQ DQ VSS A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC A0-A9 /RAS /CAS /WE /OE VCC Semiconductor MSC23237D ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Symbol Rating Unit VIN, VOUT -1.0 to +7.0 V Voltage on VCC Supply Relative to VSS VCC -1.0 to +7.0 V Short Circuit Output Current IOS 50 mA Power Dissipation PD * 18 W Operating Temperature TOPR 0 to +70 °C Storage Temperature TSTG -40 to +125 °C Voltage on Any Pin Relative to VSS * Ta = 25°C Recommended Operating Conditions ( Ta = 0°C to +70°C ) Parameter Symbol Min. Typ. Max. Unit VCC 4.5 5.0 5.5 V VSS 0 0 0 V Input High Voltage VIH 2.4 - 6.5 V Input Low Voltage VIL -1.0 - 0.8 V Power Supply Voltage Capacitance ( VCC = 5V ± 10%, Ta = 25°C, f = 1 MHz ) Parameter Note: Symbol Typ. Max. Unit Input Capacitance (A0 - A9) CIN1 - 122 pF Input Capacitance (/RAS0, /RAS1, /CAS0, /CAS1) C IN2 - 73 pF Input Capacitance (/WE, /OE) CIN3 - 140 pF I/O Capacitance (DQ0 - DQ35) CDQ - 20 pF Capacitance measured with Boonton Meter. Semiconductor MSC23237D DC Characteristics (VCC = 5V ± 10%, Ta = 0°C to +70°C ) Parameter Symbo l Condition MSC23237D -60BS18/DS18 MSC23237D -70BS18/DS18 Min. Max. Min. Max. Unit Note Input Leakage Current ILI 0V ≤ VIN ≤ 6.5V; All other pins not under test = 0V -180 180 -180 180 µA Output Leakage Current ILO DQ disable 0V ≤ VOUT ≤ 5.5V -20 20 -20 20 µA Output High Voltage VOH IOH = -5.0mA 2.4 VCC 2.4 VCC V Output Low Voltage VOL IOL = 4.2mA 0 0.4 0 0.4 V Average Power Supply Current (Operating) ICC1 /RAS, /CAS cycling, tRC = Min. - 855 - 765 mA 1, 2 /RAS, /CAS = VIH - 36 - 36 mA 1 /RAS, /CAS ≥ VCC -0.2V - 18 - 18 mA 1 Power Supply Current (Standby) ICC2 Average Power Supply Current (/RAS only refresh) ICC3 /RAS cycling, /CAS = VIH, tRC = Min. - 855 - 765 mA 1, 2 Average Power Supply Current (/CAS before /RAS refresh) ICC6 /RAS cycling, /CAS before /RAS - 855 - 765 mA 1, 2 Average Power Supply Current (Fast Page Mode) ICC7 /RAS = VIL, /CAS cycling, tPC = Min. - 675 - 585 mA 1, 3 Notes: 1. ICC Max. is specified as ICC for output open condition. 2. Address can be changed once or less while /RAS = VIL. 3. Address can be changed once or less while /CAS = VIH. Semiconductor MSC23237D AC Characteristics (1/2) (VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3, 11, 12 MSC23237D -60BS18/DS18 MSC23237D -70BS18/DS18 Min. Max. Min. Max. tRC 110 - 130 - ns tRWC 150 - 180 - ns tPC 40 - 45 - ns t PRWC 80 - 95 - ns Access Time from /RAS tRAC - 60 - 70 ns 4, 5, 6 Access Time from /CAS tCAC - 15 - 20 ns 4, 5 Access Time from Column Address tAA - 30 - 35 ns 4, 6 Access Time from /CAS Precharge t CPA - 35 - 40 ns 4 Access Time from /OE tOEA - 15 - 20 ns 4 Output Low Impedance Time from /CAS tCLZ 0 - 0 - ns 4 /CAS to Data Output Buffer Turn-off Delay Time tOFF 0 15 0 20 ns 7 /OE to Data Output Buffer Turn-off Delay Time tOEZ 0 15 0 20 ns 7 Transition Time tT 3 50 3 50 ns 3 Refresh Period tREF - 16 - 16 ms /RAS Precharge Time tRP 40 - 50 - ns /RAS Pulse Width tRAS 60 10K 70 10K ns /RAS Pulse Width (Fast Page Mode) tRASP 60 100K 70 100K ns /RAS Hold Time tRSH 15 - 20 - ns /RAS Hold Time referenced to /OE tROH 15 - 20 - ns /CAS Precharge Time (Fast Page Mode) tCP 10 - 10 - ns /CAS Pulse Width tCAS 15 10K 20 10K ns /CAS Hold Time tCSH 60 - 70 - ns /CAS to /RAS Precharge Time tCRP 5 - 5 - ns /RAS Hold Time from /CAS Precharge tRHCP 35 - 40 - ns /RAS to /CAS Delay Time tRCD 20 45 20 50 ns 5 /RAS to Column Address Delay Time tRAD 15 30 15 35 ns 6 Row Address Set-up Time tASR 0 - 0 - ns Row Address Hold Time tRAH 10 - 10 - ns Column Address Set-up Time tASC 0 - 0 - ns Column Address Hold Time tCAH 15 - 15 - ns Column Address Hold Time from /RAS tAR 50 - 55 - ns Column Address to /RAS Lead Time t RAL 30 - 35 - ns Parameter Random Read or Write Cycle Time Read Modify Write Cycle Time Fast Page Mode Cycle Time Fast Page Mode Read Modify Write Cycle Time Symbol Unit Note Semiconductor MSC23237D AC Characteristics (2/2) (VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3, 11, 12 Parameter Symbol MSC23237D -60BS18/DS18 MSC23237D -70BS18/DS18 Min. Max. Min. Max. Unit Note Read Command Set-up Time tRCS 0 - 0 - ns Read Command Hold Time tRCH 0 - 0 - ns 8 Read Command Hold Time referenced to /RAS tRRH 0 - 0 - ns 8 Write Command Set-up Time tWCS 0 - 0 - ns 9 Write Command Hold Time tWCH 10 - 10 - ns Write Command Hold Time from /RAS tWCR 45 - 50 - ns Write Command Pulse Width tWP 10 - 10 - ns /OE Command Hold Time tOEH 15 - 20 - ns Write Command to /RAS Lead Time tRWL 15 - 20 - ns Write Command to /CAS Lead time tCWL 15 - 20 - ns Data-in Set-up Time tDS 0 - 0 - ns 10 Data-in Hold Time tDH 15 - 15 - ns 10 Data-in Hold Time from /RAS tDHR 50 - 55 - ns /OE to Data-in Delay Time tOED 15 - 20 - ns /CAS to /WE Delay Time tCWD 35 - 45 - ns 9 Column Address to /WE Delay Time tAWD 50 - 60 - ns 9 /RAS to /WE Delay Time tRWD 80 - 95 - ns 9 /CAS Precharge /WE Delay Time tCPWD 55 - 65 - ns 9 /CAS Active Delay Time from /RAS Precharge tRPC 10 - 10 - ns /RAS to /CAS Set-up Time (/CAS before /RAS) tCSR 5 - 5 - ns /RAS to /CAS Hold Time (/CAS before /RAS) tCHR 10 - 10 - ns /WE to /RAS Precharge Time (/CAS before /RAS) tWRP 10 - 10 - ns /WE Hold Time from /RAS (/CAS before /RAS) tWRH 10 - 10 - ns /RAS to /WE Set-up Time (Test Mode) tWTS 10 - 10 - ns /RAS to /WE Hold Time (Test Mode) tWTH 10 - 10 - ns Semiconductor MSC23237D Notes: 1. A start-up delay of 200µs is required after power-up, followed by a minimum of eight initialization cycles (/RAS only refresh or /CAS before /RAS refresh) before proper device operation is achieved. 2. The AC characteristics assumes tT = 5ns. 3. VIH(Min.) and VIL(Max.) are reference levels for measuring input timing signals. Transition time (tT) are measured between VIH and VIL. 4. This parameter is measured with a load circuit equivalent to 2TTL loads and 100pF. 5. Operation within the tRCD(Max.) limit ensures that tRAC(Max.) can be met. tRCD(Max.) is specified as a reference point only. If tRCD is greater than the specified tRCD(Max.) limit, then the access time is controlled by tCAC. 6. Operation within the tRAD(Max.) limit ensures that tRAC(Max.) can be met. tRAD(Max.) is specified as a reference point only. If tRAD is greater than the specified tRAD(Max.) limit, then the access time is controlled by tAA. 7. tOFF(Max.) and tOEZ(Max.) define the time at which the output achieves the open circuit condition and are not referenced to output voltage levels. 8. tRCH or tRRH must be satisfied for a read cycle. 9. tWCS, tCWD, tRWD and tCPWD are not restrictive operating parameters. They are included in the data sheet as electrical characteristics only. If tWCS ≥ tWCS(Min.), the cycle is an early write cycle and the data out will remain open circuit (high impedance) throughout the entire cycle. If tCWD ≥ tCWD(Min.), tRWD ≥ tRWD(Min.), tAWD ≥ tAWD(Min.) and tCPWD ≥ tCPWD(Min.), the cycle is a read modify write cycle and data out will contain data read from the selected cell; if neither or the above sets of conditions is satisfied, the conditions of the data out (at access time) is indeterminate. 10. These parameters are referenced to /CAS leading edge in an early write cycle, and to /WE leading edge in an /OE control write cycle or a read modify write cycle. 11. The test mode is initiated by performing a /WE and /CAS before /RAS refresh cycle. This mode is latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet is a 2-bit parallel test function. CA0 is not used. In a read cycle, if all internal bits are equal, the DQ pin will indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low level. The test mode is cleared and the memory device returned to its normal operating state by a /RAS only refresh or /CAS before /RAS refresh cycle. 12. In a test mode read cycle, the value of access time parameters is delayed for 5ns for the specified value. These parameters should be specified in test mode cycle by adding the above value to the specified value in this data sheet.