MP8843
6V, 3A, Synchronous,
Step-Down Switcher with I2C Interface
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP8843 is a highly integrated, highfrequency, synchronous, step-down switcher with
an I2C control interface. The MP8843 can support
up to 3A of current from a wide 2.6V-to-6V input
supply range with excellent load and line
regulation.
Constant-on-time (COT) control provides a fast
transient response, high light-load efficiency, and
eases loop stabilization.
The I2C interface allows for communication
interface speed up to 3.4Mbps. It controls the
output voltage from 0.6V to 1.1V on the fly with
3.9mV voltage steps. This interface also controls
the output voltage transition slew rate and allows
the power-save mode selection to meet different
application requirements.
Protection features include internal soft start (SS),
over-current protection (OCP), and overtemperature protection (OTP).
The MP8843 requires a minimal number of
readily available, standard, external components
and is available in an ultra-small QFN-12
(2mmx2mm) package.
Wide Input Range from 2.6V to 6V
Up to 3A of Continuous Current
55mΩ and 35mΩ Internal Power MOSFET
High-Speed I2C Communication Interface up
to 3.4MHz
I2C Programmable Output Voltage from 0.6V
to 1.1V for Direct VOUT Sense
VOUT Range Extendable by Adding External
Feedback Resistor
Programmable Switching Frequency from
1MHz to 2MHz
Programmable Voltage Transition Slew Rate
I2C Selectable Power Save Mode
External and I2C-Controlled Power Good
Indicator
Internal Soft Start (SS)
Short-Circuit Protection (SCP) with Latch-Off
Thermal Shutdown
Available in a QFN-12 (2mmx2mm) Package
APPLICATIONS
Small/Handheld Devices
Storage Drives
Portable Instruments
Battery-Powered Devices
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
Analog Digital Adaptive Modulation (ADAM) and Advanced Asynchronous
Mode (AAM) are trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
MP8843 Rev. 1.0
7/15/2016
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© 2016 MPS. All Rights Reserved.
1
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
ORDERING INFORMATION
Part Number*
MP8843GG
Package
QFN-12 (2mmx2mm)
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MP8843GG–Z)
TOP MARKING
BL: Product code of MP8843GG
Y: Year code
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
VIN
PVIN
1
SW
2
PGND
3
AGND
4
10
11
SW
12
PGND
5
9
PG
8
EN
7
OUT
6
SDA
SCL
QFN-12 (2mmx2mm)
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
Supply voltage (VIN) .....................-0.3V to +6.5V
VSW ................................ -0.3V (-5V for <10ns) to
VIN + 0.3V (7V for <10ns and 9V for <5ns)
All other pins ................................-0.3V to +6.5V
Junction temperature ................................150°C
Lead temperature .....................................260°C
(2)
Continuous power dissipation (TA = +25°C)
QFN-12 (2mmx2mm)………………………. 1.7W
QFN-12 (2mmx2mm) ............. 70....... 15..... °C/W
Recommended Operating Conditions (3)
Supply voltage (VIN) ........................... 2.6V to 6V
Output voltage (VOUT) ...................... 0.6V to 1.1V
Operating junction temp. .......... -40°C to +125°C
MP8843 Rev. 1.0
7/15/2016
(4)
θJA
θJC
NOTES:
Exceeding these ratings may damage the device.
The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
The device is not guaranteed to function outside of its operating
conditions.
Measured on JESD51-7, 4-layer PCB.
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2
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
ELECTRICAL CHARACTERISTICS
VIN = 3.6V, TJ = -40°C to +125°C. Typical value is tested at TJ = 25°C, unless otherwise
noted.
Parameter
Symbol Condition
Input voltage range
Quiescent current
Shutdown current
Internal reference voltage
Lowest output voltage
Highest output voltage
Output voltage step
High-side switch on resistance
Low-side switch on resistance
UVLO rising threshold
UVLO hysteresis
VIN over-voltage
VIN over-voltage hysteresis
Switching frequency
Minimum on time
(5)
Minimum off time
VIN
IQ
IS
VREF
VREF
VLOW
VHIGH
VSTEP
EN logic high
EN logic low
EN input current
VENL
VENH
IEN
Typ
Max
Units
6
V
2.6
VEN = 1.8V, no switching,
PFM mode
Io = 0A, switching,
PWM mode(5)
VEN = GND, TJ = 25°C
TJ = 25°C
Register = 00h, TJ = 25°C
Register = 7Fh, TJ = 25°C
RHSON
RLSON
VUVLOR
VUVLOHY
VOVP
VOVPHY
fSW
τMINON
τMINOFF
ISW
Switch leakage
Min
0.594
0.591
0.594
1.089
60
μA
7
mA
0.6
0.6
0.6
1.1
3.9
1
0.606
0.609
0.606
1.111
55
mΩ
35
mΩ
2.35
2.55
mV
6.3
V
250
mV
2
MHz
50
ns
90
ns
1
2
1.2
μA
V
0.4
VEN = 2V
V
170
1
VEN = 0V, VIN = 6V,
VSW = 0V or 6V, TJ = 25°C
μA
V
V
V
V
mV
V
2
μA
85
%VTARGET
115
%VTARGET
20
mV
2
PG rising threshold
VPGH
PG falling threshold
VPGFTH
PG hysteresis
VPGHY
VPGL
τPGd
τPGd
PG pull-down voltage
PG delay
High-side switch peak current
limit (source)(5)
Ipeak
Low-side switch valley current
limit (source)(5)
Ivalley
MP8843 Rev. 1.0
7/15/2016
VOUT refer to I C setting target
voltage,
VOUT from 80% to 100%
VOUT refer to I2C setting target
voltage,
VOUT from 100% to 120%
Isink = 2mA
0.4
V
PG_DELAY = 0
30
μs
PG_DELAY = 1
17
ms
3.6
4.8
3.6
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6
A
A
3
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
ELECTRICAL CHARACTERISTICS (CONTINUED)
VIN = 3.6V, TJ = -40°C to +125°C. Typical value is tested at TJ = 25°C, unless otherwise
noted.
Parameter
Soft-start time
Thermal warning
Condition
τSS-ON
Vo = 0.9V
(6)
Thermal shutdown
DAC resolution
Symbol
(6)
(6)
Min
Typ
Max
Units
1
ms
140
C
160
C
7
bits
NOTES:
Guaranteed by engineering sample characterization.
Guaranteed by design.
MP8843 Rev. 1.0
7/15/2016
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4
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
I/O LEVEL CHARACTERISTICS
Parameter
Symbol Condition
Low-level input voltage
High-level input voltage
VIL
VIH
Low-level output voltage
(open drain) at 3mA sink
current
VOL
Low-level output current
Transfer gate on
resistance for currents
between SDA and
SCAH, or SCL and
SCLH
Transfer gate on
resistance between SDA
and SCAH, or SCL and
SCLH
SCLH current source
pull-up current
SCLH or SCL signal rise
time
SCLH or SCL signal fall
time
SDAH signal rise time
SDAH signal fall time
τfDA
τSP
I/O pin input current
Ii
I/O pin capacitance
Ci
1.4
0.4
VCC < 2V
0
0.2VCC
0
0.2VCC
-
3
-
3
mA
-
50
-
50
Ω
50
-
50
-
kΩ
2
6
2
6
mA
10
40
ns
20
80
ns
10
40
ns
20
80
20
250
ns
10
80
-
-
ns
20
160
20
250
ns
10
80
-
-
ns
20
160
20
250
ns
0
10
0
50
ns
-
10
-10
+10
μA
-
10
-
10
pF
Both signals (SDA and
SDAH, or SCL and SCLH)
at VCC level
τrDA
1.4
V
V
0
RonH
τfCL
0.4
0.4
VOL level, IOL = 3mA
τrCL
0.4
Units
0
RonL
Ics
LS Mode
Min
Max
VCC > 2V
IOL
Spike pulse width
requiring input filter
suppression
MP8843 Rev. 1.0
7/15/2016
VIN = 2.6V - 6V
VIN = 2.6V - 6V
HS Mode
Min
Max
SCLH output levels
between 0.3VCC and 0.7VCC
Output rise time (current
source enabled) with an
external pull-up current
source of 3mA
Capacitive load from 10pF
to 100pF
Capacitive load of 400pF
Output fall time (current
source enabled) with an
external pull-up current
source of 3mA
Capacitive load from 10pF
to 100pF
Capacitive load of 400pF
Capacitive load from 10pF
to 100pF
Capacitive load of 400pF
Capacitive load from 10pF
to 100pF
Capacitive load of 400pF
Input voltage between
0.1VCC and 0.9VCC
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V
5
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
I2C PORT SIGNAL CHARACTERISTICS
Parameter
Symbol
SCLH and SCL clock
frequency
Set-up time for repeated
start condition
Hold time for repeated start
condition
SCL clock low period
SCL clock high period
Data set-up time
Data hold time
Condition
Cb = 100pF
Min
Max
Cb = 400pF
Min
Max
Units
fSCL
0
3.4
0
0.4
MHz
τSU;STA
160
-
600
-
ns
τHD;STA
160
-
600
-
ns
τLOW
τHIGH
τSU:DAT
τHD;DAT
160
60
10
0
70
1300
600
100
0
-
ns
ns
ns
ns
SCLH signal rise time
τrCL
10
40
20x0.1Cb
300
ns
SCLH signal rise time after a
repeated start condition and
an acknowledge bit
τrCL1
10
80
20x0.1Cb
300
ns
SCLH signal fall time
τfCL
10
40
20x0.1Cb
300
ns
SDAH signal rise time
τfDA
10
80
20x0.1Cb
300
ns
SDAH signal fall time
τfDA
10
80
20x0.1Cb
300
ns
τSU;STO
160
-
600
-
ns
τBUF
160
-
1300
-
ns
τVD;DAT
τVD;ACK
-
16
160
100
-
90
900
400
ns
ns
pF
-
400
-
400
pF
-
0.1VCC
0.1VCC
-
V
-
0.2VCC
0.2VCC
-
V
Stop condition set-up time
Bus free time between stop
and start condition
Data valid time
Data valid acknowledge time
Bus line capacitive load
Cb
Low-level noise margin
VnL
High-level noise margin
VnH
SDAH and SCLH line
SDAH + SDA line
and SCLH + SCL line
For each connected
device
For each connected
device
NOTE:
2
Vcc is the I C bus voltage, 1.5V to 2.5V range.
MP8843 Rev. 1.0
7/15/2016
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6
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VOUT = 0.9V, L = 1µH, TA = 25°C, unless otherwise noted.
100
0.2
0.2
90
0.15
0.15
0.1
0.1
0.05
0.05
50
0
0
40
-0.05
-0.05
-0.1
-0.1
-0.15
-0.15
80
70
60
30
20
10
0
0.01
0.1
1
10
0.4
-0.2
0.001
0.01
0.1
1
10
-0.2
0.001
0.01
0.1
1
10
20
6
18
5
16
14
0.2
4
12
10
3
0
8
2
6
4
-0.2
1
-0.4
2
3
4
5
6
7
0.6035
0.603
0.6025
0.602
0.6015
0.601
0.6005
0.6
-50
MP8843 Rev. 1.0
7/15/2016
0
50
100
150
2
0
2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7
0
0 0.5 1 1.5 2 2.5 3 3.5 4
2.5
2.45
2.4
2.5
2.45
2.35
2.35
2.3
2.3
2.25
2.2
2.25
2.15
2.1
2.15
2.05
2
-50
2.05
2
-50
2.4
2.2
2.1
0
50
100
150
0
50
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100
150
7
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
TYPICAL PERFORMANCE CHARACTERISTICS
(continued)
VIN = 5V, VOUT = 0.9V, L = 1µH, TA = 25°C, unless otherwise noted.
MP8843 Rev. 1.0
7/15/2016
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8
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
TYPICAL PERFORMANCE CHARACTERISTICS
(continued)
VIN = 5V, VOUT = 0.9V, L = 1µH, TA = 25°C, unless otherwise noted.
Steady State
Steady State
Steady State
PWM IOUT=0A
PWM IOUT=3A
PFM IOUT=0A
VOUT
AC Coupled
20mV/div.
VIN
5V/div.
VSW
5V/div.
IL
500mA/div.
VOUT
AC Coupled
20mV/div.
VOUT
AC Coupled
20mV/div.
VIN
5V/div.
VSW
5V/div.
VIN
5V/div.
VSW
5V/div.
IL
500mA/div.
IL
2A/div.
VIN Start-Up
VIN Start-Up
VIN Shutdown
PWM IOUT=0A
PWM IOUT=3A
PWM IOUT=0A
VOUT
500mV/div.
VPG
5V/div.
VOUT
500mV/div.
VPG
2V/div.
VSW
2V/div.
VSW
2V/div.
IL
500mA/div.
IL
2A/div.
VOUT
500mV/div.
VPG
5V/div.
VSW
5V/div.
IL
500mA/div.
VIN Shutdown
EN Start-Up
EN Start-Up
PWM IOUT=3A
PWM IOUT=0A
PWM IOUT=3A
VOUT
500mV/div.
VPG
5V/div.
VSW
5V/div.
IL
2A/div.
MP8843 Rev. 1.0
7/15/2016
VOUT
500mV/div.
VPG
5V/div.
VOUT
500mV/div.
VPG
5V/div.
VSW
5V/div.
VSW
5V/div.
IL
500mA/div.
IL
2A/div.
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9
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
TYPICAL PERFORMANCE CHARACTERISTICS
(continued)
VIN = 5V, VOUT = 0.9V, L = 1µH, TA = 25°C, unless otherwise noted.
MP8843 Rev. 1.0
7/15/2016
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10
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
PIN FUNCTIONS
QFN-12
Pin #
Name
1
PVIN
2, 11
3, 12
4
5
SW
PGND
AGND
SCL
6
SDA
7
OUT
8
EN
9
PG
10
VIN
MP8843 Rev. 1.0
7/15/2016
Description
Supply voltage to power FETs. PVIN requires a capacitor to prevent voltage spikes
from damaging the device. Connect the capacitor return to PGND directly. PVIN
connects to VIN internally.
Switch output.
Power ground.
Analog ground. AGND is the low-noise ground for the controller circuitry.
I2C serial clock. SCL provides the clock for the serial interface.
I2C serial data. SDA is an I2C pin that receives clocked serial data from the host and
sends clocked serial data to the host. SDA is at high impedance except when
transmitting.
Output sense. OUT senses the output voltage directly to program the output voltage
from 0.6V to 1.1V. Sense the output voltage through an external feedback resistor to
extend the output voltage range.
On/off control. The MP8843 is enabled when EN is high.
Power good indicator. The output of PG is an open drain with an internal pull-up
resistor to VIN. When PG can detect both the positive and negative excursion of VO
from the reference, PG is pulled up to VIN when the output is within 85%~115% of
regulation voltage. Otherwise, PG is low.
Supply voltage to internal control circuitry. VIN connects to PVIN internally.
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11
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
BLOCK DIAGRAM
PVIN
VIN
CIN
UVLO
Thermal
EN
Control
Logic
SCL
I2C
DAC
MOS
Drivers
SW
L
COUT
Vref
SCA
PGND
OUT
Feedback
PG
AGND
Figure 1: Functional Block Diagram
MP8843 Rev. 1.0
7/15/2016
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12
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
OPERATION
Register Map
ADD
00
01
02
03
04
NAME
VSEL
SysCntlreg1
SysCntlreg2
ID1
ID2
R/W
R/W
R/W
R/W
R
R
05
Status
R
D7
D6
D5
D4
D3
D2
D1
EN
Output reference
Switching frequency
Reserved PG_DELAY PG_LOHI VIN_OVP
Reserved
Go
Out_Dis
Reserved
Slew rate
Vendor ID (0001)
Die ID
Reserved
Die rev
OT
UVLO
OVP
VO_OV
Vo_UV
PGOOD
D0
Mode
OTW
EN
state
D1
0
1
1
0
0
NA
D0
1
1
0
1
0
NA
Default Value of Register
ADD
00
01
02
03
04
05
NAME
VSEL
SysCntlreg1
SysCntlreg2
ID1
ID2
Status
R/W
R/W
R/W
R/W
R
R
R
D7
1
0
1
0
0
NA
D6
1
1
1
0
0
NA
D5
0
0
0
0
0
NA
D4
0
1
0
1
0
NA
D3
1
0
0
0
0
NA
D2
1
1
1
0
0
NA
Register Description
1. Reg00 VSEL
NAME
BITS
EN
D7
Output
reference
D[6:0]
MP8843 Rev. 1.0
7/15/2016
DESCRIPTION
I2C control enable. When EN is low, the converter is off. When EN is high, the EN bit
takes over.
For direct output voltage sense, refer to Figure 4. Set the output voltage from 0.6V to
1.1V, per Table 1.
For output sense through the feedback resistor network, refer to Figure 6 and the
Extending the Output Voltage Range section on page 19.
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13
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
Table 1: Output Voltage Chart
D[6:0]
000 0000
000 0001
000 0010
000 0011
000 0100
000 0101
000 0110
000 0111
000 1000
000 1001
000 1010
000 1011
000 1100
000 1101
000 1110
000 1111
001 0000
001 0001
001 0010
001 0011
001 0100
001 0101
001 0110
001 0111
001 1000
001 1001
001 1010
001 1011
001 1100
001 1101
001 1110
001 1111
VOUT
0.6000
0.6039
0.6079
0.6118
0.6157
0.6197
0.6236
0.6276
0.6315
0.6354
0.6394
0.6433
0.6472
0.6512
0.6551
0.6591
0.6630
0.6669
0.6709
0.6748
0.6787
0.6827
0.6866
0.6906
0.6945
0.6984
0.7024
0.7063
0.7102
0.7142
0.7181
0.7220
D[6:0]
010 0000
010 0001
010 0010
010 0011
010 0100
010 0101
010 0110
010 0111
010 1000
010 1001
010 1010
010 1011
010 1100
010 1101
010 1110
010 1111
011 0000
011 0001
011 0010
011 0011
011 0100
011 0101
011 0110
011 0111
011 1000
011 1001
011 1010
011 1011
011 1100
011 1101
011 1110
011 1111
VOUT
0.7260
0.7299
0.7339
0.7378
0.7417
0.7457
0.7496
0.7535
0.7575
0.7614
0.7654
0.7693
0.7732
0.7772
0.7811
0.7850
0.7890
0.7929
0.7968
0.8008
0.8047
0.8087
0.8126
0.8165
0.8205
0.8244
0.8283
0.8323
0.8362
0.8402
0.8441
0.8480
D[6:0]
100 0000
100 0001
100 0010
100 0011
100 0100
100 0101
100 0110
100 0111
100 1000
100 1001
100 1010
100 1011
100 1100
100 1101
100 1110
100 1111
101 0000
101 0001
101 0010
101 0011
101 0100
101 0101
101 0110
101 0111
101 1000
101 1001
101 1010
101 1011
101 1100
101 1101
101 1110
101 1111
VOUT
0.8520
0.8559
0.8598
0.8638
0.8677
0.8717
0.8756
0.8795
0.8835
0.8874
0.8913
0.8953
0.8992
0.9031
0.9071
0.9110
0.9150
0.9189
0.9228
0.9268
0.9307
0.9346
0.9386
0.9425
0.9465
0.9504
0.9543
0.9583
0.9622
0.9661
0.9701
0.9740
D[6:0]
110 0000
110 0001
110 0010
110 0011
110 0100
110 0101
110 0110
110 0111
110 1000
110 1001
110 1010
110 1011
110 1100
110 1101
110 1110
110 1111
111 0000
111 0001
111 0010
111 0011
111 0100
111 0101
111 0110
111 0111
111 1000
111 1001
111 1010
111 1011
111 1100
111 1101
111 1110
111 1111
VOUT
0.9780
0.9819
0.9858
0.9898
0.9937
0.9976
1.0016
1.0055
1.0094
1.0134
1.0173
1.0213
1.0252
1.0291
1.0331
1.0370
1.0409
1.0449
1.0488
1.0528
1.0567
1.0606
1.0646
1.0685
1.0724
1.0764
1.0803
1.0843
1.0882
1.0921
1.0961
1.1000
2. Reg01 SysCntlreg1
NAME
BITS
DESCRIPTION
D[7:5]
Switching
frequency
D[7:5]
Reserved
PG_DELAY
D4
D3
PG_LOHI
D2
VIN_OVP
D1
Mode
D0
MP8843 Rev. 1.0
7/15/2016
Switching
frequency
—
2MHz
1.67MHz (default)
—
D[7:5]
Switching
frequency
1.25MHz
1.11MHz
1MHz
—
000
100
001
101
010
110
011
111
Reserved.
A “0” disables the PG delay. A “1” enables the 17ms delay.
A “0” sets PG to sense only a negative voltage excursion of VOUT from the reference.
High (default) sets PG to detect both a positive and negative excursion of VOUT from
the reference.
A “0” disables the VIN OVP function. The converter continues operating. High (default)
turns off the converter when VIN reaches 6.3V.
A “0” enables PFM mode; high disables PFM mode.
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14
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
3. Reg02 SysCntlreg2
NAME
Reserved
Go
BITS
D[7:6]
D5
Out_Dis
D4
Reserved
D3
Slew rate
D[2:0]
DESCRIPTION
Reserved.
Write this bit to “1” to start a VOUT transition regardless of its initial value.
A “0” disables the output discharge. The output voltage is discharged by a load. High
enables an internal pull-down.
Reserved.
D[2:0]
Slew rate
D[2:0]
Slew rate
000
64mV/μs
100
4mV/μs
001
32mV/μs
101
2mV/μs
010
16mV/μs
110
1mV/μs (default)
011
8mV/μs
111
0.5mV/μs
4. Reg03 ID1
NAME
Vendor ID
Die ID
BITS
D[7:4]
D[3:0]
DESCRIPTION
Vendor ID [0001].
IC type.
BITS
D[7:4]
D[3:0]
DESCRIPTION
Reserved.
Die revision.
5. Reg04 ID2
NAME
Reserved
Die Rev
6. Reg05 Status
NAME
OT
UVLO
OVP
Vo_OV
Vo_UV
BITS
D7
D6
D5
D4
D3
PGOOD
D2
OTW
EN State
D1
D0
DESCRIPTION
When the bit is high, the IC is in thermal shutdown.
When the bit is high, VIN is less than the UVLO threshold.
When the bit is high, VIN is greater than the OVP threshold.
When the bit is high, a voltage higher than 115% of the regulation voltage is presented.
When the bit is high, a voltage lower than 85% of the regulation voltage is presented.
When the bit is high, the output is in regulation. Otherwise, the output voltage is out of
the regulation window.
When the junction temperature exceeds 140°C, the bit goes high.
When the bit is high, the MOSFET driver is enabled.
Operation Status
FAULT CONDITION
Current limit
VIN under-voltage
VIN over-voltage(7)
VO under-voltage
VO over-voltage (>115%
output)(8)
Thermal warning
Thermal shutdown
of
target
PG
High
Low
Low
Low
REGULATION
On
Off
Off
Off
LATCH-OFF
No
NA
No
Yes
STATUS BIT
Low
On
No
Vo_OV
Low
Low
On
Off
No
Yes
OTW
OT
UVLO
OVP
Vo_UV
NOTES:
The part turns off when VIN_OVP is high and VIN reaches 6.3V.
The PG is low when PG_LOHI is written to 1.
MP8843 Rev. 1.0
7/15/2016
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15
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
OPERATION
The MP8843 is a low-voltage, 3A, synchronous,
step-down converter with a controllable I2C
interface. The MP8843 uses constant-on-time
(COT) control with input voltage feed-forward to
stabilize the switching frequency over the entire
input range. Because it does not require
compensation, it has a simple design procedure.
The MP8843 integrates an I2C-compatible
interface that allows transfers up to 3.4Mbps.
This communication interface can scale the
voltage dynamically with voltage steps as small
as 3.9mV with an output voltage range of 0.6V to
1.1V. The interface can also control the voltage
transition slew rate.
Constant-on-Time (COT) Control
Compared to the fixed-frequency PWM control,
COT control simplifies the control loop and
speeds up the transient response. The MP8843
uses input voltage feed-forward to maintain a
nearly constant switching frequency across the
input and output voltage ranges. The switching
pulse on time can be estimated with Equation (1):
ON
VOUT 1
VIN fsw
(1)
To prevent inductor current runaway during the
load transient, the MP8843 has a fixed minimum
off time of 90ns. This minimum off time does not
affect steady-state operation in any way.
Light-Load Operation
Under light-load conditions, the MP8843’s I2C
interface uses power save mode. When the
MODE bit is “0,” the MP8843 enters power save
mode and uses a proprietary control scheme to
save power and improve efficiency. The MP8843
turns off the low-side switch when the inductor
current begins to reverse. Then the MP8843
works in discontinuous conduction mode (DCM).
Enable (EN)
When the input voltage exceeds the undervoltage lockout (UVLO) threshold (typically
2.35V), the MP8843 can be enabled by pulling
EN above 1.2V. Leave EN floating or pull EN
down to ground to disable the MP8843. There is
an internal 1MΩ resistor from EN to ground.
MP8843 Rev. 1.0
7/15/2016
Soft Start (SS)
The MP8843 has a built-in soft start (SS) that
ramps up the output voltage at a controlled slew
rate to prevent an overshoot at start-up. The
soft-start time is about 1ms, typically, when
VOUT is 0.9V.
Power Good (PG) Indictor
The MP8843 uses an open drain for the power
good (PG) indicator. When PG is able to detect
both the positive and negative excursion of VOUT
from the reference, PG is pulled up to VIN by
the external resistor when the OUT voltage is
within 85%~115% of the regulation voltage.
Otherwise, the internal MOSFET pulls PG to
ground. If PG is only able to detect a negative
voltage excursion of VOUT from the reference,
PG is pulled up to VIN when the OUT voltage is
higher than 115% of regulation voltage. The
MOSFET has a maximum RDS(ON) of less than
200Ω.
Current Limit
The MP8843 has a 4.8A high-side switch
current limit. When the high-side switch reaches
its current limit, the MP8843 turns off the highside switch until the low-side current drops to
3.8A. This prevents the inductor current from
continuing to rise and damaging components. If
the over-current status is continuous, the output
voltage falls and may trigger short-circuit
protection.
Short Circuit
The MP8843 monitors the output voltage
through OUT to detect an under-voltage
condition. The MP8843 enters a latch-off
protection mode when an output short occurs.
Only an EN or VIN restart can turn the MP8843
on again.
I2C Interface
The MP8843 can communicate with the core
via the I2C for smart design. The GUI control
interface is shown in Figure 2. The installation
process and usage can be found in the MP8843
software guide.
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16
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
Figure 2: MP8843 Control Interface
2
I C Address
The I2C slave address of the MP8843 is 0xD0H /
0xD1H. If another slave address is needed,
please contact the factory.
Table 2: I2C Slave Address
Hex
W 0xD0
R 0XD1
Address
A7 A6
1
1
1
1
0x68
A5
0
0
A4
1
1
A3
0
0
A2
0
0
A1
0
0
A0
R/
W
I2C Enable
The MP8843’s EN can start up and shut down
the convertor. The I2C’s EN can also control the
convertor. The Reg00 VSEL D7 bit is I2C-control
enabled. When writing D7 = 0, the convertor is
off. When writing D7 = 1, the convertor is on.
Both the external EN and I2C EN can control the
converter. The converter works only when both
EN pins are high.
MP8843 Rev. 1.0
7/15/2016
Output Voltage Select
The
MP8843
output
voltage
is
I2C
programmable. There is no need to set
feedback resistors to obtain a different output
voltage. The default output voltage is 0.9031V,
but can be set from 0.6V to 1.1V in 3.9mV steps
by the I2C. Change the output voltage with the
following steps:
1. Write the Go bit (Reg02 SyCntlreg2 [D5]) to
1. This action means the output voltage can
be set to another value that is not the default
Vo voltage.
2. Write the output reference bit (Reg00 VSEL
[D6:D0]). The output voltage can be
changed according to Table 1.
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17
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
Switching Frequency
The default switching frequency of the MP8843
is 1.67MHz. However, the frequency can also be
changed based on the application. By writing the
switching frequency bits (Reg01 SysCntlreg1
[D7:D5], the switching frequency can be
programmed as one of five possible values.
Their corresponding data can be found in Reg01
SysCntlreg1.
The SW has some jitter with low VIN and a
heavy load if the frequency is set to 2MHz. This
is because a low VIN and a high frequency make
the internal ramp ripple small. The internal noise
becomes larger under heavy-load conditions.
This produces little jitter on SW while VOUT is still
in regulation. The jitter is found in the conditions
shown in Figure 3.
3.05
3
2.95
2.9
2.85
2.8
2.5 3
3.5
4
4.5
5
5.5
6
Figure 3: Max IOUT for a Certain Input Voltage
For example, the SW has little jitter when VIN is
2.5V, VOUT is 0.7V and the output current is
bigger than 2.95A.
Power Good Configuration
The MP8843 has an option to use the PG_LOHI
function. This function can be written with the
PG_LOHI bit (Reg01 SysCntlreg1 [D2]). The
default value is 1. PGOOD can sense both a
positive and negative excursion of VOUT from the
reference. If writing this bit to 0, PGOOD can
only sense a negative voltage excursion of VOUT
from the reference.
MP8843 Rev. 1.0
7/15/2016
Input Over-Voltage Protection (OVP)
The MP8843 has an option to use the VIN OVP
function. This function can be written through
the VIN_OVP bit (Reg01 SysCntlreg1 [D1]).
When set as the default value 1, the VIN OVP
function is enabled. When the VIN voltage is
higher than 6.3V, the converter is disabled.
After VIN recovers to 6.05V, the converter
restarts. If the VIN_OVP bit is set to 0, VIN OVP
is disabled. The converter should not stop, even
if VIN exceeds its safe range.
Pulse Frequency Modulation (PFM) Mode
Selection
The
MP8843
uses
forced
continuous
conduction mode (CCM) and pulse frequency
modulation (PFM) mode. Writing the MODE bit
(Reg01 SysCntlreg1 [D0]) can change the work
mode. When the MODE bit is set to the default
value 1, forced CCM is selected. Considering
high efficiency at light load, PFM mode is
recommended. Set this bit to 0 to enable PFM
mode.
Output Discharge
The MP8843 has an output discharge function.
Write the Out-Dis bit (Reg02 SysCntlreg2 [D4])
to change the output discharge mode. The
default value is 0 and discharges VOUT by its
load when EN is low. Writing D4 = 1 can enable
the function, and then the output voltage can be
discharged by the internal pull-down resistance.
Output Voltage Transition Slew Rate
When the output voltage transitions from a low
voltage to a high voltage, or from a high voltage
to a low voltage, the transition slew rate can be
different.
There are eight possible selection values.
Through writing the slew rate bits (Reg02
SysCntlreg2 [D2:D0]), the transition slew rate
can be set as one possible value based on the
application. The internal reference follows the
set slew rate, but the output voltage slew rate
does not always follow the internal reference.
Considering the output capacitor and inductor,
the actual output voltage slew rate should be
slower.
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18
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
APPLICATION INFORMATION
Extending the Output Voltage Range
The MP8843 can extend the output voltage
range more than 1.1V by the external feedback
resistor network. The extended output range
ratio (Vo_max divided by Vo_min) is not more
than 1.8 (equal to 1.1V/0.6V).
4 5
R R
1
*
︵
F
E
L
A
E
R
T
U
O
︳
VR
V
The output voltage is determined by the
external feedback resistor networks (R4 and
R5) and the internal reference voltage (REF)
(see Figure 6). The internal reference is
controlled by the I2C and the initial VREF is 0.9V.
VOUT_REAL and VSTEP_REAL can be calculated with
Equation (2) and Equation (3):
︶
VSTEP _ REAL 3.9mV (1
R4
)
R5
(2)
(3)
For example, if VREF = 0.9V, R4 = 18k, and R5 =
57.6k, then VOUT_DEFAULT = 1.18V, VOUT_MIN =
0.79V, VOUT_MAX = 1.44V, and VSTEP_REAL =
5.1mV.
Generally, the sum of R4 and R5 is not more
than 100k. The I2C’s programmable feature still
works with an external feedback resistor. Only
the output voltage needs to multiply the same
ratio, as shown in Equation (2) and Equation
(3). The internal VOUT range is 0.6 - 1.1V, and
the output voltage range can be deduced by
Equation (2). The recommended maximum
VOUT is less than 1.8V in application.
Considering the efficiency and load regulation,
the recommended inductor DCR is lower than
15mΩ in the external feedback resistor network
application.
The real switching frequency increases with the
extended output voltage range circuit. The
switching frequency can be estimated with
Equation (4):
R4
(4)
FSW _ REAL (1
) FSW _ INTERNAL
R5
For example, if VREF = 0.9V, R4 = 18K, R5 =
57.6k, and FSW_INTERNAL = 1.67MHz, then the
estimated FSW_REAL = 2.19MHz.
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous and therefore requires a
capacitor to supply AC current to the step-down
converter while maintaining the DC input
voltage. Use low ESR capacitors for best
performance. Ceramic capacitors with X5R or
X7R dielectrics are highly recommended
because of their low ESR and small
temperature coefficients. For most applications,
a 10µF capacitor is sufficient. For higher output
voltages, a 47µF capacitor may be needed for
increased system stability.
Since the input capacitor absorbs the input
switching current, it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated with Equation (5):
IC ILOAD
VOUT VOUT
1
VIN
VIN
(5)
The worst-case condition occurs at VIN = 2VOUT,
shown in Equation (6):
IC
ILOAD
2
(6)
For simplification, choose the input capacitor
with an RMS current rating greater than half of
the maximum load current.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, a small, high-quality ceramic
capacitor (i.e.: 0.1μF) should be placed as close
to the IC as possible. When using ceramic
capacitors, ensure that they have enough
capacitance to provide a sufficient charge to
prevent excessive voltage ripple at the input.
The input voltage ripple caused by capacitance
can be estimated with Equation (7):
VIN
ILOAD
V V
OUT 1 OUT
fS C1 VIN
VIN
(7)
With the external feedback network, the output
discharge capability decreases correspondingly
because of the upper feedback resistor network.
MP8843 Rev. 1.0
7/15/2016
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19
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
Selecting the Output Capacitor
An output capacitor (COUT) is required to
maintain the DC output voltage. Low ESR
ceramic capacitors can be used to keep the
output ripple low. Generally, a 22μF output
ceramic capacitor is sufficient for most cases. In
higher output voltage conditions, a 47μF
capacitor may be required for system stability.
A larger output capacitor can result in a smaller
output voltage ripple. When using ceramic
capacitors, the impedance at the switching
frequency is dominated by the capacitance. The
output voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated with Equation
(8):
VOUT
VOUT
1
8 fS L1 C2
VIN
VOUT
2
(8)
In the case of tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated with
Equation (9):
VOUT
VOUT VOUT
1
RESR
fS L1
VIN
(9)
Figure 4: Recommended Layout
Design Example
Table 3 is a design example following the
application guidelines for the specifications
below:
Table 3: Design Example
5V
VIN
0.9V
VO
3A
IO
The detailed application schematic is shown in
Figure 5. The typical performance and circuit
waveforms are shown in the Typical
Performance Characteristics section. For more
device applications, please refer to the related
evaluation board datasheets.
The characteristics of the output capacitor also
affect the stability of the regulation system.
PCB Layout Guidelines
Proper layout of the switching power supplies is
critical for proper operation, especially for the
high-switching converter. If the layout is not
carefully done, the regulator could show poor
line or load regulation and stability issues. For
best results, refer to Figure 4 and follow the
guidelines below.
1. Place the high-speed, step-down regulator,
and input capacitor as close to the IC pins
as possible.
2. Ensure that the two ends of the capacitor
are connected to VIN and GND directly if
the 0805 size ceramic capacitor is used.
MP8843 Rev. 1.0
7/15/2016
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20
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
TYPICAL APPLICATION CIRCUITS
Figure 5: VOUT Range Adjusted from 0.6V to 1.1V
R1 100K
VIN
GND
U1
C1
22µF
VIN
R2
100K
PVIN
VOUT 0.79-1.44V
PG
1µH
EN
EN
Default 1.18V
SW
R4 18 K
C2
OUT
I2 C Bus
Up to3.4 Mbps
{
SCL
SDA
AGND
PGND
10µF
C3
10µF
C4
10µF
R5 57.6K
Figure 6: VOUT Range Extended by External Feedback Resistor Network
NOTE:
For other default VOUT settings, fix R4 at first and calculate R5 based on the formula V
OUT
MP8843 Rev. 1.0
7/15/2016
0.9V
R4 R5 .
R5
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21
MP8843 – 6V, 3A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH I2C INTERFACE
PACKAGE INFORMATION
QFN-12 (2mmx2mm)
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP8843 Rev. 1.0
7/15/2016
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22