Supervisory Circuits with Watchdog and Manual Reset in 5-Lead SOT-23 ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 FEATURES FUNCTIONAL BLOCK DIAGRAMS ADM8316 VCC VCC RESET GENERATOR VREF MR RESET DEBOUNCE WATCHDOG DETECTOR GND 11779-001 26 reset threshold options 2.5 V to 5 V in 100 mV increments 4 reset timeout options 1 ms, 20 ms, 140 ms, and 1120 ms (minimum) 4 watchdog timeout options 6.3 ms, 102 ms, 1.6 sec, and 25.6 sec (typical) Manual reset input Multiple reset output options Low power consumption Specified over wide temperature range (−40°C to +125°C) Qualified for automotive applications 5-lead SOT-23 package WDI Figure 1. ADM8316 APPLICATIONS ADM8320 Automotive infotainment Microprocessor systems Computers Controllers Intelligent instruments Portable equipment VCC RESET GENERATOR VREF MR RESET DEBOUNCE WATCHDOG DETECTOR GND WDI 11779-002 Data Sheet Figure 2. ADM8320 GENERAL DESCRIPTION The ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ ADM8322 are supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessorbased systems. As well as providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. A reset signal can also be asserted by an external push-button switch through a manual reset input. The six devices feature different combinations of watchdog input, manual reset input, and output stage configuration, as shown in Table 6. Rev. 0 Each device is available in a choice of 26 reset threshold options ranging from 2.5 V to 5 V in 100 mV increments. There are also four reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms (minimum) and four watchdog timeout options of 6.3 ms, 102 ms, 1.6 sec, and 25.6 sec (typical). The ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ ADM8322 are available in 5-lead SOT-23 packages and typically consume only 10 µA, making them suitable for use in low power, portable applications. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Open-Drain RESET Output ..................................................... 10 Applications ....................................................................................... 1 Manual Reset Input .................................................................... 10 Functional Block Diagrams ............................................................. 1 Watchdog Input .......................................................................... 10 General Description ......................................................................... 1 Applications Information .............................................................. 11 Revision History ............................................................................... 2 Watchdog Input Current ........................................................... 11 Specifications..................................................................................... 3 Negative Going VCC Transients................................................. 11 Absolute Maximum Ratings............................................................ 5 Ensuring Reset Valid to VCC = 0 V ........................................... 11 ESD Caution .................................................................................. 5 Watchdog Software Considerations ......................................... 11 Pin Configurations and Function Descriptions ........................... 6 Options ............................................................................................ 12 Typical Performance Characteristics ............................................. 7 Outline Dimensions ....................................................................... 14 Theory of Operation ...................................................................... 10 Ordering Guide .......................................................................... 14 Circuit Description..................................................................... 10 Automotive Products ................................................................. 15 Push-Pull Reset Output ............................................................. 10 REVISION HISTORY 10/13—Revision 0: Initial Version Rev. 0 | Page 2 of 16 Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 SPECIFICATIONS VCC = (VTH + 1.5%) to 5.5 V, TA = −40°C to +125°C, unless otherwise noted. Typical values are at TA = 25°C. Table 1. Parameter SUPPLY VCC Operating Voltage Range 1 VCC that Guarantees Valid Output Supply Current (WDI Floating) RESET THRESHOLD VOLTAGE 2 RESET THRESHOLD TEMPERATURE COEFFICIENT RESET THRESHOLD HYSTERESIS RESET TIMEOUT PERIOD Reset Timeout Option A Reset Timeout Option B Reset Timeout Option C Reset Timeout Option D VCC TO RESET DELAY, tRD PUSH-PULL OUTPUT (ADM8316, ADM8318, ADM8319, ADM8321, ADM8322) RESET Output Voltage Min Typ 0.9 0.9 VTH − 1% VTH − 1.5% Max Unit Test Conditions/Comments 5.5 V V µA µA V V ppm/°C mV VCC = 5.5 V VCC = 3.6 V TA = 25°C TA = −40°C to +125°C 10 10 VTH VTH 20 2.5 × VTH 20 18 VTH + 1% VTH + 1.5% 1.4 28 200 1600 90 1.8 36 260 2080 See Table 7 1 20 140 1120 0.2 0.2 0.2 0.3 0.9 × VCC 0.9 × VCC 50 RESET Rise Time RESET Output Voltage 100 V V V V V V ns 0.2 0.3 V V V V 0.2 0.2 0.2 0.3 1 V V V V µA 6.3 102 1.6 25.6 8.1 132 2.24 33.2 35 0.7 × VCC 100 ms ms sec sec ns V µA 0.9 × VCC 0.9 × VCC OPEN-DRAIN OUTPUT (ADM8320, ADM8321, ADM8322) RESET Output Voltage Open-Drain Reset Output Leakage Current WATCHDOG INPUT (ADM8316, ADM8318, ADM8320, ADM8321) Watchdog Timeout Period, tWD Watchdog Timeout Option W Watchdog Timeout Option X Watchdog Timeout Option Y Watchdog Timeout Option Z WDI Pulse Width WDI Input Threshold WDI Input Current ms ms ms ms µs VCC falling at 1 mV/µs VCC ≥ 0.9 V, ISINK = 25 µA VCC ≥ 1.2 V, ISINK = 100 µA VCC ≥ 2.7 V, ISINK = 1.2 mA VCC ≥ 4.5 V, ISINK = 3.2 mA VCC ≥ 2.7 V, ISOURCE = 500 µA VCC ≥ 4.5 V, ISOURCE = 800 µA From 10% to 90% VCC, CL = 5 pF, VCC = 3.3 V VCC ≥ 2.7 V, ISINK = 1.2 mA VCC ≥ 4.5 V, ISINK = 3.2 mA VCC ≥ 2.7 V, ISOURCE = 500 µA VCC ≥ 4.5 V, ISOURCE = 800 µA VCC ≥ 0.9 V, ISINK = 25 µA VCC ≥ 1.2 V, ISINK = 100 µA VCC ≥ 2.7 V, ISINK = 1.2 mA VCC ≥ 4.5 V, ISINK = 3.2 mA See Table 8 4.5 72 1.12 18.0 50 0.3 × VCC Rev. 0 | Page 3 of 16 VIL = 0.3 × VCC, VIH = 0.7 × VCC ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Parameter MANUAL RESET INPUT (ADM8316, ADM8319, ADM8320, ADM8322) VIL VIH MR Input Pulse Width MR Glitch Rejection MR Pull-Up Resistance MR to Reset Delay 1 2 Min Typ Max Unit Test Conditions/Comments 0.8 V V µs ns kΩ ns VCC = 5 V 2.0 1 35 100 75 350 Data Sheet 125 The device switches from undervoltage reset to normal operation when 1.5 V < VCC < 2.5 V. The device monitors VCC through an internal factory trimmed voltage divider that programs the nominal reset threshold. Factory-trimmed reset thresholds are available in approximately 100 mV increments from 2.5 V to 5 V. Rev. 0 | Page 4 of 16 Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 2. Parameter VCC All Other Pins Output Current (RESET, RESET) Operating Temperature Range Storage Temperature Range θJA Thermal Impedance, SOT-23 Lead Temperature Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) Rating −0.3 V to +6 V −0.3 V to (VCC + 0.3 V) 20 mA −40°C to +125°C −65°C to +150°C 270°C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION 300°C 215°C 220°C Rev. 0 | Page 5 of 16 ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet RESET 1 GND 2 MR 3 ADM8316/ ADM8320 TOP VIEW (Not to Scale) 5 VCC 4 WDI 11779-003 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 3. ADM8316/ADM8320 Pin Configuration Table 3. ADM8316/ADM8320 Pin Function Descriptions Mnemonic RESET 2 3 GND MR 4 WDI 5 VCC Description Active Low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. This pin is a push-pull output stage for the ADM8316 and an open-drain output stage for the ADM8320. Ground. Manual Reset Input. This is an active low input that, when forced low for greater than the glitch filter time, generates a reset. It features a 75 kΩ internal pull-up resistor. Watchdog Input. Generates a reset if the logic level on the pin remains low or high for the duration of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is generated. Leave this pin floating to disable the watchdog timer. Power Supply Voltage Being Monitored. RESET 1 GND 2 RESET 3 ADM8318/ ADM8321 TOP VIEW (Not to Scale) 5 VCC 4 WDI 11779-004 Pin No. 1 Figure 4. ADM8318/ADM8321 Pin Configuration Table 4. ADM8318/ADM8321 Pin Function Descriptions Mnemonic RESET 2 3 4 GND RESET WDI 5 VCC Description Active Low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. This pin is a push-pull output stage for the ADM8318 and an open-drain output stage for the ADM8321. Ground. Active High Push-Pull Reset Output. Watchdog Input. Generates a reset if the logic level on the pin remains low or high for the duration of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is generated. Leave this pin floating to disable the watchdog timer. Power Supply Voltage Being Monitored. RESET 1 GND 2 RESET 3 ADM8319/ ADM8322 TOP VIEW (Not to Scale) 5 VCC 4 MR 11779-005 Pin No. 1 Figure 5. ADM8319/ADM8322 Pin Configuration Table 5. ADM8319/ADM8322 Pin Function Descriptions Pin No. 1 Mnemonic RESET 2 3 4 GND RESET MR 5 VCC Description Active low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. This pin is a push-pull output stage for the ADM8319 and an open-drain output stage for the ADM8322. Ground. Active High Push-Pull Reset Output. Manual Reset Input. This is an active low input that, when forced low for greater than the glitch filter time, generates a reset. It features a 75 kΩ internal pull-up resistor. Power Supply Voltage Being Monitored. Rev. 0 | Page 6 of 16 Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 TYPICAL PERFORMANCE CHARACTERISTICS 14 100 13 90 12 VCC TO RESET DELAY (µs) 10 VCC = 3.0V 9 ICC (µA) 80 VCC = 5.0V 11 8 VCC = 1.5V 7 6 5 4 3 70 VTH = 5V 60 VTH = 2.93V 50 VTH = 2.5V 40 30 20 2 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 0 –40 11779-006 0 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) Figure 6. Supply Current (ICC) vs. Temperature 11779-009 10 1 Figure 9. VCC to Reset Delay vs. Temperature 12 500 450 10 PROPAGATION DELAY (ns) 400 ICC (µA) 8 6 4 VTH = 2.5V 350 VTH = 2.93V 300 250 VTH = 5V 200 150 100 2 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 VCC (V) 0 –40 0 20 40 60 80 100 120 TEMPERATURE (°C) Figure 10. Manual Reset to Reset Propagation Delay vs. Temperature Figure 7. Supply Current (ICC) vs. Supply Voltage (VCC) 1.05 1.20 1.04 NORMALIZED RESET TIMEOUT 1.15 1.03 1.02 1.01 1.00 0.99 0.98 0.97 1.10 1.05 1.00 0.95 0.90 0.85 0.96 0.95 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) 120 0.80 –40 11779-008 NORMALIZED RESET THRESHOLD –20 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) Figure 11. Normalized Reset Timeout vs. Temperature Figure 8. Normalized Reset Threshold vs. Temperature Rev. 0 | Page 7 of 16 11779-011 0 11779-007 0 11779-010 50 ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 9 1.20 8 NEGATIVE PULSE 1.15 MINIMUM PULSE WIDTH (ns) NORMALIZED WATCHDOG TIMEOUT Data Sheet 1.10 1.05 1.00 7 6 POSITIVE PULSE 5 4 3 2 0.95 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 0 –40 11779-012 0.90 –40 40 60 80 0.308 100 120 ISINK = 3.2mA ISINK = 800µA 140 0.258 VTH = 2.93V 120 RESET VOLTAGE (V) VTH = 5V 100 80 VTH = 4.63V 60 0.208 0.158 0.108 40 100 1000 OVERDRIVE VOLTAGE (mV) Figure 13. Maximum VCC Transient Duration vs. RESET Threshold Overdrive 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 VCC VOLTAGE (V) Figure 16. RESET Open-Drain VOL Voltage vs. VCC Voltage (VTH = 3 V) 0.30 ISINK = 3.2mA ISINK = 800µA 0.25 RESET VOLTAGE (V) VTH = 2.93V VTH = 2.5V 0.20 0.15 0.10 VTH = 5V –20 0 20 40 60 TEMPERATURE (°C) 80 100 120 0 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 VCC VOLTAGE (V) Figure 17. RESET Push-Pull VOL Voltage vs. VCC Voltage (VTH = 4 V) Figure 14. Manual Reset (MR) Minimum Pulse Width vs. Temperature Rev. 0 | Page 8 of 16 11779-017 0.05 11779-014 850 840 830 820 810 800 790 780 770 760 750 740 730 720 710 700 690 680 670 660 650 –40 0.008 1.1 11779-016 0.058 20 11779-013 MAXIMUM TRANSIENT DURATION (µs) 20 Figure 15. Watchdog Input Minimum Pulse Width vs. Temperature RESET ASSERTED ABOVE CURVE 0 10 MR MINIMUM PULSE WIDTH (ns) 0 TEMPERATURE (°C) Figure 12. Normalized Watchdog Timeout vs. Temperature 160 –20 11779-015 1 Data Sheet 3.5 ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 25 ISOURCE = 3.2mA ISOURCE = 800µA 24 3.0 RISE TIME (ns) 2.0 1.5 22 21 20 19 1.0 18 0.5 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 VCC VOLTAGE (V) 16 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 VCC VOLTAGE (V) Figure 19. RESET Push-Pull Rise Time vs. VCC Voltage Figure 18. RESET Push-Pull VOH Voltage vs. VCC Voltage (VTH = 3 V) Rev. 0 | Page 9 of 16 11779-019 0 1.1 17 11779-018 RESET VOLTAGE (V) 23 2.5 ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet THEORY OF OPERATION CIRCUIT DESCRIPTION MANUAL RESET INPUT The ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ ADM8322 provide microprocessor supply voltage supervision by controlling the microprocessor reset input. Code execution errors are avoided during power-up, power-down, and brownout conditions by asserting a reset signal when the supply voltage is below a preset threshold and by allowing supply voltage stabilization with a fixed timeout reset delay after the supply voltage rises above the threshold. In addition, problems with microprocessor code execution can be monitored and corrected with a watchdog timer (ADM8316/ADM8318/ ADM8320/ADM8321). If the user detects a problem with system operation, a manual reset input is available (ADM8316/ ADM8319/ADM8320/ADM8322) to reset the microprocessor, for example, by means of an external push-button switch. The ADM8316/ADM8319/ADM8320/ADM8322 feature a manual reset input (MR), which when driven low, asserts the reset output. When MR transitions from low to high, the reset remains asserted for the duration of the reset active timeout period before deasserting. The MR input has a 75 kΩ, internal pull-up resistor so that the input is always high when unconnected. An external push-button switch can be connected between MR and ground so that the user can generate a reset. Debounce circuitry for this purpose is integrated on chip. Noise immunity is provided on the MR input, and fast, negative going transients of up to 100 ns (typical) are ignored. A 0.1 μF capacitor between MR and ground provides additional noise immunity. PUSH-PULL RESET OUTPUT The ADM8316/ADM8318/ADM8320/ADM8321 feature a watchdog timer that monitors microprocessor activity. A timer circuit is cleared with every low-to-high or high-to-low logic transition on the watchdog input pin (WDI), which detects pulses as short as 50 ns. If the timer counts through the preset watchdog timeout period (tWD), a reset is asserted. The microprocessor is required to toggle the WDI pin to avoid asserting the reset pin. Failure of the microprocessor to toggle WDI within the timeout period, therefore, indicates a code execution error, and the reset pulse generated restarts the microprocessor in a known state. The reset output is asserted when VCC is below the reset threshold (VTH), when MR is driven low, or when WDI is not serviced within the watchdog timeout period (tWD). The reset output remains asserted for the duration of the reset active timeout period (tRP) after VCC rises above the reset threshold, after MR transitions from low to high, or after the watchdog timer times out. Figure 20 illustrates the behavior of the reset outputs. VCC VCC VTH VTH 1V 0V As well as logic transitions on WDI, the watchdog timer is also cleared by a reset assertion due to an undervoltage condition on VCC or due to MR being pulled low. When a reset asserts, the watchdog timer clears and does not begin counting again until the reset deassserts. The watchdog timer can be disabled by leaving WDI floating or by tristating the WDI driver. VCC tRP 0V RESET VCC 1V 0V VCC tRD RESET tRP tRD 11779-020 RESET Figure 20. Reset Timing Diagram VCC 1V 0V VCC 0V WDI VTH tRP tWD VCC 0V Figure 21. Watchdog Timing Diagram OPEN-DRAIN RESET OUTPUT The ADM8320/ADM8321/ADM8322 have an active low, opendrain reset output. This output structure requires an external pull-up resistor to connect the reset output to a voltage rail no higher than VCC. A resistor that complies with the logic low and logic high voltage level requirements of the microprocessor while supplying input current and leakage paths on the RESET line is recommended. A 10 kΩ resistor is adequate in most situations. Rev. 0 | Page 10 of 16 tRP 11779-021 The ADM8316 features an active low push-pull reset output, whereas the ADM8321/ADM8322 have active high push-pull reset outputs. The ADM8318/ADM8319 feature dual active low and active high push-pull reset outputs. For active low and active high outputs, the reset signal is guaranteed to be valid for VCC down to 0.9 V. WATCHDOG INPUT Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 APPLICATIONS INFORMATION WATCHDOG INPUT CURRENT WATCHDOG SOFTWARE CONSIDERATIONS To minimize the watchdog input current, leave WDI low for the majority of the watchdog timeout period. When driven high, WDI can draw as much as 100 µA. Pulsing WDI low to high to low at a low duty cycle reduces the effect of the large input current. When WDI is unconnected, a window comparator disconnects the watchdog timer from the reset output circuitry so that a reset is not asserted when the watchdog timer times out. In implementing the microprocessor watchdog strobe code, quickly switching WDI low to high and then high to low (minimizing WDI high time) is desirable for current consumption reasons. However, a more effective way of using the watchdog function can be considered. NEGATIVE GOING VCC TRANSIENTS To avoid unnecessary resets caused by fast power supply transients, the ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ ADM8322 are equipped with glitch rejection circuitry. The typical performance characteristic in Figure 13 plots VCC transient duration vs. reset threshold overdrive. The curves show combinations of reset threshold overdrive and duration for which a reset is not generated for 5 V, 4.63 V, and 2.93 V reset threshold devices. For example, with the 2.93 V threshold, a transient that goes 100 mV below the threshold and lasts 80 µs typically does not cause a reset, but if the transient is any larger in reset threshold overdrive or duration, a reset generates. An optional 0.1 µF bypass capacitor mounted near VCC provides additional glitch rejection. A low to high to low WDI pulse within a given subroutine prevents the watchdog from timing out. However, if the subroutine becomes stuck in an infinite loop, the watchdog cannot detect this because the subroutine continues to toggle WDI. A more effective coding scheme for detecting this error involves using a slightly longer watchdog timeout. In the program that calls the subroutine, WDI is set high. The subroutine sets WDI low when it is called. If the program executes without error, WDI is toggled high and low with every loop of the program. If the subroutine enters an infinite loop, WDI is kept low, the watchdog times out, and the microprocessor is reset (see Figure 23). ENSURING RESET VALID TO VCC = 0 V START SET WDI HIGH RESET PROGRAM CODE SUBROUTINE SET WDI LOW RETURN Figure 23. Watchdog Flow Diagram VCC VCC VCC RESET 100kΩ 100kΩ ADM8318/ ADM8319/ ADM8321/ ADM8322 MR WDI RESET MICROPROCESSOR I/O 11779-024 RESET ADM8316 RESET 11779-022 ADM8316/ ADM8318/ ADM8319 INFINITE LOOP: WATCHDOG TIMES OUT 11779-023 Both active low and active high reset outputs are guaranteed to be valid for VCC as low as 0.9 V. However, by using an external resistor with push-pull configured reset outputs, valid outputs for VCC as low as 0 V are possible. For an active low reset output, a resistor connected between RESET and ground pulls the output low when it is unable to sink current. For an active high reset output, a resistor connected between RESET and VCC pulls the output high when it is unable to source current. Use a large resistance, such as 100 kΩ, so that it does not overload the reset output when VCC is greater than 0.9 V. Figure 22. Ensuring Reset Valid to VCC = 0 V Rev. 0 | Page 11 of 16 Figure 24. Typical Application Circuit ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet OPTIONS Table 6. Selection Table Output Stage Device No. ADM8316 ADM8318 ADM8319 ADM8320 ADM8321 ADM8322 Watchdog Yes Yes No Yes Yes No Manual Reset Yes No Yes Yes No Yes RESET Typical 1.4 28 200 1600 Maximum 1.8 36 260 2080 Unit ms ms ms ms Typical 6.3 102 1.6 25.6 Maximum 8.1 132 2.24 33.2 Unit ms ms sec sec RESET No Push-pull Push-pull No Push-pull Push-pull Push-pull Push-pull Push-pull Open-drain Open-drain Open-drain Table 7. Reset Timeout Options Suffix A B C D Minimum 1 20 140 1120 Table 8. Watchdog Timeout Options Suffix W X Y Z Minimum 4.5 72 1.12 18.0 Table 9. Reset Voltage Threshold Options Reset Threshold Number 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 Minimum 4.950 4.851 4.752 4.653 4.584 4.455 4.346 4.257 4.158 4.059 3.960 3.861 3.762 3.663 3.564 3.465 3.366 3.267 3.168 3.049 2.970 2.901 2.772 2.673 2.604 2.475 TA = 25°C Typical 5.000 4.900 4.800 4.700 4.630 4.500 4.390 4.300 4.200 4.100 4.00 3.900 3.800 3.700 3.600 3.500 3.400 3.300 3.200 3.080 3.000 2.930 2.800 2.700 2.630 2.500 Maximum 5.050 4.949 4.848 4.747 4.676 4.545 4.434 4.343 4.242 4.141 4.040 3.939 3.838 3.737 3.636 3.535 3.434 3.333 3.232 3.111 3.030 2.959 2.828 2.727 2.656 2.525 Rev. 0 | Page 12 of 16 Minimum 4.925 4.826 4.728 4.629 4.560 4.432 4.324 4.235 4.137 4.038 3.940 3.841 3.743 3.644 3.546 3.447 3.349 3.250 3.152 3.033 2.955 2.886 2.758 2.659 2.590 2.462 TA = −40°C to +125°C Maximum 5.075 4.974 4.872 4.771 4.700 4.568 4.456 4.365 4.263 4.162 4.060 3.959 3.857 3.756 3.654 3.553 3.451 3.350 3.248 3.127 3.045 2.974 2.842 2.741 2.670 2.538 Unit V V V V V V V V V V V V V V V V V V V V V V V V V V Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Table 10. Standard Models Model ADM8316WBX30ARJZR7 ADM8316WBX46ARJZR7 ADM8318WCY46ARJZR7 ADM8319WB31ARJZR7 ADM8320WCY29ARJZR7 ADM8321WAY30ARJZR7 ADM8321WCY46ARJZR7 ADM8322WC46ARJZR7 Reset Threshold (V) 3 4.63 4.63 3.08 2.93 3 4.63 4.63 Minimum Reset Timeout (ms) 20 20 140 20 140 1 140 140 Rev. 0 | Page 13 of 16 Typical Watchdog Timeout (sec) 0.102 0.102 1.6 Not applicable 1.6 1.6 1.6 Not applicable ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet OUTLINE DIMENSIONS 3.00 2.90 2.80 5 1.70 1.60 1.50 4 1 2 3.00 2.80 2.60 3 0.95 BSC 1.90 BSC 1.45 MAX 0.95 MIN 0.15 MAX 0.05 MIN 0.50 MAX 0.35 MIN 0.20 MAX 0.08 MIN SEATING PLANE 10° 5° 0° 0.60 BSC 0.55 0.45 0.35 COMPLIANT TO JEDEC STANDARDS MO-178-AA 11-01-2010-A 1.30 1.15 0.90 Figure 25. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters ADM83 _ _ W_ _ _ _ ARJZR7 ORDERING QUANTITY R7: 3000-PIECE REEL, RoHS COMPLIANT GENERIC NUMBER (16 TO 22) Z: RoHS COMPLIANT W: AUTOMOTIVE QUAL PACKAGE CODE RJ: 5-LEAD SOT-23 RESET TIMEOUT PERIOD A: 1ms (MIN) B: 20ms (MIN) C: 140ms (MIN) D: 1120ms (MIN) TEMPERATURE RANGE A: –40°C TO +125°C RESET THRESHOLD NUMBER (25 TO 50) 11779-025 WATCHDOG TIMEOUT PERIOD W: 6.3ms (TYP) X: 102ms (TYP) Y: 1.6sec (TYP) Z: 25.6sec (TYP) Figure 26. Ordering Code Structure ORDERING GUIDE Model 1, 2, 3, 4 ADM8316WxxxxARJZR7 ADM8318WxxxxARJZR7 ADM8319WxxxARJZR7 ADM8320WxxxxARJZR7 ADM8321WxxxxARJZR7 ADM8322WxxxARJZR7 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Ordering Quantity 5 3,000 3,000 3,000 3,000 3,000 3,000 Package Description 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 Package Option RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 Branding LMT LMW LMV LMX LMY LMZ Complete the ordering code by inserting the reset timeout, watchdog timeout, and reset threshold (ADM8316/ADM8318/ADM8320/ADM8321) suffixes from Table 7 to Table 9. No watchdog timeout is available for ADM8319/ADM8322. Contact sales for the availability of nonstandard models. See Table 10 for a list of standard models. 3 Z = RoHS Compliant Part. 4 W = Qualified for Automotive Applications. 5 A minimum of 12,000 (four reels) must be ordered for nonstandard models. 1 2 Rev. 0 | Page 14 of 16 Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 AUTOMOTIVE PRODUCTS The ADM8316W/ADM8318W/ADM8319W/ADM8320W/ADM8321W/ADM8322W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. Rev. 0 | Page 15 of 16 ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 NOTES ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11779-0-10/13(0) Rev. 0 | Page 16 of 16 Data Sheet