Intersil ISL83077EIBZA ±15kv esd protected, 3.3v, full fail-safe, low power, high speed or slew rate limited, rs-485/rs-422 transceiver Datasheet

ISL83070E, ISL83071E, ISL83072E, ISL83073E,
ISL83075E, ISL83076E, ISL83077E, ISL83078E
®
Data Sheet
March 21, 2006
±15kV ESD Protected, 3.3V, Full Fail-safe,
Low Power, High Speed or Slew Rate
Limited, RS-485/RS-422 Transceivers
The Intersil ISL8307XE are BiCMOS 3.3V powered, single
transceivers that meet both the RS-485 and RS-422
standards for balanced communication. These devices have
very low bus currents (+125µA/-100µA), so they present a
true “1/8 unit load” to the RS-485 bus. This allows up to 256
transceivers on the network without violating the RS-485
specification’s 32 unit load maximum, and without using
repeaters. For example, in a remote utility meter reading
system, individual meter readings are routed to a concentrator
via an RS-485 network, so the high allowed node count
minimizes the number of repeaters required.
Receiver (Rx) inputs feature a “Full Fail-Safe” design, which
ensures a logic high Rx output if Rx inputs are floating,
shorted, or terminated but undriven.
FN6115.3
Features
• Pb-Free Plus Anneal (RoHS Compliant)
• RS-485 I/O Pin ESD Protection . . . . . . . . . . . . . ±15kV HBM
- Class 3 ESD Level on all Other Pins . . . . . . >7kV HBM
• Full Fail-safe (Open, Short, Terminated/Floating)
Receivers
• Hot Plug - Tx and Rx Outputs Remain Three-state During
Power-up
• True 1/8 Unit Load Allows up to 256 Devices on the Bus
• Single 3.3V Supply
• High Data Rates . . . . . . . . . . . . . . . . . . . . . . up to 20Mbps
• Low Quiescent Supply Current . . . . . . . . . . .800µA (Max)
- Ultra Low Shutdown Supply Current . . . . . . . . . . .10nA
• -7V to +12V Common Mode Input/Output Voltage Range
Hot Plug circuitry ensures that the Tx and Rx outputs remain
in a high impedance state while the power supply stabilizes.
• Half and Full Duplex Pinouts
The ISL83070E through ISL83075E utilize slew rate limited
drivers which reduce EMI, and minimize reflections from
improperly terminated transmission lines, or unterminated
stubs in multidrop and multipoint applications. Slew rate limited
versions also include receiver input filtering to enhance noise
immunity in the presence of slow input signals.
• Current Limiting and Thermal Shutdown for driver
Overload Protection
The ISL83070E, ISL83071E, ISL83073E, ISL83076E,
ISL83077E are configured for full duplex (separate Rx input
and Tx output pins) applications. The half duplex versions
multiplex the Rx inputs and Tx outputs to allow transceivers
with output disable functions in 8 lead packages.
• Three State Rx and Tx Outputs Available
• Tiny MSOP package offering saves 50% board space
Applications
• Automated Utility Meter Reading Systems
• High Node Count Systems
• Field Bus Networks
• Security Camera Networks
• Building Environmental Control/ Lighting Systems
• Industrial/Process Control Networks
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
HALF/FULL DATA RATE SLEW-RATE
DUPLEX
(Mbps)
LIMITED?
HOT
PLUG?
# DEVICES
ON BUS
RX/TX
ENABLE?
QUIESCENT
ICC (µA)
LOW POWER
SHUTDOWN?
PIN
COUNT
ISL83070E
FULL
0.25
YES
YES
256
YES
510
YES
14
ISL83071E
FULL
0.25
YES
YES
256
NO
510
NO
8
ISL83072E
HALF
0.25
YES
YES
256
YES
510
YES
8
ISL83073E
FULL
0.5
YES
YES
256
YES
510
YES
14
ISL83075E
HALF
0.5
YES
YES
256
YES
510
YES
8
ISL83076E
FULL
20
NO
YES
256
YES
510
YES
14
ISL83077E
FULL
20
NO
YES
256
NO
510
NO
8
ISL83078E
HALF
20
NO
YES
256
YES
510
YES
8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Pinouts
RO 1
R
RE 2
DE 3
DI 4
D
8
VCC
VCC 1
7
B/Z
RO 2
6
A/Y
5
GND
ISL83070E, ISL83073E, ISL83076E
(SOIC)
TOP VIEW
ISL83071E, ISL83077E
(SOIC)
TOP VIEW
ISL83072E, ISL83075E, ISL83078E
(MSOP, SOIC)
TOP VIEW
R
DI 3
GND 4
D
8
A
7
B
6
Z
5
Y
14 VCC
NC 1
RO 2
13 NC
R
RE 3
11 B
DE 4
DI 5
Ordering Information (Notes 1, 2)
PART NO.
PART
MARKING
TEMP.
RANGE
(°C)
PACKAGE
(Pb-Free)
12 A
10 Z
D
GND 6
9 Y
GND 7
8 NC
Truth Tables
PKG.
DWG. #
ISL83070EIBZA 83070EIBZ
-40 to 85 14 Ld SOIC M14.15
ISL83071EIBZA 83071EIBZ
-40 to 85 8 Ld SOIC
M8.15
ISL83072EIBZA 83072EIBZ
-40 to 85 8 Ld SOIC
M8.15
ISL83072EIUZA 3072Z
-40 to 85 8 Ld MSOP M8.118
ISL83073EIBZA 83073EIBZ
-40 to 85 14 Ld SOIC M14.15
ISL83075EIBZA 83075EIBZ
-40 to 85 8 Ld SOIC
ISL83075EIUZA 3075Z
-40 to 85 8 Ld MSOP M8.118
ISL83076EIBZA 83076EIBZ
-40 to 85 14 Ld SOIC M14.15
ISL83077EIBZA 83077EIBZ
-40 to 85 8 Ld SOIC
M8.15
ISL83078EIBZA 83078EIBZ
-40 to 85 8 Ld SOIC
M8.15
ISL83078EIUZA 3078Z
-40 to 85 8 Ld MSOP M8.118
TRANSMITTING
INPUTS
RE
DE
DI
Z
Y
X
1
1
0
1
X
1
0
1
0
0
0
X
High-Z
High-Z
1
0
X
High-Z *
High-Z *
M8.15
NOTES:
1. Units also available in Tape and Reel; Add “-T” to suffix.
2. Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and
100% matte tin plate termination finish, which are RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the
Pb-free requirements of IPC/JEDEC J STD-020.
OUTPUTS
NOTE: *Shutdown Mode (See Note 9), except for ISL83071E/77E
RECEIVING
INPUTS
RE
DE
DE
Half Duplex Full Duplex
OUTPUT
A-B
RO
0
0
X
≥ -0.05V
1
0
0
X
≤ -0.2V
0
0
0
X
Inputs
Open/Shorted
1
1
0
0
X
High-Z *
1
1
1
X
High-Z
NOTE: *Shutdown Mode (See Note 9), except for ISL83071E/77E
2
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Pin Descriptions
PIN
FUNCTION
RO
Receiver output: If A-B ≥ -50mV, RO is high; If A-B ≤ -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted.
RE
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable function isn’t used,
connect RE directly to GND or through a 1kΩ to 3kΩ resistor to GND.
DE
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and are high impedance when DE is low. If the
Tx enable function isn’t used, connect DE to VCC through a 1kΩ to 3kΩ resistor.
DI
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
GND
Ground connection.
A/Y
±15kV HBM ESD Protected RS-485/422 level, noninverting receiver input and noninverting driver output. Pin is an input if DE = 0;
pin is an output if DE = 1.
B/Z
±15kV HBM ESD Protected RS-485/422 level, Inverting receiver input and inverting driver output. Pin is an input if DE = 0; pin is an
output if DE = 1.
A
±15kV HBM ESD Protected RS-485/422 level, noninverting receiver input.
B
±15kV HBM ESD Protected RS-485/422 level, inverting receiver input.
Y
±15kV HBM ESD Protected RS-485/422 level, noninverting driver output.
Z
±15kV HBM ESD Protected RS-485/422 level, inverting driver output.
VCC
System power supply input (3.0V to 3.6V).
NC
No Connection.
3
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Typical Operating Circuits
ISL83072E, ISL83075E, ISL83078E
+3.3v
+3.3v
+
8
0.1µF
0.1µF
+
8
VCC
1 RO
VCC
R
D
2 RE
B/Z
7
3 DE
A/Y
6
4 DI
RT
RT
DI 4
7
B/Z
DE 3
6
A/Y
RE 2
RO 1
R
D
GND
GND
5
5
ISL83071E, ISL83077E
+3.3v
+3.3v
+
1
0.1µF
0.1µF
+
1
VCC
RT
A 8
2 RO
3 DI
VCC
R
B 7
RT
Z 6
Y
6
Z
D
7 B
Y 5
D
5
RO 2
R
8 A
GND
GND
4
4
DI 3
ISL83070E, ISL83073E, ISL83076E
+3.3v
+3.3v
+
14
VCC
2 RO
R
A 12
0.1µF
0.1µF
RT
+
14
VCC
9 Y
B 11
D
10 Z
3 RE
DE 4
RE 3
4 DE
5 DI
DI 5
Z 10
Y 9
D
GND
6, 7
4
RT
11 B
R
12 A
RO 2
GND
6, 7
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Absolute Maximum Ratings
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input/Output Voltages
A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 3)
θJA (°C/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .
105
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . .
140
14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
128
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25°C,
Note 4
PARAMETER
TEMP
(°C)
MIN
TYP
MAX
UNITS
RL = 100Ω (RS-422) (Figure 1A, Note 15)
Full
2
2.3
-
V
RL = 54Ω (RS-485) (Figure 1A)
Full
1.5
2
VCC
V
-
-
VCC
SYMBOL
TEST CONDITIONS
DC CHARACTERISTICS
Driver Differential VOUT
VOD
No Load
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
Driver Common-Mode VOUT
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
RL = 60Ω, -7V ≤ VCM ≤ 12V (Figure 1B)
Full
1.5
2.2
-
V
∆VOD
RL = 54Ω or 100Ω (Figure 1A)
Full
-
0.01
0.2
V
VOC
RL = 54Ω or 100Ω (Figure 1A)
Full
-
2
3
V
∆VOC
RL = 54Ω or 100Ω (Figure 1A)
Full
-
0.01
0.2
V
Logic Input High Voltage
VIH
DI, DE, RE
Full
2
-
-
V
Logic Input Low Voltage
VIL
DI, DE, RE
Full
-
-
0.8
V
DE, RE, (Note 14)
25
-
100
-
mV
Logic Input Hysteresis
VHYS
Logic Input Current
IIN1
DI = DE = RE = 0V or VCC, Note 17
Full
-2
-
2
µA
Input Current (A, B, A/Y, B/Z)
IIN2
DE = 0V, VCC = 0V or
3.6V
Full
-
80
125
µA
VIN = -7V
Full
-100
-50
-
µA
Output Leakage Current (Y, Z) (Full
Duplex Versions Only, Note 12)
IIN3
RE = 0V, DE = 0V,
VCC = 0V or 3.6V
VIN = 12V
Full
-
10
40
µA
VIN = -7V
Full
-40
-10
-
µA
Output Leakage Current (Y, Z)
in Shutdown Mode (Full Duplex,
Note 12)
IIN4
RE = VCC, DE = 0V,
VCC = 0V or 3.6V
VIN = 12V
Full
-
10
40
µA
VIN = -7V
Full
-40
-10
-
µA
DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 6)
Full
-
-
±250
mA
-7V ≤ VCM ≤ 12V
Full
-200
-125
-50
mV
IOSD1
Driver Short-Circuit Current,
VO = High or Low
Receiver Differential Threshold
Voltage
VTH
VIN = 12V
Receiver Input Hysteresis
∆VTH
VCM = 0V
25
-
15
-
mV
Receiver Output High Voltage
VOH
IO = -4mA, VID = -50mV
Full
VCC - 0.6
-
-
V
5
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25°C,
Note 4 (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
Receiver Output Low Voltage
VOL
IO = -4mA, VID = -200mV
Full
-
0.17
0.4
V
Three-State (high impedance)
Receiver Output Current (Note 12)
IOZR
0.4V ≤ VO ≤ 2.4V
Full
-1
0.015
1
µA
Receiver Input Resistance
RIN
-7V ≤ VCM ≤ 12V
Full
96
150
-
kΩ
Receiver Short-Circuit Current
IOSR
0V ≤ VO ≤ VCC
Full
±7
30
±60
mA
Thermal Shutdown Threshold
TSD
Full
-
150
-
°C
DE = VCC,
RE = 0V or VCC
Full
-
510
800
µA
DE = 0V, RE = 0V
Full
-
480
700
µA
DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
0.01
1
µA
RS-485 Pins (A, Y, B, Z)
Human Body Model (HBM), Pin to GND
25
-
±15
-
kV
All Other Pins
HBM, per MIL-STD-883 Method 3015
25
−
>±7
-
kV
SUPPLY CURRENT
No-Load Supply Current (Note 5)
Shutdown Supply Current
(Note 12)
ICC
ISHDN
DI = 0V or VCC
ESD PERFORMANCE
DRIVER SWITCHING CHARACTERISTICS (ISL83070E, ISL83071E, ISL83072E, 250kbps)
VOD = ±1.5V, CD = 820pF (Figure 4, Note 16)
Full
250
800
-
kbps
Driver Differential Output Delay
tDD
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
250
1100
1500
ns
Driver Differential Output Skew
tSKEW
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
-
6
100
ns
tR, tF
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
350
960
1600
ns
Maximum Data Rate
fMAX
Driver Differential Rise or Fall Time
Driver Enable to Output High
tZH
RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Notes 7, 12)
Full
-
26
600
ns
Driver Enable to Output Low
tZL
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Notes 7, 12)
Full
-
200
600
ns
Driver Disable from Output High
tHZ
RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Note 12)
Full
-
28
55
ns
Driver Disable from Output Low
tLZ
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Note 12)
Full
-
30
55
ns
(Notes 9, 12)
Full
50
200
600
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Notes 9, 10, 12)
Full
-
180
700
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Notes 9, 10, 12)
Full
-
100
700
ns
VOD = ±1.5V, CD = 820pF (Figure 4, Note 16)
Full
500
1600
-
kbps
Time to Shutdown
tSHDN
DRIVER SWITCHING CHARACTERISTICS (ISL83073E, ISL83075E, 500kbps)
Maximum Data Rate
fMAX
Driver Differential Output Delay
tDD
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
180
350
800
ns
Driver Differential Output Skew
tSKEW
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
-
1
30
ns
tR, tF
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
200
380
800
ns
Driver Differential Rise or Fall Time
Driver Enable to Output High
tZH
RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Notes 7, 12)
Full
-
26
350
ns
Driver Enable to Output Low
tZL
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Notes 7, 12)
Full
-
100
350
ns
Driver Disable from Output High
tHZ
RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Note 12)
Full
-
28
55
ns
6
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25°C,
Note 4 (Continued)
PARAMETER
TEMP
(°C)
MIN
TYP
MAX
UNITS
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Note 12)
Full
-
30
55
ns
(Notes 9, 12)
Full
50
200
600
ns
SYMBOL
Driver Disable from Output Low
tLZ
Time to Shutdown
tSHDN
TEST CONDITIONS
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Notes 9, 10, 12)
Full
-
180
700
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Notes 9, 10, 12)
Full
-
100
700
ns
DRIVER SWITCHING CHARACTERISTICS (ISL83076E, ISL83077E, ISL83078E, 20Mbps)
VOD = ±1.5V, CD = 350pF (Figure 4, Note 16)
Full
20
28
-
Mbps
Driver Differential Output Delay
tDD
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
-
27
40
ns
Driver Differential Output Skew
tSKEW
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
-
1
3
ns
RDIFF = 54Ω, CD = 50pF (Figure 2, Note 13)
Full
-
-
11
ns
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
-
9
15
ns
Maximum Data Rate
fMAX
∆tDSKEW
Driver Output Skew, Part-to-Part
Driver Differential Rise or Fall Time
tR, tF
Driver Enable to Output High
tZH
RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Notes 7, 12)
Full
-
17
50
ns
Driver Enable to Output Low
tZL
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Notes 7, 12)
Full
-
16
40
ns
Driver Disable from Output High
tHZ
RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Note 12)
Full
-
25
40
ns
Driver Disable from Output Low
tLZ
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Note 12)
Full
-
28
50
ns
(Notes 9, 12)
Full
50
200
600
ns
Time to Shutdown
tSHDN
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Notes 9, 10, 12)
Full
-
180
700
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Notes 9, 10, 12)
Full
-
90
700
ns
ISL83070E-75E
Full
12
20
-
Mbps
ISL83076E-78E
Full
20
35
-
Mbps
ISL83070E-75E
Full
25
70
120
ns
ISL83076E-78E
RECEIVER SWITCHING CHARACTERISTICS (All Versions)
Maximum Data Rate
fMAX
Receiver Input to Output Delay
VID = ±1.5V (Note 16)
tPLH, tPHL (Figure 5)
Receiver Skew | tPLH - tPHL |
tSKD
∆tRSKEW
Receiver Skew, Part-to-Part
Receiver Enable to Output High
tZH
Receiver Enable to Output Low
tZL
Receiver Disable from Output High
Receiver Disable from Output Low
Time to Shutdown
tHZ
tLZ
tSHDN
7
Full
25
33
60
ns
(Figure 5)
Full
-
1.5
4
ns
(Figure 5, Note 13)
Full
-
-
15
ns
RL = 1kΩ, CL = 15pF,
SW = GND (Figure 6),
(Notes 8, 12)
ISL83070E-75E
Full
5
15
20
ns
ISL83076E-78E
Full
5
11
17
ns
RL = 1kΩ, CL = 15pF,
SW = VCC (Figure 6),
(Notes 8, 12)
ISL83070E-75E
Full
5
15
20
ns
ISL83076E-78E
Full
5
11
17
ns
RL = 1kΩ, CL = 15pF,
SW = GND (Figure 6),
(Note 12)
ISL83070E-75E
Full
5
12
20
ns
ISL83076E-78E
Full
4
7
15
ns
RL = 1kΩ, CL = 15pF,
SW = VCC (Figure 6),
(Note 12)
ISL83070E-75E
Full
5
13
20
ns
ISL83076E-78E
Full
4
7
15
ns
Full
50
180
600
ns
(Notes 9, 12)
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25°C,
Note 4 (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Notes 9, 11, 12)
Full
-
240
500
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
(Notes 9, 11, 12)
Full
-
240
500
ns
NOTES:
4. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
5. Supply current specification is valid for loaded drivers when DE = 0V.
6. Applies to peak current. See “Typical Performance Curves” for more information.
7. When testing devices with the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
8. When testing devices with the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from
entering SHDN.
9. Versions with a shutdown feature are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts
are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See
“Low-Power Shutdown Mode” section.
10. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
11. Set the RE signal high time >600ns to ensure that the device enters SHDN.
12. Does not apply to the ISL83071E and ISL83077E.
13. ∆tSKEW is the magnitude of the difference in propagation delays of the specified terminals of two units tested with identical test conditions (VCC,
temperature, etc.). Only applies to the ISL83076E - 78E.
14. ISL83070E - ISL83075E only.
15. VCC ≥ 3.15V
16. Guaranteed by design and characterization, but not production tested.
17. If the Tx or Rx enable function isn’t needed, connect the enable pin to the appropriate supply (see “Pin Descriptions” table) through a 1kΩ to 3kΩ
resistor.
Test Circuits and Waveforms
VCC
RL/2
DE
DI
VCC
Z
D
DI
VOD
375Ω
DE
Z
D
Y
VOD
Y
RL/2
FIGURE 1A. VOD AND VOC
RL = 60Ω
VCM
-7V to +12V
375Ω
VOC
FIGURE 1B. VOD WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
8
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Test Circuits and Waveforms (Continued)
3V
DI
1.5V
1.5V
0V
VCC
DE
tPHL
tPLH
Z
DI
RDIFF
D
OUT (Z)
VOH
OUT (Y)
VOL
CD
Y
SIGNAL
GENERATOR
90%
DIFF OUT (Y - Z)
+VOD
90%
10%
10%
tR
-VOD
tF
SKEW = |tPLH - tPHL|
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
Z
DI
500Ω
VCC
D
SW
Y
SIGNAL
GENERATOR
3V
DE
NOTE 9
GND
50pF
1.5V
1.5V
0V
tZH, tZH(SHDN)
tHZ
OUTPUT HIGH
NOTE 9
VOH - 0.25V
PARAMETER
OUTPUT
RE
DI
SW
tHZ
Y/Z
X
1/0
GND
tLZ
Y/Z
X
0/1
VCC
tZL, tZL(SHDN)
tZH
Y/Z
0 (Note 7)
1/0
GND
NOTE 9
tZL
Y/Z
0 (Note 7)
0/1
VCC
tZH(SHDN)
Y/Z
1 (Note 10)
1/0
GND
tZL(SHDN)
Y/Z
1 (Note 10)
0/1
VOH
50%
OUT (Y, Z)
0V
tLZ
VCC
OUT (Y, Z)
50%
VOL + 0.25V V
OUTPUT LOW
VCC
FIGURE 3A. TEST CIRCUIT
OL
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES (EXCEPT ISL83071E, ISL83077E)
VCC
3V
DE
+
Z
DI
54Ω
D
CD
Y
DI
0V
VOD
-
+VOD
DIFF OUT (Y - Z)
SIGNAL
GENERATOR
-VOD
0V
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4A. TEST CIRCUIT
FIGURE 4. DRIVER DATA RATE
9
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Test Circuits and Waveforms (Continued)
+1.5V
RE
GND
15pF
B
R
A
A
0V
0V
RO
-1.5V
tPLH
tPHL
VCC
SIGNAL
GENERATOR
1.5V
RO
1.5V
0V
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER PROPAGATION DELAY
RE
GND
B
A
R
1kΩ
RO
SW
SIGNAL
GENERATOR
NOTE 9
VCC
GND
3V
RE
1.5V
1.5V
15pF
0V
tZH, tZH(SHDN)
NOTE 9
tHZ
OUTPUT HIGH
VOH - 0.25V
PARAMETER
DE
A
SW
tHZ
X
+1.5V
GND
tLZ
X
-1.5V
VCC
tZH (Note 8)
0
+1.5V
GND
tZL (Note 8)
0
-1.5V
VCC
tZH(SHDN) (Note 11)
0
+1.5V
GND
tZL(SHDN) (Note 11)
0
-1.5V
VCC
FIGURE 6A. TEST CIRCUIT
VOH
1.5V
RO
0V
tZL, tZL(SHDN)
tLZ
NOTE 9
VCC
RO
1.5V
VOL + 0.25V V
OUTPUT LOW
OL
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES (EXCEPT ISL83071E, ISL83077E)
Application Information
Receiver Features
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a pointto-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (any
combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 spec requires that
drivers must handle bus contention without sustaining any
damage.
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity
is better than ±200mV, as required by the RS-422 and RS-485
specifications.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as
long as 4000’, so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in
the cable by external fields.
10
Receiver input resistance of 96kΩ surpasses the RS-422
spec of 4kΩ, and is eight times the RS-485 “Unit Load (UL)”
requirement of 12kΩ minimum. Thus, these products are
known as “one-eighth UL” transceivers, and there can be up
to 256 of these devices on a network while still complying
with the RS-485 loading spec.
Receiver inputs function with common mode voltages as great
as +9V/-7V outside the power supplies (i.e., +12V and -7V),
making them ideal for long networks where induced voltages,
and ground potential differences, are realistic concerns.
All the receivers include a “full fail-safe” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating) or shorted. Fail-safe with shorted
inputs is achieved by setting the Rx upper switching point to
-50mV, thereby ensuring that the Rx sees 0V differential as a
high input level.
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Receivers easily meet the data rates supported by the
corresponding driver, and all receiver outputs - except on the
ISL83071E and ISL83077E- are tri-statable via the active
low RE input.
Driver Features
The RS-485/422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485), and at
least 2V across a 100Ω load (RS-422). The drivers feature
low propagation delay skew to maximize bit width, and to
minimize EMI.
All drivers are tri-statable via the active high DE input, except
on the ISL83071E and ISL83077E.
The 250kbps and 500kbps driver outputs are slew rate
limited to minimize EMI, and to reduce reflections in
unterminated or improperly terminated networks. Outputs of
the ISL83076E - ISL83078E drivers are not limited, so faster
output transition times allow data rates of at least 20Mbps.
Hot Plug Function
When a piece of equipment powers up, there is a period of
time where the processor or ASIC driving the RS-485 control
lines (DE, RE) is unable to ensure that the RS-485 Tx and
Rx outputs are kept disabled. If the equipment is connected
to the bus, a driver activating prematurely during power up
may crash the bus. To avoid this scenario, the ISL8307XE
family incorporates a “Hot Plug” function. During power up,
circuitry monitoring VCC ensures that the Tx and Rx outputs
remain disabled for a period of time, regardless of the state of
DE and RE. This gives the processor/ASIC a chance to
stabilize and drive the RS-485 control lines to the proper states.
ESD Protection
All pins on these devices include class 3 (>7kV) Human
Body Model (HBM) ESD protection structures, but the
RS-485 pins (driver outputs and receiver inputs)
incorporate advanced structures allowing them to survive
ESD events in excess of ±15kV HBM. The RS-485 pins are
particularly vulnerable to ESD damage because they
typically connect to an exposed port on the exterior of the
finished product. Simply touching the port pins, or
connecting a cable, can cause an ESD event that might
destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
without degrading the RS-485 common mode range of -7V
to +12V. This built-in ESD protection eliminates the need
for board level protection structures (e.g., transient
suppression diodes), and the associated, undesirable
capacitive load they present.
Data Rate, Cables, and Terminations
RS-485/422 are intended for network lengths up to 4000’,
but the maximum system data rate decreases as the
transmission length increases. Devices operating at 20Mbps
are limited to lengths less than 100’, while the 250kbps
11
versions can operate at full data rates with lengths of several
thousand feet.
Twisted pair is the cable of choice for RS-485/422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
Proper termination is imperative, when using the 20Mbps
devices, to minimize reflections. Short networks using the
250kbps versions need not be terminated, but, terminations
are recommended unless power dissipation is an overriding
concern.
In point-to-point, or point-to-multipoint (single driver on bus)
networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs
connecting receivers to the main cable should be kept as
short as possible. Multipoint (multi-driver) systems require
that the main cable be terminated in its characteristic
impedance at both ends. Stubs connecting a transceiver to
the main cable should be kept as short as possible.
Built-In Driver Overload Protection
As stated previously, the RS-485 spec requires that drivers
survive worst case bus contentions undamaged. These
devices meet this requirement via driver output short circuit
current limits, and on-chip thermal shutdown circuitry.
The driver output stages incorporate short circuit current
limiting circuitry which ensures that the output current never
exceeds the RS-485 spec, even at the common mode
voltage range extremes. Additionally, these devices utilize a
foldback circuit which reduces the short circuit current, and
thus the power dissipation, whenever the contending voltage
exceeds either supply.
In the event of a major short circuit condition, devices also
include a thermal shutdown feature that disables the drivers
whenever the die temperature becomes excessive. This
eliminates the power dissipation, allowing the die to cool. The
drivers automatically re-enable after the die temperature
drops about 15 degrees. If the contention persists, the thermal
shutdown/re-enable cycle repeats until the fault is cleared.
Receivers stay operational during thermal shutdown.
Low Power Shutdown Mode
These CMOS transceivers all use a fraction of the power
required by their bipolar counterparts, but some also include
a shutdown feature that reduces the already low quiescent
ICC to a 10nA trickle. These devices enter shutdown
whenever the receiver and driver are simultaneously
disabled (RE = VCC and DE = GND) for a period of at least
600ns. Disabling both the driver and the receiver for less
than 50ns guarantees that the transceiver will not enter
shutdown.
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 7-11, at the
end of the Electrical Specification table, for more information.
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Typical Performance Curves
VCC = 3.3V, TA = 25°C; Unless Otherwise Specified
2.35
DIFFERENTIAL OUTPUT VOLTAGE (V)
DRIVER OUTPUT CURRENT (mA)
120
100
80
60
40
20
0
0
0.5
1
1.5
2
2.5
DIFFERENTIAL OUTPUT VOLTAGE (V)
2.15
2.1
2.05
2
RDIFF = 54Ω
1.95
1.9
1.85
-40
3.5
RDIFF = 100Ω
2.2
-25
0
25
50
75
85
TEMPERATURE (°C)
FIGURE 7. DRIVER OUTPUT CURRENT vs DIFFERENTIAL
OUTPUT VOLTAGE
FIGURE 8. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
200
0.52
ISL83072/5/8E, DE = VCC, RE = X
ISL83076E/77/78E
150
0.51
Y OR Z = LOW
100
ISL83070E thru ISL83075E
0.5
50
ICC (mA)
OUTPUT CURRENT (mA)
3
2.3
2.25
ISL83070/3/6E, DE = X, RE = 0V; ISL83071/77E
0.49
0
0.48
-50
Y OR Z = HIGH
-100
-150
ISL83072/5/8E, DE = 0V, RE = 0V
0.47
ISL8307XE
-7 -6
-4
-2
0
2
4
6
OUTPUT VOLTAGE (V)
8
10
0.46
-40
12
-25
0
25
50
75
85
TEMPERATURE (°C)
FIGURE 9. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
FIGURE 10. SUPPLY CURRENT vs TEMPERATURE
1220
8
7.5
1180
SKEW (ns)
PROPAGATION DELAY (ns)
1200
1160
1140
1120
tPHL
7
6.5
6
1100
|CROSS PT. OF Y↑ & Z↓ - CROSS PT. OF Y↓ & Z↑|
tPLH
1080
-40
5.5
-25
0
25
TEMPERATURE (°C)
50
75
85
FIGURE 11. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE (ISL83070E, 71E, 72E)
12
-40
-25
0
25
TEMPERATURE (°C)
50
75
85
FIGURE 12. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE (ISL83070E, 71E, 72E)
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
VCC = 3.3V, TA = 25°C; Unless Otherwise Specified (Continued)
370
1.4
365
1.2
360
1
SKEW (ns)
PROPAGATION DELAY (ns)
Typical Performance Curves
355
350
0.8
0.6
tPHL
0.4
345
tPLH
|CROSS PT. OF Y↑ & Z↓ - CROSS PT. OF Y↓ & Z↑|
0.2
-40
340
-40
0
25
TEMPERATURE (°C)
-25
50
85
75
FIGURE 13. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE (ISL83073E, 75E)
-25
0
25
TEMPERATURE (°C)
50
85
75
FIGURE 14. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE (ISL83073E, 75E)
32
0.95
31
0.85
29
28
SKEW (ns)
27
26
tPHL
25
tPLH
24
0.65
|CROSS PT. OF Y↑ & Z↓ - CROSS PT. OF Y↓ & Z↑|
-40
-25
0
25
TEMPERATURE (°C)
50
85
75
DI
5
0
5
RO
0
B/Z
2
1.5
1
A/Y
0.5
0
TIME (400ns/DIV)
FIGURE 17. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83070E, 71E, 72E)
13
-25
0
25
TEMPERATURE (°C)
50
85
75
FIGURE 16. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE (ISL83076E, 77E, 78E)
DRIVER OUTPUT (V)
3
2.5
DRIVER INPUT (V)
FIGURE 15. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE (ISL83076E, 77E, 78E)
RDIFF = 54Ω, CD = 50pF
0.6
-40
RECEIVER OUTPUT (V)
22
RECEIVER OUTPUT (V)
0.75
0.7
23
DRIVER OUTPUT (V)
0.8
RDIFF = 54Ω, CD = 50pF
DI
5
0
5
RO
0
DRIVER INPUT (V)
PROPAGATION DELAY (ns)
0.9
30
3
2.5
A/Y
2
1.5
1
B/Z
0.5
0
TIME (400ns/DIV)
FIGURE 18. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83070E, 71E, 72E)
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
0
RO
0
3
2.5
B/Z
2
1.5
A/Y
1
0.5
0
DI
0
5
RO
0
3
2.5
A/Y
2
1.5
1
B/Z
0.5
0
TIME (200ns/DIV)
TIME (200ns/DIV)
0
RO
0
3
2.5
B/Z
2
1.5
A/Y
1
RECEIVER OUTPUT (V)
DI
5
DRIVER INPUT (V)
RDIFF = 54Ω, CD = 50pF
FIGURE 20. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83073E, 75E)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 19. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83073E, 75E)
5
0.5
0
RDIFF = 54Ω, CD = 50pF
DI
5
RO
0
3
2.5
A/Y
2
1.5
1
B/Z
0.5
0
TIME (10ns/DIV)
FIGURE 21. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83076E, 77E, 78E)
FIGURE 22. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83076E, 77E, 78E)
RECEIVER OUTPUT CURRENT (mA)
35
Die Characteristics
VOL, 25°C
SUBSTRATE POTENTIAL (POWERED UP):
25
GND
VOL, 85°C
VOH, 25°C
20
15
TRANSISTOR COUNT:
535
VOH, 85°C
PROCESS:
10
Si Gate BiCMOS
5
0
5
0
TIME (10ns/DIV)
30
5
DRIVER INPUT (V)
5
RDIFF = 54Ω, CD = 50pF
DRIVER INPUT (V)
DI
5
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CD = 50pF
DRIVER INPUT (V)
VCC = 3.3V, TA = 25°C; Unless Otherwise Specified (Continued)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
Typical Performance Curves
0
0.5
1
1.5
2
2.5
3
3.5
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 23. RECEIVER OUTPUT CURRENT vs RECEIVER
OUTPUT VOLTAGE
14
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Mini Small Outline Plastic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1
INCHES
E
-B-
INDEX
AREA
1 2
0.20 (0.008)
A B C
TOP VIEW
4X θ
0.25
(0.010)
R1
R
GAUGE
PLANE
SEATING
PLANE -CA
4X θ
A2
A1
b
-H-
0.10 (0.004)
L1
SEATING
PLANE
C
D
0.20 (0.008)
C
a
CL
E1
0.20 (0.008)
C D
MAX
MIN
MAX
NOTES
0.037
0.043
0.94
1.10
-
A1
0.002
0.006
0.05
0.15
-
A2
0.030
0.037
0.75
0.95
-
b
0.010
0.014
0.25
0.36
9
c
0.004
0.008
0.09
0.20
-
D
0.116
0.120
2.95
3.05
3
E1
0.116
0.120
2.95
3.05
4
0.026 BSC
-B-
0.65 BSC
-
E
0.187
0.199
4.75
5.05
-
L
0.016
0.028
0.40
0.70
6
0.037 REF
N
C
SIDE VIEW
MIN
A
L1
-A-
e
SYMBOL
e
L
MILLIMETERS
0.95 REF
8
R
0.003
R1
0
α
-
8
7
-
-
0.07
-
-
5o
15o
-
0o
6o
-
0.07
0.003
-
5o
15o
0o
6o
Rev. 2 01/03
END VIEW
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. - H - Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums -A -H- .
and - B - to be determined at Datum plane
11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
15
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
N
INDEX
AREA
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
H
0.25(0.010) M
B M
INCHES
E
SYMBOL
-B1
2
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
e
α
B S
0.050 BSC
-
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
α
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
1.27 BSC
H
N
NOTES:
MILLIMETERS
8
0°
8
8°
0°
7
8°
Rev. 1 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
16
FN6115.3
March 21, 2006
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
Small Outline Plastic Packages (SOIC)
M14.15 (JEDEC MS-012-AB ISSUE C)
N
INDEX
AREA
H
0.25(0.010) M
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
B M
E
INCHES
-B-
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
α
e
A1
B
0.25(0.010) M
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.3367
0.3444
8.55
8.75
3
E
0.1497
0.1574
3.80
4.00
4
e
C
0.10(0.004)
B S
0.050 BSC
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N
NOTES:
MILLIMETERS
α
14
0o
14
8o
0o
7
8o
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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17
FN6115.3
March 21, 2006