AD OP270GP Dual very low noise precision operational amplifier Datasheet

a
Dual Very Low Noise Precision
Operational Amplifier
OP270
CONNECTION DIAGRAMS
FEATURES
÷ Hz @ 1 kHz Max
Very Low Noise 5 nV/÷
Excellent Input Offset Voltage 75 ␮V Max
Low Offset Voltage Drift 1 ␮V/ⴗC Max
Very High Gain 1500 V/mV Min
Outstanding CMR 106 dB Min
Slew Rate 2.4 V/␮s Typ
Gain Bandwidth Product 5 MHz Typ
Industry-Standard 8-Lead Dual Pinout
16-Lead SOIC
8-Lead PDIP (P-Suffix)
(S-Suffix)
8-Lead CERDIP
(Z-Suffix)
–IN A 1
16 OUT A
+IN A 2
15 NC
NC 3
14 NC
OUT A 1
8
V+
13 V+
–IN A 2
7
OUT B
12 NC
+IN A 3
6
–IN B
5
+IN B
V– 4
OP270
NC 5
GENERAL DESCRIPTION
The OP270 is a high performance, monolithic, dual operational
amplifier with exceptionally low voltage noise, 5 nV/÷Hz max at
1 kHz. It offers comparable performance to ADI’s industry
standard OP27.
The OP270 features an input offset voltage below 75 mV and an
offset drift under 1 mV/∞C, guaranteed over the full military temperature range. Open-loop gain of the OP270 is over 1,500,000
into a 10 kW load, ensuring excellent gain accuracy and linearity,
even in high gain applications. Input bias current is under 20 nA,
which reduces errors due to signal source resistance. The OP270’s
CMR of over 106 dB and PSRR of less than 3.2 mV/V significantly reduce errors due to ground noise and power supply
fluctuations. Power consumption of the dual OP270 is one-third
less than two OP27s, a significant advantage for power conscious
applications. The OP270 is unity-gain stable with a gain bandwidth
product of 5 MHz and a slew rate of 2.4 V/ms.
+IN B 6
11 NC
–IN B 7
10 OUT B
NC 8
A
B
V– 4 OP270
9 NC
NC = NO CONNECT
The OP270 offers excellent amplifier matching, which is important
for applications such as multiple gain blocks, low noise instrumentation amplifiers, dual buffers, and low noise active filters.
The OP270 conforms to the industry-standard 8-lead DIP pinout.
It is pin compatible with the MC1458, SE5532/A, RM4558, and
HA5102 dual op amps, and can be used to upgrade systems
using those devices.
For higher speed applications, the OP271, with a slew rate of
8 V/ms, is recommended. For a quad op amp, see the OP470.
SIMPLIFIED SCHEMATIC
(One of Two Amplifiers Is Shown)
V+
BIAS
OUT
–IN
+IN
V–
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
OP270–SPECIFICATIONS (V
PARAMETER
SYMBOL CONDITIONS
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Noise Voltage
VOS
lOS
IB
en p-p
OP270F
MIN TYP MAX
150
15
40
200
50
5
15
80
3.6
3.2
3.2
6.5
5.5
5.0
3.6
3.2
3.2
6.5
5.5
5.0
3.6
3.2
3.2
nV/÷
÷Hz
÷Hz
nV/÷
÷Hz
nV/÷
1.1
0.7
0.6
pA/÷
÷Hz
÷Hz
pA/÷
÷Hz
pA/÷
750
350
± 12
± 12
1500
700
± 12.5
± 13.5
V/mV
V/mV
V
V
90
110
dB
IVR
VO
CMR
VCM = ± 11 V
106
125
100
120
PSRR
VS = ± 4.5 V
to ± 18 V
AVO
SR
ISY
1.1
0.7
0.6
0.56 3.2
1.7
No Load
GBP
CS
1.1
0.7
0.6
2.4
4
1.7
6.5
5
VO = ± 20 V p-p
fO = 10 Hz
(Note 1)
125
175
125
1.0
5.6
2.4
4
6.5
1.7
250
20
60
mV
nA
nA
nV p-p
20
3
10
80
1700
900
± 12.5
± 13.5
Large-Signal
Voltage Gain
OP270G
TYP MAX UNIT
75
10
20
200
1000
500
± 12
± 12
in
MIN
10
1
5
80
2300
1200
± 12.5
± 13.5
Input Noise
Current Density
Input Capacitance
Input Resistance
Differential-Mode
Input Resistance
Common-Mode
Settling Time
OP270E
MIN TYP MAX
1500
750
± 12
± 12
en
Slew Rate
Supply Current
(All Amplifiers)
Gain Bandwidth
Product
Channel Separation
= ⴞ15 V, TA = 25ⴗC, unless otherwise noted.)
VCM = 0 V
VCM = 0 V
0.1 Hz to 10 Hz
(Note 1)
fO = 10 Hz
fO = 100 Hz
fO = 1 kHz
(Note 2)
fO = 10 Hz
fO = 100 Hz
fO = 1 kHz
VO = ± 10 V
RL = 10 kW
RL = 2 kW
(Note3)
RL ≥ 2 kW
Input Noise
Voltage Density
Input Voltage Range
Output Voltage Swing
Common-Mode
Rejection
Power Supply
Rejection Ratio
S
1.5
6
mV/V
2.4
4
6.5
V/ms
mA
5
5
MHz
175
175
dB
CIN
RIN
3
0.4
3
0.4
3
0.4
pF
MW
RINCM
20
20
20
GW
5
5
5
ms
tS
AV = +1, 10 V
Step to 0.01%
NOTES
1. Guaranteed but not 100% tested.
2. Sample tested.
3. Guaranteed by CMR test.
Specifications subject to change without notice.
–2–
REV. C
OP270
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
PARAMETER
SYMBOL
Input Offset Voltage
Average Input
Offset Voltage Drift
Input Offset Current
Input Bias Voltage
Large-Signal
Voltage Gain
VOS
Input Voltage Range*
Output Voltage Swing
Common-Mode
Rejection
Power Supply
Rejection Ratio
Supply Current
(All Amplifiers)
TCVOS
IOS
IB
AVO
(Vs = ⴞ15 V, –40∞C £ TA £ 85ⴗC, unless otherwise noted.)
CONDITIONS
VCM = 0 V
VCM = 0 V
VO = ± 10 V
RL = 10 kW
RL = 2 kW
OP270E
MIN TYP MAX
IVR
VO
RL ≥ 2 kW
1000
500
± 12
± 12
CMR
VCM = ± 11 V
100
PSRR
VS = ± 4.5 V
to ± 18 V
No Load
ISY
MIN
OP270G
TYP MAX UNIT
25
150
45
275
100
400
mV
0.2
1.5
6
1
30
60
0.4
5
15
2
40
70
0.7
15
19
3
50
80
mV/∞C
nA
nA
1800
900
± 12.5
± 13.5
600
300
± 12
± 12
1400
700
± 12.5
± 13.5
400
225
± 12
± 12
1250
670
± 12.5
± 13.5
V/mV
V/mV
V
V
120
94
115
90
100
dB
0.7
5.6
1.8
10
2.0
1.5
mV/V
4.4
7.2
4.4
7.2
4.4
7.2
mA
* Guaranteed by CMR test.
Specifications subject to change without notice.
REV. C
OP270F
MIN TYP MAX
–3–
OP270
ABSOLUTE MAXIMUM RATINGS 1
Operating Temperature Range
OP270E, OP270F, OP270G . . . . . . . . . . . –40°C to +85°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . ± 1.0 V
Differential Input Current2 . . . . . . . . . . . . . . . . . . . . ± 25 mA
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . . Continuous
Storage Temperature Range
P, S, Z Package . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
Junction Temperature (TJ) . . . . . . . . . . . . . –65°C to +150°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
The OP270’s inputs are protected by back-to-back diodes. Current limiting
resistors are not used, in order to achieve low noise performance. If differential
voltage exceeds +10 V, the input current should be limited to ± 25 mA.
ORDERING GUIDE
Model
TA = +25°C
VOS Max
(␮V)
θ JC
(°C/W)
θ JA*
(°C/W)
Temperature
Range
Package
Description
Package
Option
OP270EZ
OP270FZ
OP270GP
OP270GS
75
150
250
250
12
12
37
27
134
134
96
92
XIND
XIND
XIND
XIND
8-Lead CERDIP
8-Lead CERDIP
8-Lead PDIP
16-Lead SOIC
Q-8 (Z-Suffix)
Q-8 (Z-Suffix)
N-8 (P-Suffix)
RW-16 (S-Suffix)
*θJA is specified for worst-case mounting conditions, i.e., θJA is specified for device
in socket for CERDIP and PDIP packages; θJA is specified for device soldered to
printed circuit board for SOIC package.
For military processed devices, please refer to the Standard
Microcircuit Drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp.
SMD Part Number
ADI Equivalent
5962-8872101PA
OP270AZMDA
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP270 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. C
5
TA = 25ⴗC
VS = ⴞ15V
4
3
1/f CORNER = 5Hz
2
AT 10Hz
10
AT 1kHz
3
2
1k
0
ⴞ5
ⴞ15
ⴞ10
SUPPLY VOLTAGE (V)
ⴞ20
5
VS = ⴞ15V
VOLTAGE NOISE (nV/ Hz)
30
1.0
1/f CORNER = 200Hz
20
10
0
–10
–20
100
1k
FREQUENCY (Hz)
–30
0
25
50
75
–75 –50 –25
TEMPERATURE (ⴗC)
10k
TPC 4. Current Noise Density
vs. Frequency
INPUT OFFSET CURRENT (nA)
INPUT BIAS CURRENT (nA)
5
6
5
4
3
2
–75 –50 –25
0
25
50
75
100 125
TEMPERATURE (ⴗC)
TPC 7. Input Bias Current vs.
Temperature
REV. C
4
3
2
1
0
0
1
2
3
TIME (Minutes)
4
5
TPC 6. Warm-Up Offset Voltage
Drift
TPC 5. Input Offset Voltage vs.
Temperature
VS = ⴞ15V
VCM = 0V
TA = 25ⴗC
VS = ⴞ15V
100 125
7
VS = ⴞ15V
VCM = 0V
TA = 25ⴗC
VS = ⴞ15V
4
INPUT BIAS CURRENT (nA)
0.1
10
7
TPC 3. 0.1 Hz to 10 Hz Input
Voltage Noise
40
TA = 25ⴗC
VS = ⴞ15V
TIME (1sec/DIV)
TA = 25ⴗC
VS = ⴞ15V
TPC 2. Voltage Noise Density
vs. Supply Voltage
TPC 1. Voltage Noise Density
vs. Frequency
CURRENT NOISE (pA/ Hz)
4
1
10
100
FREQUENCY (Hz)
1
NOISE VOLTAGE (100nV/DIV)
5
1
0.1Hz TO 10Hz NOISE
TA = 25ⴗC
CHANGE IN OFFSET VOLTAGE (␮A)
10
9
8
7
6
VOLTAGE NOISE (nV/ Hz)
VOLTAGE NOISE (nV/ Hz)
Typical Performance Characteristics– OP270
3
2
1
0
–75 –50 –25
0
25
50
75
100 125
TEMPERATURE (ⴗC)
TPC 8. Input Offset Current vs.
Temperature
–5–
6
5
4
3
2
–10.0
–5.0
0.0
5.0
10.0
–12.5
–7.5
–2.5
2.5
7.5
12.5
COMMON-MODE VOLTAGE (V)
TPC 9. Input Bias Current vs.
Common-Mode Voltage
OP270
130
100
90
80
70
60
50
40
30
5
4
+125ⴗC
+25ⴗC
–55ⴗC
3
7
TOTAL SUPPLY CURRENT (mA)
TOTAL SUPPLY CURRENT (mA)
110
6
5
4
3
2
1
20
10
1
10
100
1k
10k
FREQUENCY (Hz)
100k
2
1M
TPC 10. CMR vs. Frequency
ⴞ5
ⴞ10
ⴞ15
SUPPLY VOLTAGE (V)
0
80
TA = 25ⴗC
VS = ⴞ15V
100
80
–PSR
60
+PSR
40
TA = 25ⴗC
VS = ⴞ15V
60
CLOSED-LOOP GAIN (dB)
100
VOLTAGE GAIN (dB)
120
80
60
40
40
20
0
20
20
1
10
100
0
1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
TPC 13. PSR vs. Frequency
20
PHASE
80
100
120
15
140
10
GAIN
5
PHASE
MARGIN = 62ⴗ
160
180
0
100
1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
–20
1k
10k
100k
1M
FREQUENCY (Hz)
10M
TPC 15. Closed-Loop Gain vs.
Frequency
5000
80
8
OPEN-LOOP GAIN (V/mV)
TA = 25ⴗC
VS = ⴞ15V
10
TPC 14. Open-Loop Gain vs.
Frequency
PHASE SHIFT (Degrees)
25
1
4000
PHASE MARGIN (Degrees)
PSR (dB)
120
100 125
TPC 12. Total Supply Current
vs. Temperature
140
TA = 25ⴗC
GAIN (dB)
0
–75 –50 –25
25
75
0
50
TEMPERATURE (ⴗC)
ⴞ20
TPC 11. Total Supply Current
vs. Supply Voltage
140
0
VS = ⴞ15V
3000
2000
1000
70
7
60
⌽
50
6
5
GBP
–5
4
–10
1
2
3
4 5
FREQUENCY (Hz)
6 7 8 9 10
TPC 16. Open-Loop Gain Phase
Shift vs. Frequency
0
0
ⴞ5
ⴞ10
ⴞ15
ⴞ20
SUPPLY VOLTAGE (V)
TPC 17. Open-Loop Gain vs.
Supply Voltage
–6–
ⴞ25
40
–75 –50 –25
GAIN BANDWIDTH PRODUCT (MHz)
CMR (dB)
8
6
TA = 25ⴗC
VS = ⴞ15V
120
0 25 50 75 100 125 150
TEMPERATURE (ⴗC)
TPC 18. Gain-Bandwidth Phase
Margin vs. Temperature
REV. C
OP270
15
TA = 25ⴗC
VS = ⴞ15V
THD = 1%
24
TA = 25ⴗC
14 VS = ⴞ15V
50
TA = 25ⴗC
VS = ⴞ15V
VIN = 100mV
40 AV = +1
POSITIVE
SWING
13
20
16
12
8
12
11
OVERSHOOT (%)
MAXIMUM OUTPUT ( V)
PEAK-TO-PEAK AMPLITUDE (V)
28
NEGATIVE
SWING
10
9
8
7
30
20
10
4
6
0
1k
10k
100k
1M
FREQUENCY (Hz)
5
1k
10M
TPC 19. Maximum Output
Swing vs. Frequency
100
10k
LOAD RESISTANCE (⍀)
TPC 20. Maximum Output
Voltage vs. Load Resistance
2.8
TA = +25ⴗC
VS = ⴞ15V
190
CHANNEL SEPARATION (dB)
SLEW RATE (V/␮s)
OUTPUT IMPEDANCE (⍀)
AV = 10
AV = 100
2.6
2.5
–SR
2.4
+SR
25
2.3
0
1k
10k
100k
1M
FREQUENCY (Hz)
10M
TPC 22. Output Impedance vs.
Frequency
DISTORTION (%)
0.1
2.2
–75 –50 –25
25
75
0
50
TEMPERATURE (ⴗC)
100 125
TPC 23. Slew Rate vs.
Temperature
170
160
150
140
130
120
110
100
90
TA = 25ⴗC
80 VS = ⴞ15V
VO = 20V p-p TO 10kHz
70
10
100
1
1k
10k
FREQUENCY (Hz)
100k
AV = 10
0.01
AV = 1
20␮s
5V
100
1k
FREQUENCY (Hz)
10k
TPC 25. Total Harmonic Distortion vs. Frequency
REV. C
50mV
200nS
TA = 25ⴗC
VS = ⴞ15V
AV = +1
RL = 2k⍀
TA = 25ⴗC
VS = ⴞ15V
AV = +1
RL = 2k⍀
TPC 26. Large Signal Transcient
Response
–7–
1M
TPC 24. Channel Separation vs.
Frequency
TA = 25ⴗC
VS = ⴞ15V
VO = 20V p-p
RL =2k⍀
0.001
10
1000
180
2.7
50
200
600
800
400
CAPACITIVE LOAD (pF)
0
TPC 21. Small-Signal Overshoot
vs. Capacitive Load
VS = ⴞ15V
AV = 1
75
0
100k
TPC 27. Small-Signal
Transient Response
OP270
5k⍀
TOTAL NOISE AND SOURCE RESISTANCE
The total noise of an op amp can be calculated by:
500⍀
1/2
OP270
V1 20Vp-p
En =
(en ) + (in RS ) + (et )
2
2
2
where:
En = total input referred noise
5k⍀
en = op amp voltage noise
50⍀
in = op amp current noise
1/2
OP270
V2
et = source resistance thermal noise
V
CHANNEL SEPARATION = 20 log
1
V /1000
RS = source resistance
2
The total noise is referred to the input and at the output would
be amplified by the circuit gain.
Figure 1. Channel Separation Test Circuit
+18V
Figure 3 shows the relationship between total noise at 1 kHz
and source resistance. For RS < 1 kW the total noise is dominated
by the voltage noise of the OP270. As RS rises above 1 kW, total
noise increases and is dominated by resistor noise rather than by
the voltage or current noise of the OP270. When RS exceeds
20 kW, current noise of the OP270 becomes the major contributor
to total noise.
8
100k⍀
2
3
1/2
OP270
1
200k⍀
100
6
1/2
OP270
7
TOTAL NOISE (nV/ Hz)
5
100k⍀
4
–18V
OP200
10
OP270
Figure 2. Burn-In Circuit
RESISTOR
NOISE ONLY
1
100
APPLICATIONS INFORMATION
VOLTAGE AND CURRENT NOISE
1k
10k
100k
RS – SOURCE RESISTANCE (⍀)
The OP270 is a very low noise dual op amp, exhibiting atypical
÷Hz @ 1 kHz. The exceptionally
voltage noise of only 3.2 nV/÷
low noise characteristic of the OP270 is achieved in part by
operating the input transistors at high collector currents since
the voltage noise is inversely proportional to the square root of
the collector current. Current noise, however, is directly proportional to the square root of the collector current. As a result, the
outstanding voltage noise performance of the OP270 is gained
at the expense of current noise performance, which is normal for
low noise amplifiers.
Figure 3. Total Noise vs. Source Resistance
(Including Resistor Noise) at 1 kHz
Figure 4 also shows the relationship between total noise and
source resistance, but at 10 Hz. Total noise increases more
quickly than shown in Figure 3 because current noise is inversely
proportional to the square root of frequency. In Figure 4, current
noise of the OP270 dominates the total noise when RS > 5 kW.
Figures 3 and 4 show that to reduce total noise, source resistance
must be kept to a minimum. In applications with a high source
resistance, the OP200, with lower current noise than the OP270,
will provide lower total noise.
To obtain the best noise performance in a circuit, it is vital to
understand the relationship between voltage noise (en), current
noise (in), and resistor noise (et).
–8–
REV. C
OP270
Figure 5 shows peak-to-peak noise versus source resistance over the
0.1 Hz to 10 Hz range. Once again, at low values of RS, the voltage
noise of the OP270 is the major contributor to peak-to-peak
noise, with current noise the major contributor as RS increases.
The crossover point between the OP270 and the OP200 for
peak-to-peak noise is at RS = 17 kW.
TOTAL NOISE (nV/ Hz)
100
The OP271 is a higher speed version of the OP270, with a slew
rate of 8 V/ms. Noise of the OP271 is slightly higher than that of
the OP270. Like the OP270, the OP271 is unity-gain stable.
10 OP200
OP270
For reference, typical source resistances of some signal sources
are listed in Table I.
RESISTOR
NOISE ONLY
1
100
Table I.
1k
10k
100k
RS – SOURCE RESISTANCE (⍀)
Figure 4. Total Noise vs. Source Resistance
(Including Resistor Noise) at 10 Hz
1000
PEAK-TO-PEAK NOISE (nV)
OP200
100
Source
Impedance
Strain gage
<500 W
Typically used in low
frequency applications.
Magnetic
tapehead,
microphone
<1500 W
Low IB very important to reduce
self-magnetization problems
when direct coupling is used.
OP270 IB can be neglected.
Magnetic
phonograph
cartridge
<1500 W
Similar need for low IB in
direct coupled applications.
OP270 will not introduce any
self-magnetization problem.
Comments
Linear variable <1500 W
differential
transformer
OP270
RESISTOR
NOISE ONLY
10
100
Device
1k
10k
Used in rugged servo-feedback
applications. Bandwidth of
interest is 400 Hz to 5 kHz.
100k
RS – SOURCE RESISTANCE (⍀)
Figure 5. Peak-to-Peak Noise (0.1 Hz to 10 Hz) vs.
Source Resistance (Includes Resistor Noise)
R3
1.24k⍀
R1
5⍀
R2
5⍀
–
OP270
DUT
+
C1
2␮F
+
OP27E
–
R5
909⍀
R6
600⍀
C4
0.22␮F
D1, D2
1N4148
R10
65.4k⍀
+
R11
65.4k⍀
+
OP27E
R4
200⍀
–
R9
306k⍀
R8
10k⍀
C2
0.032␮F
C3
0.22␮F
OP42E
–
R13
5.9k⍀
R12
10k⍀
Figure 6. Peak-to-Peak Voltage Noise Test Circuit (0.1 Hz to 10 Hz)
REV. C
–9–
R14
4.99k⍀
eOUT
C5
1␮F
GAIN = 50,000
VS = ⴞ15V
OP270
NOISE MEASUREMENTS
Peak-to-Peak Voltage Noise
Noise Measurement — Noise Voltage Density
The circuit of Figure 6 is a test setup for measuring peak-to-peak
voltage noise. To measure the 200 nV peak-to-peak noise specification of the OP270 in the 0.1 Hz to 10 Hz range, the following
precautions must be observed:
The circuit of Figure 8 shows a quick and reliable method of
measuring the noise voltage density of dual op amps. The first
amplifier is in unity-gain, with the final amplifier in a noninverting
gain of 101. As noise voltages of each amplifier are uncorrelated,
they add in rms fashion to yield:
Ê
eOUT = 101Á
Ë
1. The device has to be warmed up for at least five minutes. As
shown in the warm-up drift curve, the offset voltage typically
changes 2 mV due to increasing chip temperature after power-up.
In the 10-second measurement interval, these temperature
induced effects can exceed tens of nanovolts.
(enA ) + (enB )
2
2
ˆ
˜
¯
The OP270 is a monolithic device with two identical amplifiers. The noise voltage density of each individual amplifier will
match, giving:
2. For similar reasons, the device has to be well shielded from
air currents. Shielding also minimizes thermocouple effects.
( )
2ˆ
Ê
eOUT = 101Á 2en ˜ = 101 2en
Ë
¯
3. Sudden motion in the vicinity of the device can also “feed
through” to increase the observed noise.
4. The test time to measure noise of 0.1 Hz to 10 Hz should not
exceed 10 seconds. As shown in the noise-tester frequency
response curve of Figure 7, the 0.1 Hz corner is defined by
only one pole. The test time of 10 seconds acts as an additional
pole to eliminate noise contribution from the frequency band
below 0.1 Hz.
R1
100⍀
R2
10k⍀
–
1/2
eOUT
OP270
+
TO SPECTRUM ANALYZER
–
1/2
OP270
+
100
eOUT (nV/ Hz) =苲 101 ( 2en)
VS = 15V
Figure 8. Noise Voltage Density Test Circuit
80
GAIN (dB)
R3
1.24k⍀
60
R1
5⍀
40
R2
100k⍀
–
OP270
DUT
+
–
enOUT
OP27E
TO SPECTRUM ANALYZER
+
20
R4
200⍀
0
0.01
0.1
1.0
10
R5
8.06k⍀
GAIN = 10,000
VS = ⴞ15V
100
FREQUENCY (Hz)
Figure 9. Current Noise Density Test Circuit
Figure 7. 0.1 Hz to 10 Hz Peak-to-Peak Voltage
Noise Test Circuit Frequency Response
Noise Measurement — Current Noise Density
5. A noise-voltage-density test is recommended when measuring
noise on a large number of units. A 10 Hz noise-voltage-density
measurement will correlate well with a 0.1 Hz to 10 Hz
peak-to-peak noise reading, since both results are determined by
the white noise and the location of the 1/f corner frequency.
6. Power should be supplied to the test circuit by well bypassed
low noise supplies, e.g., batteries. They will minimize output
noise introduced via the amplifier supply pins.
The test circuit shown in Figure 9 can be used to measure current noise density. The formula relating the voltage output to
current noise density is:
2
in =
(
Ê enOUT ˆ
Á G ˜ - 40 nV / Hz
¯
Ë
RS
)
2
where:
G = gain of 10,000
RS = 100 kW source resistance
–10–
REV. C
OP270
CAPACITIVE LOAD DRIVING AND POWER SUPPLY
CONSIDERATIONS
APPLICATIONS
Low Phase Error Amplifier
The OP270 is unity-gain stable and capable of driving large
capacitive loads without oscillating. Nonetheless, good supply
bypassing is highly recommended. Proper supply bypassing
reduces problems caused by supply line noise and improves the
capacitive load driving capability of the OP270.
The simple amplifier depicted in Figure 12 utilizes a monolithic
dual operational amplifier and a few resistors to substantially
reduce phase error compared to conventional amplifier designs.
At a given gain, the frequency range for a specified phase accuracy is
over a decade greater than for a standard single op amp amplifier.
In the standard feedback amplifier, the op amp’s output resistance combines with the load capacitance to form a low-pass
filter that adds phase shift in the feedback network and reduces
stability. A simple circuit to eliminate this effect is shown in
Figure 10. The added components, C1 and R3, decouple the
amplifier from the load capacitance and provide additional
stability. The values of C1 and R3 shown in Figure 10 are for a
load capacitance of up to 1,000 pF when used with the OP270.
The low phase error amplifier performs second-order frequency
compensation through the response of op amp A2 in the feedback loop of A1. Both op amps must be extremely well matched
in frequency response. At low frequencies, the A1 feedback
loop forces V2 /(K1 + 1) = VIN. The A2 feedback loop forces
Vo/(K1 + 1) = V2 /(K1 + 1), yielding an overall transfer function
of VO /VIN = K1 + 1. The dc gain is determined by the resistor
divider at the output, VO, and is not directly affected by the resistor divider around A2. Note that like a conventional single op amp
amplifier, the dc gain is set by resistor ratios only. Minimum
gain for the low phase error amplifier is 10.
V+
C3
0.1␮F
+ C2
10␮F
R2
R2
VIN
R1
C1
200pF
–
OP270
R3
50⍀
+
R2 = R1
R2
K1
–
1/2
OP270E
A2
+
VOUT
V2
C1
1000pF
C5
0.1␮F
V–
C4
+ 10␮F
PLACE SUPPLY DECOUPLING
CAPACITOR AT OP270
VIN
–
1/2
OP270E
A1
+
R2
R1
K1
VO
Figure 10. Driving Large Capacitive Loads
ASSUME A1 AND A1 ARE MATCHED.
␻
AO(s) = T
s
UNITY-GAIN BUFFER APPLICATIONS
When Rf £ 100 W and the input is driven with a fast, large
signal pulse (>1 V), the output waveform will look like the one
in Figure 11.
During the fast feedthrough-like portion of the output, the input
protection diodes effectively short the output to the input, and a
current, limited only by the output short-circuit protection, will be
drawn by the signal generator. With Rf ≥ 500 W, the output is
capable of handling the current requirements (IL £ 20 mA at 10 V);
the amplifier will stay in its active mode and a smooth transition
will occur.
Figure 12. Low Phase Error Amplifier
Figure 13 compares the phase error performance of the low
phase error amplifier with a conventional single op amp amplifier and a cascaded two-stage amplifier. The low phase error
amplifier shows a much lower phase error, particularly for frequencies where w/bwT < 0.1. For example, phase error of –0.1∞
occurs at 0.002 w/bwT for the single op amp amplifier, but at
0.11 w/bwT for the low phase error amplifier.
When Rf > 3 kW, a pole created by Rf and the amplifier’s input
capacitance (3 pF) creates additional phase shift and reduces
phase margin. A small capacitor (20 pF to 50 pF) in parallel
with Rf helps eliminate this problem.
Figure 11. Pulsed Operation
REV. C
VO = (K1 + 1) V IN
–11–
OP270
0
FIVE-BAND LOW NOISE STEREO GRAPHIC EQUALIZER
The graphic equalizer circuit shown in Figure 14 provides 15 dB of
boost or cut over a 5-band range. Signal-to-noise ratio over a 20 kHz
bandwidth is better than 100 dB and referred to a 3 V rms input.
Larger inductors can be replaced by active inductors, but this
reduces the signal-to-noise ratio.
PHASE SHIFT (Degrees)
–1
SINGLE OP AMP.
CONVENTIONAL DESIGN
–2
–3
CASCADED
(TWO STAGES)
DIGITAL PANNING CONTROL
Figure 15 uses a DAC8221, a dual 12-bit CMOS DAC, to pan
a signal between two channels. One channel is formed by the
current output of DAC A driving one-half of an OP270 in a
current-to-voltage converter configuration. The other channel is
formed by the complementary output current of DAC A, which
normally flows to ground through the AGND pin. This complementary current is converted to a voltage by the other half of the
OP-270, which also holds AGND at virtual ground.
–4
–5
LOW PHASE ERROR
AMPLIFIER
–6
–7
0.001
0.01
0.1
0.005
0.05
FREQUENCY RATIO (1/␤␻)(␻/␻T)
0.5
1.0
Figure 13. Phase Error Comparison
C1
0.47␮F
+
VIN
R1
47k⍀
1/2
OP270E
R2
3.3k⍀
+
1/2
OP270E
–
R3
680⍀
R5
680⍀
R7
680⍀
R4
1k⍀
C2
6.8␮F
+
L1
TANTALUM
1H
–
60Hz
R13
3.3k⍀
L2
TANTALUM
600mH
200Hz
R8
1k⍀
L3
VOUT
DUAL PROGRAMMABLE GAIN AMPLIFIER
R6
1k⍀
C3
1␮F
+
C4
0.22␮F
R14
100⍀
Gain error due to mismatching between the internal DAC ladder
resistors and the current-to-voltage feedback resistors is eliminated by using feedback resistors internal to the DAC8221. Only
DAC A passes a signal; DAC B provides the second feedback
resistor. With VREFB unconnected, the current-to-voltage converter,
using RFBB, is accurate and not influenced by digital data reaching DAC B. Distortion of the digital panning control is less than
0.002% over the 20 Hz to 20 kHz audio range. Figure 16 shows
the complementary outputs for a 1 kHz input signal and a digital
ramp applied to the DAC data input.
800Hz
The dual OP270 and the DAC8221, a dual 12-bit CMOS
DAC, can be combined to form a space-saving dual programmable amplifier. The digital code present at the DAC, which is
easily set by a microprocessor, determines the ratio between the
internal feedback resistor and the resistance the DAC ladder
presents to the op amp feedback loop. Gain of each amplifier is
180mH
R9
680⍀
C5
0.047␮F
L4
3kHz
60mH
R11
680⍀
C6
0.022␮F
VOUT
4096
=–
VIN
n
R10
1k⍀
R12
1k⍀
L5
10kHz
10mH
Figure 14. 5-Band Low Noise Graphic Equalizer
where n equals the decimal equivalent of the 12-bit digital code
present at the DAC. If the digital code present at the DAC
consists of all zeros, the feedback loop will open, causing the op
amp output to saturate. A 20 MW resistor placed in parallel with
the DAC feedback loop eliminates this problem with only a very
small reduction in gain accuracy.
–12–
REV. C
OP270
+5V
+15V
+15V
21
DAC8221HP
+5V
21
VDD
0.01␮F
RFBA
VDD
DAC8221HP
3
VINA
3
–
4
VREFA
DAC A
IOUTA
2
2
–
AGND
1
3
+
10␮F
1
22 VREFB
DAC B
–15V
23
IOUTB 24
WRITE
CONTROL
DAC A/DAC B
19
CS
20
WR
OUT
3
–
10␮F
+
VINB
23
5
–
–
+
10␮F
8
1
VOUTA
4
1
0.1␮F
RFBB
IOUTB 24
6
7
OUT
20M⍀
DAC DATA BUS
PINS 6 (MSB) - 17 (LSB)
+
VREFB
18
WRITE
CONTROL
5
–
10␮F
+
–15V
–
1/2
OP270GP
–
1/2
OP270GP
18
2
1/2
OP270EZ
DAC B
6
2
4
0.1␮F
NC
DAC A
IOUTA
AGND
RFBB
+
20M⍀
8
1/2
OP270GP
DAC DATA BUS
PINS 6 (MSB) - 17 (LSB)
4
RFBA
+
VIN
0.01␮F
VREFA
7
VOUTB
+
22
19
20
DGND
5
DGND
5
Figure 17. Dual Programmable Gain Amplifier
Figure 15. Digital Panning Control
A OUT
A OUT
5V
5V
1ms
Figure 16. Digital Panning Control Output
REV. C
–13–
OP270
OUTLINE DIMENSIONS
8-Lead Ceramic Dual In-Line Package [CERDIP]
Z-Suffix
(Q-8)
8-Lead Plastic Dual In-Line Package [PDIP]
P-Suffix
(N-8)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
0.005 (0.13)
MIN
8
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
0.055 (1.40)
MAX
5
0.310 (7.87)
0.220 (5.59)
PIN 1
1
4
8
5
1
4
0.100 (2.54) BSC
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.060 (1.52)
0.015 (0.38)
0.015
(0.38)
MIN
0.180
(4.57)
MAX
0.150 (3.81)
MIN
SEATING
0.070 (1.78) PLANE
0.030 (0.76)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.015 (0.38)
0.008 (0.20)
15
0
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
16-Lead Standard Small Outline Package [SOIC]
Wide Body
S-Suffix
(RW-16)
Dimensions shown in millimeters and (inches)
10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
10.65 (0.4193)
10.00 (0.3937)
8
1
0.51 (0.0201)
0.33 (0.0130)
0.75 (0.0295)
ⴛ 45ⴗ
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
0.32 (0.0126)
0.23 (0.0091)
8ⴗ
0ⴗ
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-013AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
–14–
REV. C
OP270
Revision History
Location
Page
4/03—Data Sheet changed from REV. B to REV. C.
Deletion of OP270A model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to CONNECTION DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Deletion of WAFER LIMITS and DICE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Changes to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Changes to equations in Noise Measurements section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Change to Figure 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
11/02—Data Sheet changed from REV. A to REV. B.
Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
9/02—Data Sheet changed from REV. 0 to REV. A.
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
REV. C
–15–
–16–
C00325–0–4/03(C)