TI1 INA201 High-side measurement current-shunt monitor with open-drain comparator and reference Datasheet

INA
200
INA200
INA201
INA202
www.ti.com
SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
High-Side Measurement Current-Shunt Monitor
with Open-Drain Comparator and Reference
Check for Samples: INA200, INA201, INA202
FEATURES
1
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DESCRIPTION
COMPLETE CURRENT SENSE SOLUTION
0.6V INTERNAL VOLTAGE REFERENCE
INTERNAL OPEN-DRAIN COMPARATOR
LATCHING CAPABILITY ON COMPARATOR
COMMON-MODE RANGE: –16V to +80V
HIGH ACCURACY: 3.5% MAX ERROR OVER
TEMPERATURE
BANDWIDTH: 500kHz (INA200)
QUIESCENT CURRENT: 1800mA (max)
PACKAGES: SO-8, MSOP-8
The INA200, INA201, and INA202 are high-side
current-shunt monitors with voltage output. The
INA200–INA202 can sense drops across shunts at
common-mode voltages from –16V to 80V. The
INA200–INA202 are available with three output
voltage scales: 20V/V, 50V/V, and 100V/V, with up to
500kHz bandwidth.
The INA200, INA201, and INA202 also incorporate an
open-drain comparator and internal reference
providing a 0.6V threshold. External dividers are used
to set the current trip point. The comparator includes
a latching capability, which can be made transparent
by grounding (or leaving open) the RESET pin.
APPLICATIONS
•
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•
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•
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NOTEBOOK COMPUTERS
CELL PHONES
TELECOM EQUIPMENT
AUTOMOTIVE
POWER MANAGEMENT
BATTERY CHARGERS
WELDING EQUIPMENT
The INA200, INA201, and INA202 operate from a
single +2.7V to +18V supply, drawing a maximum of
1800mA of supply current. Package options include
the very small MSOP-8 and the SO-8. All versions
are specified over the extended operating
temperature range of –40°C to +125°C.
1
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
V+
2 OUT
G
VIN+
8
VIN-
7
0.6V
Reference
3 CMPIN
Comparator
4
CMPOUT 6
GND
RESET 5
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2010, Texas Instruments Incorporated
INA200
INA201
INA202
SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
PRODUCT
GAIN
INA200
(1)
20V/V
INA201
50V/V
INA202
100V/V
PACKAGE-LEAD
PACKAGE
DESIGNATOR
PACKAGE MARKING
MSOP-8
DGK
BQH
INA200A
SO-8
D
MSOP-8
DGK
BQJ
SO-8
D
INA201A
MSOP-8
DGK
BQL
SO-8
D
INA202A
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
VALUE
UNIT
18
V
–18 to +18
V
Supply Voltage, V+
Current-Shunt Monitor Analog Inputs, VIN+, VIN–
Differential (VIN+) – (VIN–)
Common Mode
(2)
–16 to +80
V
Comparator Analog Input and Reset Pins (2)
GND – 0.3 to (V+) + 0.3
V
Analog Output, Out (2)
GND – 0.3 to (V+) + 0.3
V
GND – 0.3 to 18
V
Comparator Output, Out Pin (2)
Input Current Into Any Pin
(2)
5
mA
Operating Temperature
–55 to +150
°C
Storage Temperature
–65 to +150
°C
Junction Temperature
+150
°C
ES Human Body Model (HBM)
D
Charged Device Model (CDM)
Rat
ing
s
4000
V
1000
V
(1)
(2)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
This voltage may exceed the ratings shown if the current at that pin is limited to 5mA.
PIN CONFIGURATIONS
INA200-INA202
V+
1
8
VIN+
OUT
2
7
VIN-
CMPIN
3
6
CMPOUT
GND
4
5
RESET
MSOP-8 (DGK),
SO-8 (D)
2
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INA201
INA202
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SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
ELECTRICAL CHARACTERISTICS: CURRENT-SHUNT MONITOR
Boldface limits apply over the specified temperature range: TA = –40°C to +125°C.
At TA = +25°C, VS = +12V, VCM = +12V, VSENSE = 100mV, RL = 10kΩ to GND, RPULL-UP = 5.1kΩ connected from CMPOUT to
VS, and CMPIN = GND, unless otherwise noted.
INA200, INA201, INA202
CURRENT-SHUNT MONITOR PARAMETERS
CONDITIONS
MIN
TYP
MAX
UNIT
0.15
(VS – 0.25)/Gain
V
INPUT
Full-Scale Sense Input Voltage
Common-Mode Input Range
Common-Mode Rejection
VSENSE
VSENSE = VIN+ – VIN–
VCM
–16
CMR
Over Temperature
Offset Voltage, RTI (1)
VIN+ = –16V to +80V
80
VIN+ = +12V to +80V
100
V
100
dB
123
mV
+25°C to +125°C
±3
mV
–40°C to +25°C
±3.5
vs Power Supply
Input Bias Current, VIN– Pin
±0.5
dB
±2.5
vs Temperature
VOS
80
dVOS/dT
PSR
mV
TMIN to TMAX
5
VOUT = 2V, VIN+ = +18V, 2.7V
2.5
100
mV/V
±9
±16
mA
IB
mV/°C
OUTPUT (VSENSE ≥ 20mV)
Gain:
G
INA200
20
V/V
INA201
50
V/V
INA202
100
Gain Error
VSENSE = 20mV to 100mV
Over Temperature
VSENSE = 20mV to 100mV
Total Output Error (2)
VSENSE = 120mV, VS = +16V
Over Temperature
±0.75
VSENSE = 120mV, VS = +16V
Nonlinearity Error (3)
Output Impedance
±0.2
VSENSE = 20mV to 100mV
%
±2
%
±2.2
%
±3.5
%
±0.002
%
1.5
Ω
No Sustained Oscillation
10
nF
–16V ≤ VCM < 0V
300
RO
Maximum Capacitive Load
V/V
±1
OUTPUT (VSENSE < 20mV) (4)
INA200, INA201, INA202
mV
INA200
0V ≤ VCM ≤ VS, VS = 5V
0.4
V
INA201
0V ≤ VCM ≤ VS, VS = 5V
1
V
INA202
0V ≤ VCM ≤ VS, VS = 5V
2
VS < VCM ≤ 80V
INA200, INA201, INA202
300
V
mV
VOLTAGE OUTPUT (5)
Output Swing to the Positive Rail
VIN– = 11V, VIN+ = 12V
(V+) – 0.15
(V+) – 0.25
V
Output Swing to GND (6)
VIN– = 0V, VIN+ = –0.5V
(VGND) + 0.004
(VGND) + 0.05
V
INA200
CLOAD = 5pF
500
kHz
INA201
CLOAD = 5pF
300
kHz
INA202
CLOAD = 5pF
200
kHz
Phase Margin
CLOAD < 10nF
40
Degrees
1
V/ms
2
ms
40
nV/√Hz
FREQUENCY RESPONSE
Bandwidth:
Slew Rate
Settling Time (1%)
BW
SR
VSENSE = 10mVPP to 100mVPP,
CLOAD = 5pF
NOISE, RTI
Voltage Noise Density
(1)
(2)
(3)
(4)
(5)
(6)
Offset is extrapolated from measurements of the output at 20mV and 100mV VSENSE.
Total output error includes effects of gain error and VOS.
Linearity is best fit to a straight line.
For details on this region of operation, see the Accuracy Variations section in the Applications Information.
See Typical Characteristic curve Output Swing vs Output Current.
Specified by design.
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INA201
INA202
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ELECTRICAL CHARACTERISTICS: COMPARATOR
Boldface limits apply over the specified temperature range: TA = –40°C to +125°C.
At TA = +25°C, VS = +12V, VCM = +12V, VSENSE = 100mV, RL = 10kΩ to GND, and RPULL-UP = 5.1kΩ connected from CMPOUT
to VS, unless otherwise noted.
INA200, INA201, INA202
COMPARATOR PARAMETERS
CONDITIONS
MIN
TYP
MAX
UNIT
TA = +25°C
590
608
620
mV
625
mV
OFFSET VOLTAGE
Threshold
Over Temperature
586
Hysteresis (1)
TA = –40°C to +85°C
–8
mV
INPUT BIAS CURRENT (2)
CMPIN Pin
0.005
vs Temperature
10
nA
15
nA
INPUT VOLTAGE RANGE
0V to VS –
1.5V
V
CMP VOUT 1V to 4V,
RL ≥ 15kΩ Connected to 5V
200
V/mV
ILKG
VID = 0.4V, VOH = VS
0.0001
1
mA
VOL
VID = –0.6V, IOL = 2.35mA
220
300
mV
RL to 5V, CL = 15pF, 100mV Input Step with
5mV Overdrive
1.3
CMPIN Pin
OUTPUT (OPEN-DRAIN)
Large-Signal Differential Voltage Gain
High-Level Leakage Current
(3) (4)
Low-Level Output Voltage (3)
RESPONSE TIME
Response Time (5)
ms
RESET
RESET Threshold (6)
Logic Input Impedance
Minimum RESET Pulse Width
RESET Propagation Delay
(1)
(2)
(3)
(4)
(5)
(6)
1.1
V
2
MΩ
1.5
ms
3
ms
Hysteresis refers to the threshold (the threshold specification applies to a rising edge of a noninverting input) of a falling edge on the
noninverting input of the comparator; refer to Figure 1.
Specified by design.
VID refers to the differential voltage at the comparator inputs.
Open-drain output can be pulled to the range of +2.7V to +18V, regardless of VS.
The comparator response time specified is the interval between the input step function and the instant when the output crosses 1.4V.
The RESET input has an internal 2MΩ (typical) pull-down. Leaving RESET open results in a LOW state, with transparent comparator
operation.
VTHRESHOLD
0.592V 0.6V
Input Voltage
Hysteresis = VTHRESHOLD - 8mV
Figure 1. Typical Comparator Hysteresis
4
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INA201
INA202
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SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
ELECTRICAL CHARACTERISTICS: GENERAL
Boldface limits apply over the specified temperature range: TA = –40°C to +125°C.
At TA = +25°C, VS = +12V, VCM = +12V, VSENSE = 100mV, RL = 10kΩ to GND, RPULL-UP = 5.1kΩ connected from CMPOUT to
VS, and CMPIN = 1V, unless otherwise noted.
INA200, INA201, INA202
GENERAL PARAMETERS
CONDITIONS
MIN
TYP
MAX
UNIT
+18
V
POWER SUPPLY
Operating Power Supply
VS
Quiescent Current
+2.7
IQ
VOUT = 2V
Over Temperature
1350
VSENSE = 0mV
Comparator Power-On Reset Threshold (1)
1800
mA
1850
mA
1.5
V
TEMPERATURE
Specified Temperature Range
–40
+125
°C
Operating Temperature Range
–55
+150
°C
Storage Temperature Range
–65
+150
°C
Thermal Resistance
(1)
qJA
MSOP-8 Surface-Mount
200
°C/W
SO-8
150
°C/W
The INA200, INA201, and INA202 are designed to power-up with the comparator in a defined reset state as long as RESET is open or
grounded. The comparator is in reset as long as the power supply is below the voltage shown here. The comparator assumes a state
based on the comparator input above this supply voltage. If RESET is high at power-up, the comparator output comes up high and
requires a reset to assume a low state, if appropriate.
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INA201
INA202
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TYPICAL CHARACTERISTICS
At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
GAIN vs FREQUENCY
45
G = 20
25
20
30
G = 20
25
20
15
15
10
10
5
5
10k
100k
10k
1M
100k
Frequency (Hz)
Figure 2.
Figure 3.
GAIN PLOT
COMMON-MODE AND POWER-SUPPLY REJECTION
vs FREQUENCY
140
18
130
Common-Mode and
Power-Supply Rejection (dB)
100V/V
16
14
50V/V
12
10
8
20V/V
6
4
120
CMR
110
100
90
PSR
80
70
60
50
2
40
0
20
100
200
300
400
500
600
700
800
900
10
100
1k
10k
100k
Frequency (Hz)
Figure 4.
Figure 5.
OUTPUT ERROR vs VSENSE
OUTPUT ERROR vs COMMON-MODE VOLTAGE
4.0
0.1
3.5
0.09
0.08
3.0
Output Error (% )
Output Error
(% error of the ideal output value)
VDIFFERENTIAL (mV)
2.5
2.0
1.5
1.0
0.07
0.06
0.05
0.04
0.03
0.02
0.5
0.01
0
0
50
100 150
200
250 300
350 400 450 500
0
-16 -12 -8 -4
VSENSE (mV)
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0
4
8
12 16 20
...
76 80
Common-Mode Voltage (V)
Figure 6.
6
1M
Frequency (Hz)
20
VOUT (V)
G = 50
35
Gain (dB)
30
G = 100
40
G = 50
35
Gain (dB)
CLOAD = 1000pF
G = 100
40
GAIN vs FREQUENCY
45
Figure 7.
Copyright © 2006–2010, Texas Instruments Incorporated
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INA200
INA201
INA202
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SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
POSITIVE OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
QUIESCENT CURRENT vs OUTPUT VOLTAGE
3.5
12
11
VS = 12V
10
9
6
VS = 3V
5
Sourcing Current
+25°C
4
3
-40°C
Output stage is designed
to source current. Current
sinking capability is
approximately 400mA.
2
1
+125°C
0
0
2.0
1.5
1.0
0.5
0
5
10
20
15
25
30
0
1
2
3
4
5
7
9
10
9.5 10.5 11.5 17
18
6
8
Output Current (mA)
Output Voltage (V)
Figure 8.
Figure 9.
QUIESCENT CURRENT
vs COMMON-MODE VOLTAGE
OUTPUT SHORT-CIRCUIT CURRENT
vs SUPPLY VOLTAGE
34
VSENSE = 100mV
1.75
VS = 2.7V
VS = 12V
1.50
IQ (mA)
IQ (mA)
-40°C
+125°C
7
2.00
2.5
+25°C
8
Output Short-Circuit Current (mA)
Output Voltage (V)
3.0
Sourcing Current
1.25
VS = 12V
1.00
VS = 2.7V
VSENSE = 0mV
0.75
0.50
-16 -12 -8 -4
-40°C
30
+25°C
26
+125°C
22
18
14
10
6
0
4
8
12 16 20 24 28 32 36
2.5 3.5
4.5
5.5 6.5
7.5
8.5
VCM (V)
Supply Voltage (V)
Figure 10.
Figure 11.
STEP RESPONSE
STEP RESPONSE
G = 20
Output Voltage (50mV/div)
Output Voltage (500mV/div)
G = 20
VSENSE = 10mV to 20mV
VSENSE = 10mV to 100mV
Time (2ms/div)
Time (2ms/div)
Figure 12.
Figure 13.
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INA201
INA202
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
STEP RESPONSE
STEP RESPONSE
G = 50
Output Voltage (50mV/div)
Output Voltage (100mV/div)
G = 20
VSENSE = 90mV to 100mV
VSENSE = 10mV to 20mV
Time (2ms/div)
Time (5ms/div)
Figure 14.
Figure 15.
STEP RESPONSE
STEP RESPONSE
G = 50
Output Voltage (1V/div)
Output Voltage (100mV/div)
G = 50
VSENSE = 90mV to 100mV
VSENSE = 10mV to 100mV
Time (5ms/div)
Time (5ms/div)
Figure 16.
Figure 17.
STEP RESPONSE
COMPARATOR VOL vs ISINK
600
G = 100
Output Voltage (2V/div)
500
VOL (mV)
400
300
200
100
VSENSE = 10mV to 100mV
0
Time (10ms/div)
0
1
2
3
4
5
6
ISINK (mA)
Figure 18.
8
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Figure 19.
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INA201
INA202
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SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
COMPARATOR TRIP POINT vs SUPPLY VOLTAGE
COMPARATOR TRIP POINT vs TEMPERATURE
600
602
Comparator Trip Point (mV)
599
Reset Voltage (mV)
598
597
596
595
594
593
592
601
600
599
598
597
591
596
590
4
6
8
10
12
14
16
18
-50
0
-25
25
50
75
100
Supply Voltage (V)
Temperature (°C)
Figure 20.
Figure 21.
COMPARATOR PROPAGATION DELAY
vs OVERDRIVE VOLTAGE
COMPARATOR RESET VOLTAGE vs
SUPPLY VOLTAGE
200
1.2
175
1.0
Reset Voltage (V)
Propagation Delay (ns)
2
150
125
100
75
125
0.8
0.6
0.4
0.2
50
0
0
20
40
60
80
100 120 140
160 180
200
2
4
6
8
10
12
14
16
Overdrive Voltage (mV)
Supply Voltage (V)
Figure 22.
Figure 23.
COMPARATOR PROPAGATION DELAY vs
TEMPERATURE
COMPARATOR PROPAGATION DELAY
18
300
Propagation Delay (ns)
275
Input
200mV/div
250
225
200
Output
2V/div
175
150
125
-50
VOD = 5mV
-25
0
25
50
75
100
125
2ms/div
Temperature (°C)
Figure 24.
Figure 25.
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INA201
INA202
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APPLICATIONS INFORMATION
BASIC CONNECTIONS
Figure 26 shows the basic connections of the
INA200, INA201, and INA202. The input pins, VIN+
and VIN–, should be connected as closely as possible
to the shunt resistor to minimize any resistance in
series with the shunt resistance.
Power-supply bypass capacitors are required for
stability. Applications with noisy or high-impedance
power supplies may require additional decoupling
capacitors to reject power-supply noise. Connect
bypass capacitors close to the device pins.
POWER SUPPLY
The input circuitry of the INA200, INA201, and
INA202 can accurately measure beyond the
power-supply voltage, V+. For example, the V+ power
supply can be 5V, whereas the load power-supply
voltage is up to +80V. The output voltage range of
the OUT terminal, however, is limited by the voltages
on the power-supply pin.
ACCURACY VARIATIONS AS A RESULT OF
VSENSE AND COMMON-MODE VOLTAGE
The accuracy of the INA200, INA201, and INA202
current shunt monitors is a function of two main
variables: VSENSE (VIN+ – VIN–) and common-mode
voltage, VCM, relative to the supply voltage, VS. VCM is
expressed as (VIN+ + VIN–)/2; however, in practice,
VCM is seen as the voltage at VIN+ because the
voltage drop across VSENSE is usually small.
This section addresses the accuracy of these specific
operating regions:
• Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS
• Normal Case 2: VSENSE ≥ 20mV, VCM < VS
• Low VSENSE Case 1: VSENSE < 20mV, –16V ≤ VCM
<0
• Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤
VS
• Low VSENSE Case 3: VSENSE < 20mV, VS < VCM ≤
80V
RSHUNT
3mW
Load Supply
-18V to +80V
Load
5V Supply
INA200
(G = 20)
1
V+
2 OUT
CBYPASS
0.01mF
G
VIN+
8
VIN-
7
CMPOUT
6
RESET
5
RPULL-UP
4.7kW
0.6V
Reference
R1
3 CMPIN
Comparator
R2
4
GND
Transparent/Reset
Latch
Figure 26. INA200 Basic Connections
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Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS
This region of operation provides the highest
accuracy. Here, the input offset voltage is
characterized and measured using a two-step
method. First, the gain is determined by Equation 1.
VOUT1 - VOUT2
G=
100mV - 20mV
(1)
larger-than-normal offset can appear at the current
shunt monitor output with a typical maximum value of
VOUT = 300mV for VSENSE = 0mV. As VSENSE
approaches 20mV, VOUT returns to the expected
output value with accuracy as specified in the
Electrical Characteristics. Figure 27 illustrates this
effect using the INA202 (Gain = 100).
2.0
where:
1.8
1.6
VOUT2 = Output Voltage with VSENSE = 20mV
1.4
Then the offset voltage is measured at VSENSE =
100mV and referred to the input (RTI) of the current
shunt monitor, as shown in Equation 2.
VOUT1
VOSRTI (Referred-To-Input) =
- 100mV
G
(2)
In the Typical Characteristics, the Output Error vs
Common-Mode Voltage curve (Figure 7) shows the
highest accuracy for the this region of operation. In
this plot, VS = 12V; for VCM ≥ 12V, the output error is
at its minimum. This case is also used to create the
VSENSE ≥ 20mV output specifications in the Electrical
Characteristics table.
Normal Case 2: VSENSE ≥ 20mV, VCM < VS
This region of operation has slightly less accuracy
than Normal Case 1 as a result of the common-mode
operating area in which the part functions, as seen in
the Output Error vs Common-Mode Voltage curve
(Figure 7). As noted, for this graph VS = 12V; for VCM
< 12V, the Output Error increases as VCM becomes
less than 12V, with a typical maximum error of
0.005% at the most negative VCM = –16V.
Low VSENSE Case 1:
VSENSE < 20mV, –16V ≤ VCM < 0; and
Low VSENSE Case 3:
VSENSE < 20mV, VS < VCM ≤ 80V
Although the INA200 family of devices are not
designed for accurate operation in either of these
regions, some applications are exposed to these
conditions. For example, when monitoring power
supplies that are switched on and off while VS is still
applied to the INA200, INA201, or INA202, it is
important to know what the behavior of the devices
will be in these regions.
VOUT (V)
VOUT1 = Output Voltage with VSENSE = 100mV
1.2
Actual
1.0
0.8
Ideal
0.6
0.4
0.2
0
0
2
4
6
8
10
12
14
16
18
20
VSENSE (mV)
Figure 27. Example for Low VSENSE Cases 1 and 3
(INA202, Gain = 100)
Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS
This region of operation is the least accurate for the
INA200 family. To achieve the wide input
common-mode voltage range, these devices use two
op amp front ends in parallel. One op amp front end
operates in the positive input common-mode voltage
range, and the other in the negative input region. For
this case, neither of these two internal amplifiers
dominates and overall loop gain is very low. Within
this region, VOUT approaches voltages close to linear
operation levels for Normal Case 2. This deviation
from linear operation becomes greatest the closer
VSENSE approaches 0V. Within this region, as VSENSE
approaches 20mV, device operation is closer to that
described by Normal Case 2. Figure 28 illustrates this
behavior for the INA202. The VOUT maximum peak for
this case is tested by maintaining a constant VS,
setting VSENSE = 0mV and sweeping VCM from 0V to
VS. The exact VCM at which VOUT peaks during this
test varies from part to part, but the VOUT maximum
peak is tested to be less than the specified VOUT
tested limit.
As VSENSE approaches 0mV, in these VCM regions,
the
device
output
accuracy
degrades.
A
Copyright © 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): INA200 INA201 INA202
Submit Documentation Feedback
11
INA200
INA201
INA202
SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
2.4
2.2 INA202 VOUT Tested Limit
series with the inputs since the internal gain resistors
can vary up to ±30%. (If gain accuracy is not
important, then resistors can be added in series with
the INA200, INA201, and INA202 inputs with two
equal resistors on each input.)
(1)
VCM1
2.0
Ideal
1.8
VCM2
1.6
VOUT (V)
www.ti.com
1.4
VCM3
1.2
OUTPUT VOLTAGE RANGE
1.0
0.8
VOUT tested limit at
VSENSE = 0mV, 0 £ VCM1 £ VS.
VCM4
0.6
VCM2, VCM3, and VCM4 illustrate the variance
from part to part of the VCM that can cause
maximum VOUT with VSENSE < 20mV.
0.4
0.2
0
0
2
4
6
8
10
12
14
16
18
20
22
24
VSENSE (mV)
NOTE: (1) INA200 VOUT Tested Limit = 0.4V. INA201 VOUT Tested Limit = 1V.
Figure 28. Example for Low VSENSE Case 2
(INA202, Gain = 100)
SELECTING RS
The value chosen for the shunt resistor, RS, depends
on the application and is a compromise between
small-signal accuracy and maximum permissible
voltage loss in the measurement line. High values of
RS provide better accuracy at lower currents by
minimizing the effects of offset, while low values of
RS minimize voltage loss in the supply line. For most
applications, best performance is attained with an RS
value that provides a full-scale shunt voltage range of
50mV to 100mV. Maximum input voltage for accurate
measurements is 500mV.
TRANSIENT PROTECTION
The –16V to +80V common-mode range of the
INA200, INA201, and INA202 is ideal for withstanding
automotive fault conditions ranging from 12V battery
reversal up to +80V transients, since no additional
protective components are needed up to those levels.
In the event that the INA200, INA201, and INA202
are exposed to transients on the inputs in excess of
their ratings, then external transient absorption with
semiconductor transient absorbers (such as zeners)
will be necessary. Use of MOVs or VDRs is not
recommended except when they are used in addition
to a semiconductor transient absorber. Select the
transient absorber such that it will never allow the
INA200, INA201, and INA202 to be exposed to
transients greater than +80V (that is, allow for
transient absorber tolerance, as well as additional
voltage due to transient absorber dynamic
impedance). Despite the use of internal zener-type
ESD protection, the INA200, INA201, and INA202 do
not lend themselves to using external resistors in
12
Submit Documentation Feedback
The output of the INA200, INA201, and INA202 is
accurate within the output voltage swing range set by
the power supply pin, V+. This performance is best
illustrated when using the INA202 (a gain of 100
version), where a 100mV full-scale input from the
shunt resistor requires an output voltage swing of
+10V, and a power-supply voltage sufficient to
achieve +10V on the output.
INPUT FILTERING
An obvious and straightforward location for filtering is
at the output of the INA200, INA201, and INA202
series; however, this location negates the advantage
of the low output impedance of the internal buffer.
The only other option for filtering is at the input pins
of the INA200, INA201, and INA202, which is
complicated by the internal 5kΩ + 30% input
impedance; this is illustrated in Figure 29. Using the
lowest possible resistor values minimizes both the
initial shift in gain and effects of tolerance. The effect
on initial gain is given by Equation 3:
Gain Error % = 100 - 100 ´
5kW
5kW + RFILT
(3)
Total effect on gain error can be calculated by
replacing the 5kΩ term with 5kΩ – 30%, (or 3.5kΩ) or
5kΩ + 30% (or 6.5kΩ). The tolerance extremes of
RFILT can also be inserted into the equation. If a pair
of 100Ω 1% resistors are used on the inputs, the
initial gain error will be 1.96%. Worst-case tolerance
conditions will always occur at the lower excursion of
the internal 5kΩ resistor (3.5kΩ), and the higher
excursion of RFILT – 3% in this case.
Note that the specified accuracy of the INA200,
INA201, and INA202 must then be combined in
addition to these tolerances. While this discussion
treated accuracy worst-case conditions by combining
the extremes of the resistor values, it is appropriate to
use geometric mean or root sum square calculations
to total the effects of accuracy variations.
COMPARATOR
The INA200, INA201, and INA202 devices
incorporate an open-drain comparator. This
comparator typically has 2mV of offset and a 1.3ms
(typical) response time. The output of the comparator
latches and is reset through the RESET pin; see
Figure 30.
Copyright © 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): INA200 INA201 INA202
INA200
INA201
INA202
www.ti.com
SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
RSHUNT << RFILTER
3mW
VSUPPLY
Load
RFILTER < 100W
INA200-INA202
RFILTER <100W
CFILTER
VIN+
V+
1
OUT
2
CMPIN
3
GND
4
8
G
0.6V
Reference
VIN7
f-3dB
6
CMPOUT
f-3dB =
Comparator
5
1
2p(2RFILTER)CFILTER
RESET
SO-14, TSSOP-14
Figure 29. Input Filter (Gain Error—1.5% to –2.2%)
0.6V
VIN
0V
CMPOUT
RESET
Figure 30. Comparator Latching Capability
Copyright © 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): INA200 INA201 INA202
Submit Documentation Feedback
13
INA200
INA201
INA202
SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
www.ti.com
Shunt
Option 1
Shunt
Option 2
Supply
R3
To VIN+
To VIN-
To VIN-
To VIN+
4.5V to 5.5V
R4
Q1
2N3904
Load
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
1
V+
To VIN+
2 OUT
G
VIN+
8
VIN-
7
CMPOUT
6
RESET
5
Shunt
Option 3
From
Shunt Option
1, 2, or 3
To VIN-
0.6V
Reference
R1
3 CMPIN
Comparator
R2
4
GND
RESET
NOTE: Q1 cascodes the comparator output to drive a high-side FET (the 2N3904 shown is good up to 60V). The shunt could be located in
any one of the three locations shown. The latching capability should be used in shutdown applications to prevent oscillation at the trip point.
Figure 31. High-Side Switch Over-Current Shutdown
14
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Copyright © 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): INA200 INA201 INA202
INA200
INA201
INA202
www.ti.com
SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
Shunt
Option 1
Supply
To VIN+
4.5V to 5.5V
To VIN-
Load
To VIN+
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
1
V+
2 OUT
G
R4
2.2kW
VIN+
8
VIN-
7
From
Shunt Option
1, 2, or 3
To VIN-
R1
22kW
0.6V
Reference
R1
Shunt
Option 2
To VIN+
Shunt
Option 3
3 CMPIN
Comparator
R2
4
GND
CMPOUT
6
RESET
5
Q1
2N3904
To VIN-
RESET
NOTE: In this case, Q1 is used to invert the comparator output.
Figure 32. Low-Side Switch Over-Current Shutdown
Copyright © 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): INA200 INA201 INA202
Submit Documentation Feedback
15
INA200
INA201
INA202
SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
www.ti.com
RSHUNT
Supply
4.5V to 5.5V
1
V+
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
2 OUT
G
VIN+
8
VIN-
7
CMPOUT
6
RESET
5
R5
2.2kW
0.6V
Reference
R1
3 CMPIN
Comparator
R2
4
GND
1
V+
RESET
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
2 OUT
G
R6
2.2kW
VIN+
8
VIN-
7
CMPOUT
6
RESET
5
0.6V
Reference
R3
3 CMPIN
Comparator
R4
4
GND
CMPOUT
R7
200kW
RESET
NOTE: It is possible to set different limits for each direction.
Figure 33. Bidirectional Over-Current Comparator
16
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Copyright © 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): INA200 INA201 INA202
INA200
INA201
INA202
www.ti.com
SBOS374C – NOVEMBER 2006 – REVISED OCTOBER 2010
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (October, 2007) to Revision C
Page
•
Changed title of data sheet ................................................................................................................................................... 1
•
Updated document format to current standards ................................................................................................................... 1
•
Revised front-page figure ..................................................................................................................................................... 1
Copyright © 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): INA200 INA201 INA202
Submit Documentation Feedback
17
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA200AID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
200A
INA200AIDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
200A
INA200AIDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQH
INA200AIDGKRG4
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQH
INA200AIDGKT
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQH
INA200AIDGKTG4
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQH
INA200AIDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
200A
INA200AIDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
200A
INA201AID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
201A
INA201AIDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
201A
INA201AIDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQJ
INA201AIDGKRG4
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
BQJ
INA201AIDGKT
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQJ
INA201AIDGKTG4
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
BQJ
INA201AIDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
201A
INA201AIDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
201A
INA202AID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
202A
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA202AIDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
202A
INA202AIDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQL
INA202AIDGKRG4
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
BQL
INA202AIDGKT
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQL
INA202AIDGKTG4
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
BQL
INA202AIDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
202A
INA202AIDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA
202A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA200, INA201, INA202 :
• Automotive: INA200-Q1, INA201-Q1, INA202-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
INA200AIDGKR
VSSOP
DGK
8
INA200AIDGKT
VSSOP
DGK
INA200AIDR
SOIC
D
INA201AIDGKR
VSSOP
INA201AIDGKT
VSSOP
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
8
250
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
DGK
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA201AIDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
INA202AIDGKR
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA202AIDGKT
VSSOP
DGK
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA202AIDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Nov-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA200AIDGKR
VSSOP
DGK
8
2500
366.0
364.0
50.0
INA200AIDGKT
VSSOP
DGK
8
250
366.0
364.0
50.0
INA200AIDR
SOIC
D
8
2500
367.0
367.0
35.0
INA201AIDGKR
VSSOP
DGK
8
2500
367.0
367.0
35.0
INA201AIDGKT
VSSOP
DGK
8
250
210.0
185.0
35.0
INA201AIDR
SOIC
D
8
2500
367.0
367.0
35.0
INA202AIDGKR
VSSOP
DGK
8
2500
367.0
367.0
35.0
INA202AIDGKT
VSSOP
DGK
8
250
210.0
185.0
35.0
INA202AIDR
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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