Allegro A1184 Two-wire, programmable, chopper-stabilized, unipolar hall-effect switch Datasheet

A1180 – A1184
Preliminary Data Sheet
PRELIMINARY DATA SHEET
SUBJECT TO CHANGE WITHOUT NOTICE
See typical application drawing for UA pinning.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
VCC …………………………………….. 26.5 V
Reverse-Battery Voltage
VRB ……………………………………… -18 V
Magnetic Flux Density
B …………………………………… Unlimited
Package Power Dissipation θja,
UA…………………………………. 206 °C/W
LH1……………………………….….248 °C/W
Junction Temperature, TJ ……………….. +170°C
Operating Temperature Range, TA
Suffix “E” …………….……. - 40 °C to + 85 °C
Suffix “L” …………………. - 40 °C to + 150 °C
Storage Temperature Range
TS ………………………… -65 °C to +170 °C
1
Two-Wire, Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switch
The A118X is a two-wire, unipolar, Hall-effect switch family designed
for use in high-temperature applications. This device uses a patented high
frequency chopper-stabilization technique on Allegro's new DABIC5
BiCMOS wafer fabrication process to achieve magnetic stability and to
eliminate offset inherent in single-element devices and from harshapplication environments.
The A118X FAMILY of devices incorporates a programmability
function to allow for external trimming of the operate point.
The
programming is performed after final packaging of the sensor and
placement of the Single In-Line Package (SIP) into the application. This
advanced feature allows for optimization of sensor switching performance
by effectively accounting for variations caused by magnet and SIP
placement tolerances.
These devices provide on-chip transient protection. A zener clamp on
the power supply protects against over-voltage conditions on the supply
line.
The output of the A118X FAMILY, with the exception of the A1180/2,
will switch HIGH in the presence of a sufficiently large south-pole magnetic
field and will switch LOW with the removal of the field. The A1180/2 has
the opposite polarity as the others, switching LOW in the presence of a
sufficient magnetic field and HIGH with the removal of the field.
Two package styles provide a magnetically optimized package for
most applications. Suffix “LH” is a miniature low profile package for
surface-mount applications; suffix “UA” is a three-lead ultra-mini Single
Inline Package (SIP) for through-hole mounting.
Factory programmed versions also available, see A1140/42/43/45.
Programming software and/or hardware demonstration kits also available
see ASEK-01 on the Allegro web site, www.allegromicro.com.
FEATURES / BENEFITS
♦ Chopper Stabilization
s Extremely low switch-point drift
s Low stress sensitivity
♦ One-time external programmability
s Operate Point
♦ On-chip Protection
s Supply transient protection
s Robust ESD/EMC protection
s Reverse-battery protection
♦ On-board Voltage Regulator
s 3.8 V to 24 V operation
Order by complete part number (i.e. A1182LUA).
The “LH” PPD is based on a 0.062" thick FR4, single-sided board using 2 oz. copper, with a 0.55 mm2 area of copper attached to the ground lead.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
CHARACTERISTICS
Valid over operating temperature range unless otherwise noted.
Part Number
Characteristics
Symbol
Limits
Test Conditions
Min.
Typ.
Max.
Units
3.8
-
24
V
ELECTRICAL CHARACTERISTICS
A118X FAMILY
Supply Voltage
A1182/3/4
Supply Current
A1180/1
2
VCC
Supply Current
3
A118X
IGND(L)
Output I Low
5
-
6.9
mA
IGND(H)
Output I High
12
-
17
mA
IGND(L)
Output I Low
2
-
5
mA
IGND(H)
Output I High
12
-
17
mA
-
20
-
us
-
20
-
us
Output Rise Time
tr
3
tf
Output Fall Time
Operating
RL=100 Ohms,
CBYP=0.1uF
RL=100 Ohms,
CBYP=0.1uF
Chopping Frequency
fC
-
-
340
-
kHz
Power-Up Time
ton
-
-
-
25
µs
Power-Up State
POS
-
HIGH
-
-
I = 10mA
28
36
40
V
B>Bop,
IGND=Low (A1180/2)
IGND=High (A1181/3)
60
Zener Voltage
VZ
t < ton, tr < 5us,
no bypass capacitor
MAGNETIC CHARACTERISTICS
A1180/1/2/3
4
Minimum Programmable
Operate Point
Maximum Programmable
Operate Point
Switch Point Step Size
A1184
5
Minimum Programmable
Operate Point
Maximum Programmable
Operate Point
Switch Point Step Size
BOPmin
BOPmax
BRES
BOPmin
BOPmax
BRES
Number of Programming
Bits
-
Temperature Drift of BOP
∆BOP
Hysterisis
BHYS
A118X
200
B>Bop,
IGND=High (A1184)
G
G
8
G
300
G
600
-
G
16
G
Switch Point
-
5
-
Bit(s)
Programming Lock
-
1
-
Bit(s)
+/-20
G
30
G
A1180-A1183
BOP - BRP
5
15
2
These are the A3161 current levels.
Typical rise and fall time of the Hall sensor is 1us, the true rise and fall time is dependent on the load circuit as indicated by the 20us specification.
4
Programming is typically performed at Ta = 25°C and does not take into account temperature drift of the switch point. See ∆BOP.
5
Programming is typically performed at Ta = 25°C and does not take into account temperature drift of the sw itch point. ∆BOP has not yet been
characterized for the A1184 and may require additional tolerance due to the high magnetic switch points.
3
Rev. 1.8 25 April 2003
Page 2
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
FUNCTIONAL BLOCK DIAGRAM
Supply
Program /
Lock
Reg
Programmmin
g Logic
AMP
To all
subcircuits
Offset
Adjust
S/H
LPF
GND
Clock/Logi
c
Optional
("UA" GND
ONLY-Pin 3)
A1180/2 Hysteresis Curve
A1181/3/4 Hysteresis Curve
+I
+I
IccHigh
Brp
Output Current
Output Current
IccHigh
Bop
Brp
IccLow
0
Bop
IccLow
0
0
Flux Density
Rev. 1.8 25 April 2003
Page 3
+B
0
Flux Density
+B
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
Typical Characterization Data
All data is the average of 1 Lot, >1000 Units
Vcc=24v
Bop 85G trim
94
140
90
Switch point (G)
Switch point (G)
160
Vcc= 3.8v
92
Bop programming values
180
Vcc= 12v
88
86
84
82
120
100
80
60
40
80
20
78
-40 C
25 C
0
85 C
0
1
Temperature (C)
3
4
5
Significant Bit
Vcc= 24v
Iccon
17
Vcc= 12v
16.5
Vcc= 3.8v
Vcc =12v
6.8
16
6.6
15.5
6.4
15
14.5
14
13.5
Vcc =3.8v
6.2
6
5.8
5.6
13
5.4
12.5
5.2
12
Vcc =24v
Iccoff
Current (mA)
Current (mA)
2
5
-40 C
25 C
Temperature (C)
Rev. 1.8 25 April 2003
Page 4
85 C
-40 C
25 C
85 C
Temperature (C)
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
Functional Description
Chopper-Stabilization Technique. A limiting factor for switch point accuracy when using Hall effect technology is the
small signal voltage developed across the Hall plate. This voltage is proportionally small relative to the offset that can be
produced at the output of the Hall sensor. This makes it difficult to process the signal and maintain an accurate, reliable
output over the specified temperature and voltage range.
Chopper Stabilization is a unique approach used to minimize Hall offset on the chip. The Allegro patented technique;
dynamic quadrature offset cancellation, removes key sources of the output drift induced by temperature and package
stress. This offset reduction technique is based on a signal modulation-demodulation process. The undesired offset
signal is separated from the magnetically induced signal in the frequency domain through modulation. The subsequent
demodulation acts as a modulation process for the offset causing the magnetically induced signal to recover its original
spectrum at base band while the dc offset becomes a high frequency signal. Then, using a low-pass filter the signal
passes while the modulated dc offset is suppressed.
The chopper stabilization technique uses a 170 kHz high frequency clock. The Hall plate chopping occurs on each clock
edge resulting in a 340 kHz chop frequency. The high frequency operation allows for a greater sampling, which produces
higher accuracy and faster signal processing capability. Using this chopper stabilization approach, the chip is desensitized to the effects of temperature and stress. This technique produces devices that have an extremely stable
quiescent Hall output voltage, is immune to thermal stress, and has precise recoverability after temperature cycling. This
technique is made possible through the use of a BiCMOS process which allows the use of low offset and low noise
amplifiers in combination with high-density logic integration and sample and hold circuits.
The repeatability of switching with a magnetic field is slightly affected using a chopper technique. Allegro’s high frequency
chopping approach minimizes the affect of jitter and makes it imperceptible in most applications. Applications that may
notice the degradation are those that require the precise sensing of alternating magnetic fields such as ring magnet speed
sensing. For those applications, Allegro recommends the “low jitter” family of digital sensors.
Regulator
Amplifier
Sample/
Hold
CLOCK
Hall Element
Concept of Dynamic Quadrature Offset Cancellation
Rev. 1.8 25 April 2003
Page 5
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
PROGRAMMING PROTOCOL
The operate points are programmed by serially addressing the devices through the supply terminal VCC (pin 1). After the
correct operate point is determined, the device programming bits are permanently blown, and a locking bit is blown to
prevent any further programming.
Switch Point Program Enable. To program the device, a keying sequence is used to activate / enable the addressing
mode as shown in Figure 1. This sequence consisting of a VPP pulse, one VPH pulse, and a VPP pulse with no supply
interruptions, is designed to prevent the device from being programmed accidentally (e.g., as a result of noise on the
supply line).
Figure 1. Program Enable Pulse Sequence.
Valid over operating temperature range unless otherwise noted.
Part Number
Characteristics
Symbol
Limits
Test Conditions
Min.
Typ.
Max.
Units
4.5
5
5.5
V
VPH
11.5
12.5
13.5
V
VPP
25
26
27
V
-
190
-
mA
20
-
-
µs
20
-
-
µs
100
300
-
µs
PROGRAMMING PROTOCOL (T A = +25 °C)
VPL
Programming Voltage
Programming Current
A118X Family
Pulse width
6
Minimum voltage range
during programming
IPP
tr = 11us, 5V→26V,
Cbypass = 0.1uF
td(0)
OFF time between bits
td(1)
tdP
Pulse duration for enable
and addressing
sequences
Pulse duration for fuse
blowing
Pulse Rise Time
tr
VPL to VPH or VPP
5
-
100
µs
Pulse Fall Time
tf
VPH or VPP to VPL
5
-
100
µs
6
Programming Voltages are measured at Pin #1 (Vcc) of SIP. A minimum capacitance of 0.1uF must be connected from Vcc to GND of the SIP to
provide the current necessary to blow the fuse.
Rev. 1.8 25 April 2003
Page 6
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
…PROGRAMMING PROTOCOL CONT INUED
Address N
(Up to 31)
Address N-1
Address N-2
Address 3
Address 2
Address 1
Addressing. The magnetic operate point (Bop) is adjustable using 5 bits or 31 addresses. The 31 addresses are
sequentially selected (Figure 2) until the required operate point is reached. Note that the difference between Bop and the
magnetic release point (Brp), the Hysteresis (Hys), is fixed for all addresses.
VPH
VPL
td(1)
td(0)
0
Figure 2. Sequential selected addresses.
Code Programming. After the desired switch point address is selected (0 through 31), each bit of the corresponding
binary address should be programmed individually, not at the same time. For example, to program code 5 (binary
000101), bits 1 (code 1) and bit 3 (code 4) need to be programmed. Bit programming is accomplished by addressing the
code and applying a VPP pulse, the programming is not reversible. An appropriate sequence for blowing code 5 is shown
in Figure 3.
Figure 3. Bit programming.
Lock-Bit Programming. After the desired code is programmed, the lock bit, or code 32, can be programmed (figure 4) to
prevent further programming of the device.
Figure 4. Lock-bit programming
See Allegro website at http://www.allegromicro.com for extensive information on device programming as well as
programming products. Programming hardware is available for purchase and programming software is available for free.
Rev. 1.8 25 April 2003
Page 7
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
TYPICAL APPLICATION CIRCUIT
Applications. It is necessary that an external bypass capacitor be connected between the supply and ground of the
device to reduce both external noise and noise generated by the chopper-stabilization technique and ensure sufficient
energy to guarantee proper programming. (A 0.1uF cap is recommended for proper fuse blowing and may reside on the
programming board) The bypass capacitor in the application should be no further than 5 mm away from the Hall sensor.
The bypass capacitor is to protect the Hall IC only. All high frequency interferences conducted along the supply lines will
be passed directly to the load through the bypass capacitor. Therefore, the ECU must have sufficient protection other
than the bypass capacitor placed in parallel with the Hall IC.
A series resistor on the supply side, Rs (not shown), in combination with the bypass capacitor will create a filter for EMC
pulses. The series resistor (Rs) and/or sense resistor (Rsense) will have voltage drops across them that must be
considered for the minimum Vcc requirement of the device. The preferred sense resistor value is approximately 100
ohms. All programming, code and lock-bit programming, should be done directly across the part, between VCC and
Output with the use of a 0.1uF bypass capacitor. Programming across the series resistor or sense resistor may not allow
enough energy to properly blow the fuses. The result would be incorrect switch points.
Typical Application (UA Pkg):
Vcc
1
0.01uF
VSupply
A118X
OUTPUT
2
ECU
3
Optional OUTPUT
UA ONLY
RSENSE
Extensive applications information on magnets and Hall-effect sensors including Chopper-Stabilization is available in the
Allegro Electronic Data Book CD, or at the website: http://www.allegromicro.com .
Rev. 1.8 25 April 2003
Page 8
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
DEVICE QUALIFICATION PROGRAM
Test Name
Test
Length
# of
Lots
Sample /
lot
Ta = 150°C, Tj ? 170°C
408 hrs
1
77
JESD22-A108
Ta = 170°C
1000 hrs
1
77
JESD22-A103
Test Conditions
Comments
Pre/Post Test
High Temperature
Operating Life (HTOL)
High Temperature Bake
(HTB)
Pre Conditioning (PC)
Ta = room, hot, cold
85°C/85%RH
168 hrs
1
231
JESD22-A112 & A113
Temperature Humidity
Bias (THB) or HAST
85°C/85%RH
130°C/85%RH
1000 hrs
50 hrs
1
77
JESD22-A101
JESD22-A110
Autoclave (AC)
121°C/15 psig
-65°C to +150°C
or
-50°C to +150°C
1
77
JESD22-A102
1
77
JESD22-A104
Temperature Cycle (TC)
96 hrs
500 cycles
1000 cycles
External Visual (EV)
Physical Dimensions (PD)
Lead Integrity
Bond Pull Strength
ESD
1
1
1
HBM & MM
1
Solderability (SD)
1
Early Life Failure Rate
(ELFR)
125°C
or
150°C
Gate Leakage (GL)
Electrical Distributions
(ED)
Ta = room, hot, cold
30
45
30
3 per model JESD22-A114 & A115,CDFper V step AEC-Q100-002, 003 & 011
15
JESD22-B102
48 hrs
1
800
1
6
3
30
JESD22-A108
24 hrs
CDF- AEC-Q100-006
EMC Requirements (Electromagnetic Compatibility)
Please contact your local representative for EMC results
Test Name
Reference Specification
ESD – Human Body Model
ESD – Machine Model
Conducted Transients
AEC-Q100-002
AEC-Q100-003
ISO 7637-1
Direct RF Injection
ISO 11452-7
Bulk Current Injection
TEM Cell
ISO 11452-4
ISO 11452-3
Rev. 1.8 25 April 2003
Page 9
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
POWER DE-RATING
Maximum Allowable Power
Calculation for A118X Family 7:
Due to internal power consumption, the junction
temperature of the IC, Tj, is higher than the ambient
environment temperature, Ta. To ensure that the device
does not operate above the maximum rated junction
temperature use the following calculations:
∆T = PD * Rθja
Where: PD = Vcc * Icc
∴ ∆T=Vcc * Icc * Rθja
Where ∆T denotes the temperature rise resulting from the
IC’s power dissipation.
Assume:
Ta = Tamax = 150 °C
Tj(max) = 170°C
Icc = IONmax = 17 mA
If:
Tj = Ta + ∆T
Then:
∆Tmax = Tjmax – Ta max = 170 °C - 150 °C = 20 °C
If:
∆T = PD * Rθja
Tj = Ta + ∆T
For the sensor :
Tj(max) = 170°C
Rθja (UA Pkg) = 206°C/W
Then:
PDmax = ∆Tmax / Rθja = 20 °C / 206 °C/W = 97.1
mW
If:
PD = Vcc * Icc
Typical Tj calculation:
Ta = 25 °C
Vcc = 12 V
Icc = IccONtyp = 14.5 mA
Then the maximum Vcc at 150°C is therefore:
Vccmax = PDmax / Icc = 97.1 mW / 17 mA = 5.7 V
PD = Vcc * Icc = 12 V * 14.5 mA = 174 mW
Tj = Ta + ∆T = 25 °C + 35.8 °C = 60.8 °C
Maximum Supply Voltage vs Ambient Temperature
30
Maximum Supply
Voltage (V)
∆T = PD * Rθja = 174 mW * 206°C/W = 35.8 °C
Dissipation
25
20
UA (ROJA = 206°C/W)
LH (ROJA = 228°C/W)
15
10
5
0
0
25
50
75
100
125
150
Temperature (°C)
7
The “LH” PPD is based on a 0.062" thick FR4, single-sided board using 2 oz. copper, with a 0.55 mm2 area of copper attached to the ground lead.
Rev. 1.8 25 April 2003
Page 10
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
Rev. 1.8 25 April 2003
Page 11
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
Rev. 1.8 25 April 2003
Page 12
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
Rev. 1.8 25 April 2003
Page 13
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
TWO-WIRE, PROGRAMMABLE, UNIPOLAR HALL-EFFECT SWITCH FAMILY
(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)
The products described herein are manufactured under one or
more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283;
5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719;
5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to
time, such departures from the detail specifications as may be
required to permit improvements in the performance, reliability, or
manufacturability of its products. Before placing an order, the user is
cautioned to verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components
in life-support appliances, devices, or systems without express written approval.
The information included herein is believed to be accurate and
reliable. However, Allegro MicroSystems, Inc. assumes no responsibility
for its use; nor for any infringements of patents or other rights of
third parties that may result from its use.
Rev. 1.8 25 April 2003
Page 14
115 Northeast Cutoff, Box 15036
Worcester, Massachus etts 01615-0036 (508) 853-5000
Copyright © 1993, 1995 Allegro MicroSystems, Inc.
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