ON NTLJS3113P Power mosfet −20 v, −7.7 a, ucool tm single 2x2 mm, wdfn package Datasheet

NTLJS3113P
Power MOSFET
−20 V, −7.7 A, mCoolt Single P−Channel,
2x2 mm, WDFN Package
Features
• WDFN Package Provides Exposed Drain Pad for Excellent Thermal
•
•
•
•
•
Conduction
2x2 mm Footprint Same as SC−88 Package
Lowest RDS(on) Solution in 2x2 mm Package
1.5 V RDS(on) Rating for Operation at Low Voltage Logic Level Gate
Drive
Low Profile (< 0.8 mm) for Easy Fit in Thin Environments
This is a Pb−Free Device
http://onsemi.com
V(BR)DSS
RDS(on) MAX
40 mW @ −4.5 V
50 mW @ −2.5 V
−20 V
−7.7 A
75 mW @ −1.8 V
200 mW @ −1.5 V
S
Applications
• DC−DC Converters (Buck and Boost Circuits)
• Optimized for Battery and Load Management Applications in
•
ID MAX (Note 1)
G
Portable Equipment such as, Cell Phones, PDA’s, Media Players, etc.
High Side Load Switch
D
P−CHANNEL MOSFET
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Symbol
Value
Unit
VDSS
−20
V
VGS
±8.0
V
ID
−5.8
A
Steady
State
TA = 25°C
TA = 85°C
−4.4
t≤5s
TA = 25°C
−7.7
Steady
State
PD
1.9
ID
−3.5
Power Dissipation
(Note 2)
Pulsed Drain Current
Steady
State
WDFN6
CASE 506AP
TA = 85°C
TA = 25°C
tp = 10 ms
A
0.7
W
PIN CONNECTIONS
D
1
IDM
−23
A
TJ, TSTG
−55 to
150
°C
D
2
Source Current (Body Diode) (Note 2)
IS
−2.8
A
G
3
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Operating Junction and Storage Temperature
6
5
4
J8 = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
W
−2.5
PD
1
2 J8MG
G
3
Pin 1
3.3
TA = 25°C
MARKING
DIAGRAM
D
TA = 25°C
t≤5s
Continuous Drain
Current (Note 2)
S
D
S
6
D
5
D
4
S
(Top View)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size,
(30 mm2, 2 oz Cu).
ORDERING INFORMATION
Device
Package
Shipping †
NTLJS3113PT1G
WDFN6
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 3
1
Publication Order Number:
NTLJS3113P/D
NTLJS3113P
THERMAL RESISTANCE RATINGS
Symbol
Max
Junction−to−Ambient – Steady State (Note 3)
Parameter
RqJA
65
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
38
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
180
Unit
°C/W
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu).
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
−20
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = −250 mA
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
ID = −250 mA, Ref to 25°C
Zero Gate Voltage Drain Current
IDSS
VDS = −16 V, VGS = 0 V
mV/°C
TJ = 25°C
−1.0
TJ = 85°C
−10
IGSS
VDS = 0 V, VGS = ±8.0 V
VGS(TH)
VGS = VDS, ID = −250 mA
Gate−to−Source Leakage Current
V
−10.1
±1.0
mA
mA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Gate Threshold
Temperature Coefficient
Drain−to−Source On−Resistance
VGS(TH)/TJ
−0.67
−1.0
2.68
RDS(on)
Forward Transconductance
−0.45
gFS
V
mV/°C
VGS = −4.5, ID = −3.0 A
32
40
VGS = −2.5, ID = −3.0 A
44
50
VGS = −1.8, ID = −2.0 A
67
75
VGS = −1.5, ID = −1.8 A
90
200
VDS = −16 V, ID = −3.0 A
5.9
S
1329
pF
mW
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
VGS = 0 V, f = 1.0 MHz,
VDS = −16 V
213
120
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
2.9
RG
14.4
W
td(ON)
6.9
ns
Gate Resistance
13
VGS = −4.5 V, VDS = −16 V,
ID = −3.0 A
15.7
nC
1.5
2.2
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = −4.5 V, VDD = −10 V,
ID = −3.0 A, RG = 3.0 W
tf
17.5
60
56.5
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Recovery Voltage
Reverse Recovery Time
VSD
TJ = 25°C
−0.78
TJ = 125°C
−0.67
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Time
VGS = 0 V, IS = −1.0 A
70.8
VGS = 0 V, dISD/dt = 100 A/ms,
IS = −1.0 A
QRR
14.3
http://onsemi.com
2
V
106
ns
56.4
44
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
−1.2
nC
NTLJS3113P
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
VGS = −1.7 V to −8 V
TJ = 25°C
9
−1.6 V
−ID, DRAIN CURRENT (AMPS)
−ID, DRAIN CURRENT (AMPS)
7
6
−1.5 V
5
4
−1.4 V
3
2
−1.3 V
1
−1.2 V
−1.1 V
7
6
5
4
3
TJ = 25°C
2
1
TJ = 125°C
1
2
3
5
4
6
0
1
0.5
1.5
2
2.5
3
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
0.04
VGS = −4.5 V
TJ = 100°C
0.03
TJ = 25°C
TJ = −55°C
0.02
1.0
1.5
2.0
2.5
3.0
0.08
TJ = 25°C
0.07
VGS = −1.8 V
0.06
0.05
VGS = −2.5 V
0.04
0.03
VGS = −4.5 V
0.02
0.01
1
2
−ID, DRAIN CURRENT (AMPS)
3
4
5
6
7
−ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus Drain Current
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
100000
1.5
VGS = 0 V
ID = −6 A
VGS = −4.5 V
−IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
TJ = −55°C
0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VDS ≥ 10 V
8
1.3
1.1
0.9
0.7
−50
−25
0
25
50
75
100
125
150
10000
TJ = 150°C
1000
TJ = 100°C
100
10
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
http://onsemi.com
3
20
NTLJS3113P
VDS = VGS = 0 V
C, CAPACITANCE (pF)
2400
TJ = 25°C
Ciss
2000
1600
1200
Crss
800
Coss
400
0
5
0
VGS
5
10
15
5
4
16
3
VDS
2 QGS
12
VGS
QGD
8
1
4
ID = −3.0 A
TJ = 25°C
0
20
0
Figure 7. Capacitance Variation
1000
0
4
8
12
QG, TOTAL GATE CHARGE (nC)
VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
−Is, SOURCE CURRENT (AMPS)
3
VDD = −15 V
ID = −3.0 A
VGS = −4.5 V
td(off)
tf
100
tr
td(on)
10
1
10
RG, GATE RESISTANCE (OHMS)
VGS = 0 V
2.5
2
1.5
1
TJ = 150°C
0.5
TJ = 25°C
0
0
1
100
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
0.2
0.4
0.8
0.6
1.0
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
100
−ID, DRAIN CURRENT (AMPS)
t, TIME (ns)
20
QT
−VDS , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
2800
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
10
See Note 2, Page 1
SINGLE PULSE
TC = 25°C
100 ms
1 ms
10 ms
1
0.1
0.01
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
dc
1
10
100
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
http://onsemi.com
4
NTLJS3113P
EFFECTIVE TRANSIENT THERMAL RESISTANCE
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
1000
100 D = 0.5
0.2
0.1
10 0.05
P(pk)
0.02
0.01
1
t1
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
0.1
0.000001
See Note 2 on Page 1
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TA = P(pk) RqJA(t)
0.00001
0.0001
0.001
0.01
0.1
t, TIME (sec)
Figure 12. Thermal Response
http://onsemi.com
5
1
10
100
1000
NTLJS3113P
PACKAGE DIMENSIONS
WDFN6
CASE 506AP−01
ISSUE A
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND
IS MEASURED BETWEEN 0.15 AND 0.20mm FROM
TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
WELL AS THE TERMINALS.
5. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL
LEAD IS CONNECTED TO TERMINAL LEAD # 4.
6. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG.
A
B
PIN ONE
REFERENCE
0.10 C
2X
ÍÍ
ÍÍ
E
DIM
A
A1
A3
b
b1
D
D2
E
E2
e
K
L
L2
J
J1
0.10 C
2X
A3
0.10 C
A
0.08 C
7X
A1
C
D2
6X
SEATING
PLANE
SOLDERMASK DEFINED
MOUNTING FOOTPRINT
4X
e
L2
L
1
2.30
3
b1
6X
0.10 C A
E2
4
b
1
0.10 C A
0.05 C
0.60
1.25
6X
J
J1
6X
0.35
0.43
NOTE 5
6
1.10
6X
B
0.05 C
K
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
0.51
0.61
2.00 BSC
1.00
1.20
2.00 BSC
1.10
1.30
0.65 BSC
0.15 REF
0.20
0.30
0.20
0.30
0.27 REF
0.65 REF
B
0.35
NOTE 3
0.34
BOTTOM VIEW
0.65
PITCH
0.66
DIMENSIONS: MILLIMETERS
mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
Literature Distribution Center for ON Semiconductor
USA/Canada
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Phone: 81−3−5773−3850
Email: [email protected]
http://onsemi.com
6
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NTLJS3113P/D
Similar pages