ON NTHD3101F Power mosfet and schottky diode Datasheet

NTHD3101F
Power MOSFET and
Schottky Diode
−20 V, FETKYt, P−Channel, −4.4 A, with
4.1 A Schottky Barrier Diode, ChipFETt
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Features
•
•
•
•
•
•
•
Leadless SMD Package Featuring a MOSFET and Schottky Diode
40% Smaller than TSOP−6 Package
Leadless SMD Package Provides Great Thermal Characteristics
Independent Pinout to each Device to Ease Circuit Design
Trench P−Channel for Low On Resistance
Ultra Low VF Schottky
Pb−Free Packages are Available
Applications
•
•
•
•
MOSFET
RDS(on) TYP
V(BR)DSS
64 mW @ −4.5 V
−20 V
SCHOTTKY DIODE
VR MAX
VF TYP
IF MAX
20 V
0.510 V
4.1 A
Gate−to−Source Voltage
Continuous Drain
Current (Note 1)
Steady
State
TJ = 25°C
G
t≤5s
TJ = 25°C
Power Dissipation
(Note 1)
Steady
State
Symbol
Value
Units
VDSS
−20
V
VGS
±8.0
V
ID
−3.2
A
TJ = 85°C
D
P−Channel MOSFET
−4.4
PD
ChipFET
CASE 1206A
STYLE 3
1
W
1.1
TJ = 25°C
2.1
IDM
−13
A
TJ, TSTG
−55 to
150
°C
PIN
CONNECTIONS
Source Current (Body Diode)
IS
2.5
A
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
tp = 10 ms
Operating Junction and Storage Temperature
Peak Repetitive Reverse Voltage
DC Blocking Voltage
Steady
State
Symbol
Value
Units
VRRM
20
V
VR
20
V
IF
2.2
V
4.1
A
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 3
2
7
6
C
1
8
C
2
7
D
3
D
4
6
3
TJ = 25°C
t≤5s
8
S
(TJ = 25°C unless otherwise noted)
Parameter
A
1
MARKING
DIAGRAM
D1 M
G
SCHOTTKY DIODE MAXIMUM RATINGS
Average Rectified
Forward Current
C
Schottky Diode
8
−2.3
t≤5s
Pulsed Drain Current
A
S
MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Drain−to−Source Voltage
−4.4 A
85 mW @ −2.5 V
Li−Ion Battery Charging
High Side DC−DC Conversion Circuits
High Side Drive for Small Brushless DC Motors
Power Management in Portable, Battery Powered Products
Parameter
ID MAX
1
G
4
5
5
D1 = Specific Device Code
M = Month Code
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
NTHD3101F/D
NTHD3101F
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Units
Junction−to−Ambient – Steady State (Note 2)
RqJA
113
°C/W
Junction−to−Ambient – t ≤ 10 s (Note 2)
RqJA
60
°C/W
2. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces).
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Test Conditions
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = −250 mA
−20
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Parameter
Typ
Max
Units
OFF CHARACTERISTICS
V
−15
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±8.0 V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = −250 mA
Gate Threshold
Temperature Coefficient
VGS(TH)/TJ
VDS = −16 V, VGS = 0 V
TJ = 25°C
mV/°C
−1.0
TJ = 125°C
mA
−5.0
±100
nA
ON CHARACTERISTICS (Note 3)
Drain−to−Source On−Resistance
RDS(on)
Forward Transconductance
gFS
−0.45
−1.5
2.7
VGS = −4.5, ID = −3.2 A
64
V
mV/°C
80
mW
VGS = −2.5, ID = −2.2 A
85
110
VGS = −1.8, ID = −1.0 A
120
170
VDS = −10 V, ID = −2.9 A
8.0
S
680
pF
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
VGS = 0 V, f = 1.0 MHz,
VDS = −10 V
100
70
Total Gate Charge
QG(TOT)
7.4
Threshold Gate Charge
QG(TH)
0.6
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
VGS = −4.5 V, VDS = −10 V,
ID = −3.2 A
nC
1.4
2.5
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
5.8
tr
11.7
td(OFF)
VGS = −4.5 V, VDD = −10 V,
ID = −3.2 A, RG = 2.4 W
ns
16
tf
12.4
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
−0.8
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V, IS = −2.5 A
−1.2
V
ns
13.5
9.5
VGS = 0 V, IS = −1.0 A ,
dIS/dt = 100 A/ms
4.0
QRR
6.5
nC
SCHOTTKY DIODE ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Test Conditions
Maximum Instantaneous
Forward Voltage
Parameter
VF
IF = 0.1 A
0.425
IF = 1.0 A
0.510
Maximum Instantaneous
Reverse Current
IR
VR = 10 V
1.0
VR = 20 V
5.0
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
Min
Typ
Max
Units
V
0.575
mA
NTHD3101F
TYPICAL P−CHANNEL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
VGS = −5 V to −3.6 V
VGS = −3 V
−2.6 V
8
7
6
9
TJ = 25°C
−ID, DRAIN CURRENT (AMPS)
−ID, DRAIN CURRENT (AMPS)
9
−2.4 V
−2.2 V
5
4
−2 V
3
2
−1.8 V
1
−1.6 V
−1.4 V
0
1
0
2
3
4
5
6
7
8
9
7
6
5
4
3
TC = −55°C
2
1
0
10
VDS ≥ −10 V
8
25°C
0
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
3.5
0.5
1
1.5
2
2.5
3
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 1. On−Region Characteristics
0.2
ID = −3.2 A
TJ = 25°C
0.175
0.2
TJ = 25°C
0.175
0.15
0.125
0.15
VGS = −2.5 V
0.125
0.1
0.075
0.1
VGS = −4.5 V
0.075
0.05
1
2
3
4
5
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
6
0.05
2
4
6
5
7
8
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1000
1.4
ID = −3.2 A
VGS = −4.5 V
VGS = 0 V
−IDSS, LEAKAGE (A)
1.3
3
−ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
100°C
1.2
1.1
1
0.9
TJ = 100°C
100
0.8
0.7
−50
−25
0
25
50
75
100
125
150
10
2
4
6
8
10
12
14
16
18
−TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
20
NTHD3101F
TYPICAL P−CHANNEL PERFORMANCE CURVES
VGS = 0 V
TJ = 25°C
CISS
1200
900
VDS = 0 V
600
CRSS
300
COSS
0
5
−VGS
0
−VDS
5
10
15
20
10
5
QT
4 −V
DS
6
3
QGS
2
4
2
0
ID = −3.2 A
TJ = 25°C
0
2
4
6
8
0
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 7. Capacitance Variation
1000
5
−IS, SOURCE CURRENT (AMPS)
VDS = −10 V
ID = −3.2 A
VGS = −4.5 V
td(off)
100
t, TIME (ns)
QGD
1
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
tf
tr
td(on)
10
1
1
8
−VGS
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
1500
−VGS, GATE−TO−SOURCE VOLTAGE (V)
(TJ = 25°C unless otherwise noted)
10
100
VGS = 0 V
TJ = 25°C
4
3
2
1
0
0.3
0.6
0.9
RG, GATE RESISTANCE (OHMS)
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
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1.2
NTHD3101F
TYPICAL SCHOTTKY PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
10
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
10
TJ = 150°C
1
TJ = 25°C
TJ = −55°C
0.1
0.20
0.40
0.60
TJ = 150°C
1
TJ = 25°C
0.1
0.20
0.80
VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
IR, REVERSE CURRENT (AMPS)
TJ = 150°C
100E−6
TJ = 100°C
10E−6
0.80
10E+0
TJ = 150°C
1E+0
TJ = 100°C
100E−3
1E−6
100E−9
TJ = 25°C
10E−9
10E−3
1E−3
TJ = 25°C
100E−6
0
10
VR, REVERSE VOLTAGE (VOLTS)
20
0
freq = 20 kHz
3
dc
2.5
square wave
2
Ipk/Io = p
1.5
Ipk/Io = 5
1
Ipk/Io = 10
0.5
Ipk/Io = 20
0
25
PFO, AVERAGE POWER DISSIPATION (WATTS)
3.5
45
65
85
105
125
20
10
VR, REVERSE VOLTAGE (VOLTS)
Figure 14. Maximum Reverse Current
Figure 13. Typical Reverse Current
IO, AVERAGE FORWARD CURRENT (AMPS)
0.60
Figure 12. Maximum Forward Voltage
IR, MAXIMUM REVERSE CURRENT (AMPS)
Figure 11. Typical Forward Voltage
1E−3
0.40
VF, MAXIMUM INSTANTANEOUS FORWARD
VOLTAGE (VOLTS)
145
165
TL, LEAD TEMPERATURE (°C)
1.8
1.6
1.4
square wave
dc
Ipk/Io = p
1.2
1
Ipk/Io = 5
0.8
Ipk/Io = 10
0.6
Ipk/Io = 20
0.4
0.2
0
0
Figure 15. Current Derating
0.5
1
1.5
2
2.5
3
IO, AVERAGE FORWARD CURRENT (AMPS)
Figure 16. Forward Power Dissipation
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5
3.5
NTHD3101F
DEVICE ORDERING INFORMATION
Package
Shipping †
NTHD3101FT1
ChipFET
3000 / Tape & Reel
NTHD3101FT1G
ChipFET
(Pb−Free)
3000 / Tape & Reel
NTHD3101FT3
ChipFET
10000 / Tape & Reel
NTHD3101FT3G
ChipFET
(Pb−Free)
10000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
NTHD3101F
PACKAGE DIMENSIONS
D
8
7
q
6
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
L
5
HE
5
6
7
8
4
3
2
1
E
1
e1
ChipFET
CASE 1206A−03
ISSUE G
2
3
e
4
b
c
STYLE 3:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
A
A
A
S
G
D
D
C
C
DIM
A
b
c
D
E
e
e1
L
HE
q
MILLIMETERS
NOM
MAX
1.05
1.10
0.30
0.35
0.15
0.20
3.05
3.10
1.65
1.70
0.65 BSC
0.55 BSC
0.28
0.35
0.42
1.80
1.90
2.00
5° NOM
MIN
1.00
0.25
0.10
2.95
1.55
INCHES
NOM
0.041
0.012
0.006
0.120
0.065
0.025 BSC
0.022 BSC
0.011
0.014
0.071
0.075
5° NOM
MIN
0.039
0.010
0.004
0.116
0.061
MAX
0.043
0.014
0.008
0.122
0.067
0.017
0.079
0.05 (0.002)
SOLDERING FOOTPRINT*
2.032
0.08
0.711
0.028
1.092
0.043
0.178
0.007
0.457
0.018
0.254
0.010
0.66
0.026
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ChipFET is a trademark of Vishay Siliconix.
FETKY is a registered trademark of International Rectifier Corporation.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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For additional information, please contact your
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NTDH3101F/D