LTC1694-1
SMBus/I2C Accelerator*
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FEATURES
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DESCRIPTIO
Improves SMBus/I2CTM Rise Time Transition
Ensures Data Integrity with Multiple Devices
on the SMBus/I2C
Improves Low State Noise Margin
Wide Supply Voltage Range: 2.7V to 6V
Parallel Multiple LTC1694-1 Devices
for Increased Drive
Low Profile (1mm) SOT-23 (ThinSOTTM) Package
The LTC®1694-1 is a dual SMBus active pull-up designed
to enhance data transmission speed and reliability under
all specified SMBus loading conditions. The LTC1694-1 is
also compatible with the Philips I2C Bus.
The LTC1694-1 allows multiple device connections or a
longer, more capacitive interconnect, without compromising slew rates or bus performance, by supplying a high
pull-up current of 2.2mA to slew the SMBus or I2C lines
during positive bus transitions
During negative transitions or steady DC levels, the
LTC1694-1 sources zero current. External resistors, one
on each bus line, trigger the LTC1694-1 during positive
bus transitions and set the pull-down current level. These
resistors determine the slew rate during negative bus
transitions and the logic low DC level.
The LTC1694-1 is available in a 5-pin SOT-23 package.
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APPLICATIO S
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Notebook and Palmtop Computers
Portable Instruments
Battery Chargers
Industrial Control Application
TV/Video Products
ACPI SMBus Interface
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
I2C is a trademark of Philips Electronics N.V.
*U.S. Patent No. 6,650,174
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TYPICAL APPLICATIO
VCC
C1
0.1µF
Comparison of SMBus Waveforms for
the LTC1694-1 vs Resistor Pull-Up
VCC
5V
VCC
5V
SMBus1
LTC1694-1
GND
RP1
SMBus2
RP2
SCL
LTC1694-1
1V/DIV
RPULL-UP
= 15.8k
SMBus SDA
CLK
IN
DATA
IN
CLK
IN
DATA
IN
CLK
OUT
DATA
OUT
CLK
OUT
DATA
OUT
DEVICE 1
DEVICE N
1694-1 TA01
VCC = 5V
CLD = 200pF
fSMBus = 100kHz
1µs/DIV
1694-1 TA02
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LTC1694-1
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Supply Voltage (VCC) ................................................. 7V
SMBus1, SMBus2 Inputs ............ – 0.3V to (VCC + 0.3V)
Operating Ambient Temperature Range
LTC1694-1C ........................................... 0°C to 70°C
LTC1694-1I ....................................... – 40°C to 85°C
Junction Temperature ........................................... 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
ORDER PART
NUMBER
TOP VIEW
VCC 1
5 SMBus1
LTC1694-1CS5
LTC1694-1IS5
GND 2
NC 3
4 SMBus2
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
S5 PART MARKING
TJMAX = 125°C, θJA = 256°C/ W
LTHE
LTA9
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 6V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
VCC
Supply Voltage Range
ICC
Supply Current
SMBus1 = SMBus2 = VCC
●
6
V
15
45
80
µA
IPULL-UP
Pull-Up Current
Positive Transition on SMBus ( Figure 1)
Slew Rate = 0.5V/µs, SMBus > VTHRES
●
1.0
2.2
VTHRES
Input Threshold Voltage
Slew Rate = 0.5V/µs (Figure 1)
●
0.4
0.65
0.9
V
SRTHRES
Slew Rate Detector Threshold
SMBus > VTHRES
●
0.2
0.5
V/µs
tr
SMBus Rise Time
Standard Mode I2C Bus Rise Time
Bus Capacitance = 200pF (Note 2)
Bus Capacitance = 400pF (Note 3)
●
●
0.32
0.30
1.0
1.0
µs
µs
fMAX
SMBus Maximum Operating Frequency
(Note 4)
●
100
kHz
2.7
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The rise time of an SMBus line is calculated from (VIL(MAX) –
0.15V) to (VIH(MIN) + 0.15V) or 0.65V to 2.25V. This parameter is
guaranteed by design and not tested. With a minimum initial slew rate of
0.5V/µs, a minimum pull-up current of 1mA and a maximum input
threshold voltage of 0.9V:
Rise Time = [(0.9V – 0.65V)/0.5V/µs] + [(2.25V – 0.9V) • 200pF/1mA]
= 0.77µs
UNITS
mA
Note 3: The rise time of an I2C bus line is calculated from VIL(MAX) to
VIH(MIN) or 1.5V to 3V (with VCC = 5V). This parameter is guaranteed by
design and not tested. With a minimum boosted pull-up current of 1mA:
Rise Time = (3V – 1.5V) • 400pF/1mA = 0.6µs
Note 4: This parameter is guaranteed by design and not tested.
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LTC1694-1
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TYPICAL PERFORMANCE CHARACTERISTICS
Pull-Up Current
3.50
3.25
PULL-UP CURRENT (mA)
3.00
2.75
VCC = 6V
2.50
2.25
VCC = 5V
2.00
VCC = 2.7V
1.75
1.50
1.25
1.00
–50
–25
50
0
75
25
TEMPERATURE (°C)
100
125
1694-1 G01
Pull-Up Current
vs SMBus Voltage
Input Threshold Voltage
0.90
3.5
0.85
INPUT THRESHOLD VOLTAGE (V)
PULL-UP CURRENT (mA)
3.0
VCC = 6V
2.5
2.0
VCC = 5V
1.5
1.0
VCC = 2.7V
0.5
0.80
0.75
0.70 VCC = 5V
VCC = 6V
0.65
0.60
VCC = 2.7V
0.55
0.50
0.45
0.40
–50
0
0
4
3
5
2
SMBus VOLTAGE (V)
1
6
7
–25
50
0
75
25
TEMPERATURE (°C)
100
1694 G03
LT1694 G02
Standby Mode Supply Current
Slew Rate Detector Threshold
0.50
80
0.45
70
0.40
SUPPLY CURRENT (µA)
SLEW RATE DETECTOR THRESHOLD (V/µs)
125
0.35
0.30
0.25
0.20
VCC = 6V
0.15
0.10
VCC = 5V
–25
50
VCC = 6V
40
VCC = 5V
VCC = 2.7V
30
VCC = 2.7V
20
0.05
0
–50
60
50
0
75
25
TEMPERATURE (°C)
100
125
10
–50 –25
0
25
50
75
100
125
TEMPERATURE (°C)
1694 G04
1694-1 G05
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LTC1694-1
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PIN FUNCTIONS
NC (Pin 3): No Connection.
VCC (Pin 1): Power Supply Input. VCC can range from 2.7V
to 6V and requires a 0.1µF bypass capacitor to GND.
Supply current is typically 45µA when the SMBus or I2C
lines are inactive (SCL and SDA are a logic high level).
SMBus2 (Pin 4): Active Pull-Up for SMBus.
SMBus1 (Pin 5): Active Pull-Up for SMBus.
GND (Pin 2): Ground.
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BLOCK DIAGRAM
VCC
CHANNEL ONE
1
SLEW RATE
DETECTOR
2.2mA
CONTROL
LOGIC
SMBus1
+
5
VOLTAGE
COMP
GND
–
2
0.65V
VREF
SMBus2
CHANNEL TWO
(DUPLICATE OF CHANNEL ONE)
4
1694-1 BD
TEST CIRCUITS
VCC
5V
5
VCC
C1
0.1µF
PULL-UP =
2.2mA (TYP)
VCC
5V
200µA
IPULL-UP =
SMBus1
VR
1kΩ
LTC1694-1
4
GND
200µA
(TYP)
SMBus2
0µA
HP5082-2080
LT®1360
TEST RAMP VOLTAGE
VCC
TEST RAMP
VOLTAGE
–
BSS284
0.5V/µs
+
VTHRES
VR
1k
–10V
0V
1694-1 F01b
1694-1 F01a
Figure 1
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LTC1694-1
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APPLICATIONS INFORMATION
SMBus Overview
SMBus communication protocol employs open-drain
drives with resistive or current source pull-ups. This protocol allows multiple devices to drive and monitor the bus
without bus contention. The simplicity of resistive or fixed
current source pull-ups is offset by the slow rise times
resulting when bus capacitance is high. Rise times can be
improved by using lower pull-up resistor values or higher
fixed current source values, but the additional current
increases the low state bus voltage, decreasing noise
margins. Slow rise times can seriously impact data reliability, enforcing a maximum practical bus speed well
below the established SMBus maximum transmission rate.
For I/O stage protection from ESD and high voltage spikes
on the SMBus, a series resistor RS (Figure 2) is sometimes
added to the open-drain driver of the bus agents. This is
especially common in SMBus-controlled smart batteries.
Both the values of RP and RS must be chosen carefully to
meet the low state noise margin and all timing requirements of the SMBus.
A discussion of the electrical parameters affected by the
values of RS and RP, as well as a general procedure for
selecting the values of RS and RP follows.
VCC
RP
SMBus
Theory of Operation
The LTC1694-1 overcomes these limitations by providing
a 2.2mA pull-up current only during positive bus transitions to quickly slew any bus capacitance. Therefore, rise
time is dramatically improved, especially with maximum
SMBus loading conditions.
DATA
IN
DATA
OUT
Selecting the Values of RS and RP
An external pull-up resistor RP is required in each SMBus
line to supply a steady state pull-up current if the SMBus
is at logic zero. This pull-up current is used for slewing the
SMBus line during the initial portion of the positive transition in order to activate the LTC1694-1 2.2mA pull-up
current.
Using an external RP to supply the steady state pull-up
current permits the user the freedom to adjust rise time
versus fall time as well as defining the low state logic level
(VOL).
RON
1694-1 F02
The LTC1694-1 has separate but identical circuitry for
each SMBus output pin. The circuitry consists of a positive
edge slew rate detector and a voltage comparator.
The 2.2mA pull-up current is only turned on if the voltage
on the SMBus line voltage is greater than the 0.65V
comparator threshold voltage and the positive slew rate of
the SMBus line is greater than the 0.2V/µs threshold of the
slew rate detector. The pull-up current remains on until the
voltage on the SMBus line is within 0.5V of VCC and/or the
slew rate drops below 0.2V/µs.
CBUS
RS
Figure 2
Low State Noise Margin
A low value of VOL, the low state logic level, is desired for
good noise margin. VOL is calculated as follows:
VOL = (RL • VCC)/(RL + RP)
(1)
RL is the series sum of RS and RON, the on-resistance of
the open-drain driver.
Increasing the value of RP decreases the value of VOL.
Increasing RL increases the value of VOL.
Initial Slew Rate
The initial slew rate, SR, of the Bus is determined by:
SR = (VCC – VOL)/(RP • CBUS)
(2)
SR must be greater than SRTHRES, the LTC1694-1 slew
rate detector threshold (0.5/µs max) in order to activate
the 2.2mA pull-up current.
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LTC1694-1
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APPLICATIONS INFORMATION
SMBus Rise Time
Rise time of an SMBus line is derived using equations 3,
4 and 5.
tr = t1 + t2
t1 = – RP • CBUS • ln[(VTHRES – VCC)/
(VILMAX – 0.15 – VCC)]
(3)
(4)
if (VILMAX – 0.15) > VTHRES, then t1 = 0µs.
t2 = – RP • CBUS • ln{[VIHMIN + 0.15 – VCC –
(RP • IPULL-UP)]/[VTHRES – VCC – (RP • IPULL-UP)]} (5)
By ignoring the current through RP, a simplified version
of equation 3 is obtained:
t2 = (VIHMIN + 0.15 – VTHRES) • CBUS/IPULL-UP
(6)
For an SMBus system, VILMAX = 0.8V and VIHMIN = 2.1V.
For the LTC1694-1, typically VTHRES = 0.65V and IPULL-UP
= 2.2mA.
For an I2C system with VCC related input levels, VILMAX =
0.3VCC and VIHMIN = 0.7VCC.
CBUS is the total capacitance of the I2C line.
A general procedure for selecting RP and RL is as follows:
1. RL is first selected based on the I/O protection requirement. Generally, an RS of 100Ω is sufficient for high
voltage spike and ESD protection. RON is determined by
the size of the open-drain driver, a large driver will have
a lower RON.
2. Next, the value of RP is determined based on the rise and
fall time requirements using equations 3 to 7 (for an
SMBus system) or 8 and 9 (for an I2C system). The
value chosen for RP must ensure that both the rise and
fall time specifications are met simultaneously.
3. After RP and RL are selected, use equations 1 and 2 to
check if the VOL and SR requirements are fulfilled.
Increasing the value of RP increases the rise time.
If SR is too low, decrease the value of RP. If VOL is too high,
increase the value of RP.
SMBus Fall Time
SMBus Design Example
Fall time of an SMBus line is derived using equation 7:
Given the following conditions and requirements:
CBUS is the total capacitance of the SMBus line.
tf = RT • CBUS • ln{[0.9 • (RP + RL) – RL]/
[(VILMAX – 0.15) • (RP + RL)/VCC – RL]}
(7)
where RT is the parallel equivalent of RP and RL.
The rise and fall time calculation for an I2C system is as
follows.
I2C Bus Rise and Fall Time
Rise time of an I2C line is derived using equation 8.
tr = – RP • CBUS • ln{[VIHMIN – VCC – (RP • IPULL-UP)]/
[VILMAX – VCC – (RP • IPULL-UP)]}
(8)
Fall time of an I2C line is derived using equation 9:
tf = RT • CBUS • ln{[(VIHMIN/VCC) • (RP + RL) – RL]/
[(VILMAX/VCC) • (RP + RL) – RL]}
(9)
For an I2C system with fixed input levels, VILMAX = 1.5V
and VIHMIN = 3V.
VCC = 3.3V nom
VOL = 0.4V max
CBUS = 200pF max
VILMAX = 0.8V, VIHMIN = 2.1V
tr = 0.8µs max, tf = 0.3µs max
If an RS of 500Ω is used and the max RON of the driver
is 200Ω, then RL = 500 + 200 = 700Ω. Using the max
VTHRES of 0.9V and a min IPULL-UP of 1mA.
Using equation 6 to calculate the approximate value of t2:
t2 = (2.1 + 0.15 – 0.9) • [(200 • 10–12)/(1 • 10–3)]
= 0.27µs
t1 = 0.8 – 0.27 = 0.53µs
Using equation 4 to find the required RP to meet tr:
RP = – t1/{CBUS • ln[(VTHRES – VCC)/
(VILMAX – 0.15 – VCC)]} = 27k
RT = (RP • RL)/(RP + RL)
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LTC1694-1
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APPLICATIONS INFORMATION
Using equations 4 and 5 to check exact value of tr:
The LTC1694-1 2.2mA pull-up current is activated when
the SMBus host releases the SDA line, allowing the
voltage to rise above the LTC1694-1’s comparator threshold of 0.65V. If an SMBus slave device has a high value
of RS, a longer time is required for this SMBus slave
device to pull SDA low before the rising edge of the ACK
clock pulse.
tr = 0.535µs + 0.254µs = 0.79µs
Using equation 7 to check tf:
tf = 0.222µs
which is less than 0.3µs.
Using equation 1 to check VOL:
VOL
To ensure sufficient data setup time for ACK, SMBus slave
devices with high values of RS, should pull the SDA low
earlier. Typically, a minimum setup time of 1.5µs is needed
for an SMBus device with an RS of 700Ω and a bus
capacitance of 200pF.
= (3.3 • 700)/[700 + (27 • 103)] = 83mV
which is less than 0.4V.
And using equation 2 to check the initial slew rate:
SR = 3.3/[(27 • 103) • (200 • 10 –12)] = 0.61V/µs
An alternative is that the SMBus slave device can hold SCL
line low until the SDA line reaches a stable state. Then, SCL
can be released to generate the ACK clock pulse.
which is greater than 0.5V/µs.
Therefore, the value of RP chosen is 27k.
Connecting Multiple LTC1694-1 in Parallel
ACK Data Setup Time
Care must be taken in selecting the value of RS (in series
with the pull-down driver) to ensure that the data setup
time requirement for ACK (acknowledge) is fulfilled. An
acknowledge is accomplished by the SMBus host releasing the SDA line (pulling high) at the end of the last bit sent
and the SMBus slave device pulling the SDA line low
before the rising edge of the ACK clock pulse.
The LTC1694-1 is designed to guarantee a maximum
SMBus rise time of 1µs with a bus capacitance of 200pF.
In some cases where the bus capacitance is higher than
200pF, multiple LTC1694-1s can be connected in parallel
to provide a higher pull-up current to meet the rise time
requirement. Figure 3 shows a typical application with two
LTC1694-1s connected in parallel to supply a pull-up
current of 4.4mA.
VCC
5V
5
1
SMBus1
1
VCC
C1
0.1µF
LTC1694-1
4
2
SMBus2
5
VCC
GND
SMBus1
LTC1694-1
2
4
GND
RP1
SMBus2
RP2
SCL
SMBus
SDA
CLK
IN
DATA
IN
CLK
IN
DATA
IN
CLK
OUT
DATA
OUT
CLK
OUT
DATA
OUT
DEVICE 1
DEVICE N
1694-1 f03
Figure 3. Paralleling Two LTC1694-1 to Provide 4.4mA of Pull-Up Current
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC1694-1
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APPLICATIONS INFORMATION
Comparison of SMBus Waveforms for the LTC1694-1 vs Resistor Pull-Up
LTC1694-1
1V/DIV
LTC1694-1
1V/DIV
RPULL-UP
= 15.8k
VCC = 5V
1µs/DIV
CLD = 200pF
fSMBus = 100kHz
RPULL-UP
= 10.5k
VCC = 3.3V
1µs/DIV
CLD = 200pF
fSMBus = 100kHz
1694 TA03
1694 TA04
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PACKAGE DESCRIPTION
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
0.62
MAX
0.95
REF
2.90 BSC
(NOTE 4)
1.22 REF
1.4 MIN
3.85 MAX 2.62 REF
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
0.09 – 0.20
(NOTE 3)
1.90 BSC
S5 TSOT-23 0302
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
RELATED PARTS
PART NUMBER
LTC1380/LTC1393
LTC1427
LTC1623
LTC1663
LTC1694
LT1786F
LTC4300A-1/LTC4300A-2
DESCRIPTION
8-Channel/4-Channel Analog Multiplexer with SMBus interface
10-Bit Current DAC with SMBus Interface
Dual High Side Switch Controller with SMBus Interface
SMBus Interface 10-Bit Rail-to-Rail Micropower DAC
SMBus Accelerator
SMBus-Controlled CCFL Switching Regulator
Hot Swappable 2-Wire Bus Buffers
COMMENTS
Low RON and Low Charge Injection
50µA Full-Scale Current
8 Selectable Addresses/16 Channel Capability
DNL < 0.75LSB Max, 5-Lead SOT-23 Package
Includes DC and AC Pull-Up Current
1.25A, 200kHz, Floating or Grounded Lamp Configurations
Provides Capacitance Buffering, SDA and SCL Hot
Swapping, Level Shifting
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Linear Technology Corporation
LT/TP 0304 REV A 1K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LINEAR TECHNOLOGY CORPORATION 1999