Power Supply IC Series for TFT-LCD Panels Single-channel Source Voltage Output Power Supply + Gamma Buffer Amp ICs BD8151EFV,BD8157EFV No.09035EBT11 ●Description The BD8151EFV,BD8157EFV power supply IC are designed for use with TFT-LCD panels. It incorporates a built-in source voltage step-up switching regulator and gamma correction buffer amp. The combination of a source power supply and gamma correction buffer on a single chip delivers significant cost savings. Compatible with input voltages from 2.5 V to 5.5 V (BD8151EFV), 2.1 V to 4.0 V (BD8157EFV), the IC supports low-voltage operation and reaches over 85% efficiency with a 2.5 V input, contributing to low power consumption designs. ●Features 1) Single-chip implementation of a source power supply and gamma correction buffer 2) Support for low-voltage operation, with input voltages from 2.5 V to 5.5 V (BD8151EFV) 2.1 V to 4.0 V (BD8157EFV) 3) Built-in 1.4 A, 0.2 low-voltage FET 4) Switchable step-up DC/DC switching frequencies: 600 kHz/1.2 MHz 5) Current mode PWM control 6) Under-voltage lockout protection circuit 7) Built-in overcurrent protection circuit 8) Built-in thermal shutdown circuit ●Applications Satellite navigation systems, laptop PC TFT LCD panels LCD monitor panels ●Absolute maximum ratings (Ta = 25℃) Parameter Symbol Limit Unit Power supply voltage Vcc 7 V Power dissipation Pd 1000* mW Operating temperature range BD8151EFV BD8157EFV −40 to +85 Topr ℃ −40 to +125 Storage temperature range Tstg −55 to +150 ℃ Switching pin current Isw 1.5** A Switching pin voltage Vsw 15 V VS voltage Maximum junction temperature VS 15 V Tjmax 150 °C * Reduced by 8 mW/℃ over 25℃, when mounted on a glass epoxy board (70 mm x 70 mm x 1.6 mm). ** Must not exceed Pd. ●Recommended Operating Ranges (Ta = 25℃) Parameter Symbol Limit Unit Min. Typ. Max. Vcc 2.5 3.3 5.5 V Power supply voltage BD8157EFV Vcc 2.1 2.5 4.0 V Switching current ISW — — 1.4 A Switching pin voltage VSW — — 14 V VS 5 9 14 V Power supply voltage BD8151EFV VS pin voltage www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Electrical Characteristics BD8151EFV (Unless otherwise specified, Ta = 25℃; Vcc = 3.3V, ENB = 3.3V) Limit Parameter Symbol Unit Conditions Min. Typ. Max. [Triangular waveform oscillator] Oscillating frequency 1 FOSC1 540 600 660 kHz FCLK = 0 V Oscillating frequency 2 FOSC2 1.08 1.20 1.32 MHz FCLK = Vcc ISW — 2 — A ISO 6 10 14 µA [Overcurrent protection circuit] Overcurrent limit [Soft start circuit] SS source current Vss = 0.5 V [Under-voltage lockout protection circuit] Off threshold voltage VUTOFF 2.1 2.2 2.3 V On threshold voltage VUTON 2.0 2.1 2.2 V [Error amp] Input bias current IB — 0.1 0.5 µA Feedback voltage VFB 1.232 1.245 1.258 V Buffer [Output] On resistance RON — 200 300 mΩ *Isw = 1 A Max. duty ratio DMAX 72 80 88 % RL = 100 Ω ENB on voltage VON Vcc × 0.7 Vcc — V ENB off voltage VOFF — 0 Vcc × 0.3 V Standby current ISTB — 0 10 μA VENB = 0 V Average consumption current ICC — 1.2 2.4 mA no switching Ibo −1 0 1 μA IN += 4.5 V [ENB] [Overall] [Amp] Input bias current Drive current 1 IOO1 50 70 140 mA OUT1 to OUT4 Drive current 2 IOO2 150 200 400 mA VCOM Max. output current Voho VS-0.16 VS-0.1 — V Io = −5 mA, IN += VS Min. output current Vohl — 0.1 0.16 V Io = 5 mA, IN += 0 V This product is not designed for protection against radio active rays. * Design guarantee (No total shipment inspection is made.) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Electrical Characteristics BD8157EFV (Unless otherwise specified, Ta = 25℃; Vcc = 2.5V, ENB = 2.5V) Limit Parameter Symbol Unit Conditions Min. Typ. Max. [Triangular waveform oscillator] Oscillating frequency 1 FOSC1 480 600 720 kHz FCLK = 0 V Oscillating frequency 2 FOSC2 0.96 1.20 1.44 MHz FCLK = Vcc ISW — 2 — A ISO 6 10 14 µA [Overcurrent protection circuit] Overcurrent limit [Soft start circuit] SS source current Vss = 0.5 V [Under-voltage lockout protection circuit] Off threshold voltage VUTOFF 1.7 1.8 1.9 V On threshold voltage VUTON 1.6 1.7 1.8 V [Error amp] Input bias current IB — 0.1 0.5 µA Feedback voltage VFB 1.232 1.245 1.258 V Buffer [Output] On resistance RON — 200 600 mΩ *Isw = 1 A Max. duty ratio DMAX 75 85 95 % RL = 100 Ω ENB on voltage VON Vcc × 0.7 Vcc — V ENB off voltage VOFF — 0 Vcc × 0.3 V Standby current ISTB — 0 10 μA VENB = 0 V Average consumption current ICC — 1.2 2.4 mA no switching Ibo −1 0 1 μA IN += 4.5 V [ENB] [Overall] [Amp] Input bias current Drive current 1 IOO1 50 70 140 mA OUT1 to OUT4 Drive current 2 IOO2 120 200 400 mA VCOM Max. output current Voho VS-0.16 VS-0.1 — V Io = −5 mA, IN += VS Min. output current Vohl — 0.1 0.16 V Io = 5 mA, IN += 0 V This product is not designed for protection against radio active rays. * Design guarantee (No total shipment inspection is made.) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Reference Data (Unless otherwise specified, Ta = 25℃) 2.0 1.25 -40℃ 1.00 25℃ 0.75 0.50 150℃ 0.25 0.00 1.0 125℃ 0.5 0.0 25℃ -0.5 -1.5 2 3 4 5 0 6 1.245 1.240 1.235 1 2 3 -40 4 2.0 -8 -12 -16 BD8157EFV 1.5 1.0 0.5 0.0 -20 0 0.5 1 1.5 2 0 2 .4 Fig. 4 SS Source Current ENB CURRENT : ENB[μA] . 25℃ 5 -40℃ 0.5 1.0 1.5 2.0 2.5 3 4.5 6 7.5 1000 VFCLK=GND 500 0 -40 -15 10 125℃ 10 25℃ 5 -40℃ Fig. 7 FCLK Pin Current 0.5 1.0 1.5 2.0 2.5 0 -50 1.1 1.2 VCC=3.3V f=600kHz EFFICIENCY [%] EFFICIENCY [%] Max Duty [%] 80 VCC=2.5V f=1200kHz 70 80 VCC=3.3V f=1200kHz 70 60 BD8157EFV BD8151EFV 50 40 80 120 125 Fig. 10 Max. Duty Ratio Temperature www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1.5 90 60 0 1.4 100 90 AMBIENT TEMPERATURE : Ta[℃] 1.3 Fig. 9 COMP Sinking vs Source Current VCC=2.5V f=600kHz 80 -40 110 COMP VOLTAGE : VCOMP[V] 100 85 85 50 -100 1.0 3.0 Fig. 8 ENB Pin Current 90 60 Fig. 6 Switching Frequency Temperature ENB VOLTAGE : VENB[V] 95 35 AMBIENT TEMPERATURE : Ta[℃] 15 FCLK VOLTAGE : FCLK[V] 100 110 100 0 0.0 3.0 85 VFCLK=VCC Fig. 5 Reference Voltage Temperature 125℃ 10 0 0.0 1.5 20 15 60 1500 SUPPLY VOLTAGE : VCC[V] SS VOLTAGE : VSS[V] 20 35 2000 SWITCHING FREQUENCY : FSW[kHz] REFERENCE VOLTAGE : VREF[V] -4 10 Fig. 3 Reference Voltage Temperature Fig. 2 Standby Current 0 -15 AMBIENT TEMPERATURE : Ta[℃] SUPPLY VOLTAGE : VCC[V] Fig. 1 Total Supply Current SS CURRENT : ISS[μA] 1.250 1.230 -2.0 0 0.5 1 SUPPLY VOLTAGE : VCC[V] FCLK CURRENT : FCLK[μA] . -40℃ -1.0 1.255 COMP CURRENT : ICOMP[uA] . SUPPLY CURRENT: ICC[mA] . 1.50 1.260 1.5 REFERENCE VOLTAGE : VREF[V] . STANDBY CURRENT : ICC[μA] . 1.75 50 0 0.05 0.1 0.15 0.2 0.25 OUTPUT CURRENT : IO[A] Fig. 11 Vcc = 2.5 V Power Efficiency 4/17 0.3 0 0.02 0.15 0.3 0.45 0.6 OUTPUT CURRENT : IO[A] Fig. 12 Vcc = 3.3 V Power Efficiency 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Reference Data (Unless otherwise specified, Ta = 25℃) 0.8 MAXIMUM CURRENT : IOMAX[A] . 100 EFFICIENCY [%] 90 80 70 60 BD8157EFV 50 2.0 2.5 3.0 3.5 BD8157EFV F=600kHz 0.4 VO F=1200kHz 0.2 100mV/div 0 2.1 4.0 2.4 SUPPLY VOLTAGE : VCC[V] 2.7 3.0 3.3 3.6 10 9 OUTPUT VOLTAGE : VO[V] 10 VS CURRENT : IS[mA] 0.1 6 4 2 0.01 0 0.1 5 Fig. 16 SS Capacitance vs Delay Time OUTPUT VOLTAGE : VOUT[V] 5 0 -5 -10 -15 -20 15 3 4 5 6 9 8 8 7 -40℃ 6 5 4 25℃ 125℃ 3 2 1 7 8 9 0 8 8 OUTPUT VOLTAGE : VOUT[V] . 9 7 6 5 -40℃ 3 2 1 0 0 50 100 150 200 250 50 75 100 125 150 175 200 300 OUTPUT CURRENT : IOUT[mA] . Fig. 22 VCOM Sinking Current www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7 6 -40℃ 25℃ 1.0 7 6 5 -40℃ 25℃ 125℃ 4 3 2 1 0 -200 -175 -150 -125 -100 -75 -50 -25 0 OUTPUT CURRENT : IOUT[mA] . Fig. 20 Buffer Sinking Current 9 25℃ 25 OUTPUT CURRENT : IOUT[mA] . Fig. 19 Buffer Voltage 125℃ 0.1 Fig. 18 Output voltage Load Regulation 1 9 BUFFER INPUT VOLTAGE:VIN[V] 4 8.2 LOAD CURRENT : IO[A] 0 2 8.4 Fig. 17 VS Pin Current 10 1 8.6 VS VOLTAGE : VS[V] SS CAPACITANCE [μF] OFFSET VOLTAGE:VOFFSET[mV 10 8.8 8 0.0 0 0.01 0.001 OUTPUT VOLTAGE : VOUT[V] DELAY TIME [ms] 8 OUTPUT VOLTAGE : VOUT[V] . Fig. 15 Load Response Waveform Fig. 14 Max. Load Current vs Power Supply Voltage Fig. 13 Power Efficiency vs Power Supply Voltage 20us/div 3.9 SUPPLY VOLTAGE : VCC[V] 1 Io=100mA Io=0mA 0.6 Fig. 21 Buffer Source Current IN 125℃ 5 4 3 OUT 2 1us/div 1 0 -300 2V/div -250 -200 -150 -100 -50 0 OUTPUT CURRENT : IOUT[mA] Fig. 23 VCOM Source Current 5/17 Fig. 24 Slew Rate Waveform 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Pin Assignment Diagram ●Block Diagram SW VCC 1 CURRENT SENSE 2 SLOPE PGND GND FB COMP SS VCOM OUT1 OUT2 OUT3 SW VCC ENB FCLK VS COMIN IN1 IN2 IN3 IN4 OUT4 20 PGND 19 GND + DRV ENB FCLK 3 OSC SET RESET SDWN OCP 18 ERR + 1.245V 4 UVLO TSD VS LOGIC 5 BUFFER SUPPLY COMIN 6 FB 17 COMP 16 SS PWM + SOFT START 15 VCOM IN1 7 14 OUT1 IN2 8 13 OUT2 IN3 9 12 OUT3 IN4 10 11 OUT4 TOP VIEW Fig. 25 Pin Assignment Diagram and Block Diagram ●Pin Assignment Diagram and Pin Functions Pin No. Pin name Function 1 SW 2 VCC Power supply input pin 3 ENB Control input pin 4 FCLK Frequency switching pin N-channel power FET drain output 5 VS 6 COMIN VCOM input pin Buffer power supply input pin 7 IN1 Amp input pin 1 8 IN2 Amp input pin 2 9 IN3 Amp input pin 3 10 IN4 11 OUT4 Amp output pin 4 12 OUT3 Amp output pin 3 13 OUT2 Amp output pin 2 14 OUT1 Amp output pin 1 15 VCOM VCOM output pin 16 SS 17 COMP 18 FB 19 GND Ground pin 20 PGND Ground pin www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Amp input pin 4 Soft start current output pin Error amp output pin Error amp inversion input pins 6/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Description of Operation of Each Block 10uH Vo RB161M-20 1 20 SW VCC 2.5V 10uF PGND CURRENT SENSE 2 SLOPE VCC 10uF 19 GND + 100kΩ DRV 3 OSC ENB SET LOGIC RESET SDWN OCP 18 ERR + 1.245V FB 15kΩ 4 UVLO TSD FCLK 5 20kΩ 17 PWM + - 16 SS VS 20kΩ 6 20kΩ VCOM OUT1 OUT2 V3 12 OUT3 IN3 10 IN4 V2 13 IN2 9 20kΩ V1 14 7 IN1 8 20kΩ 0.01uF VCOM 15 COMIN 20kΩ 5.1kΩ 3300pF COMP SOFT START BUFFER SUPPLY V4 11 OUT4 TOP VIEW 20kΩ Fig. 26 Application Circuit Diagram Error amp (ERR) This is the circuit to compare the reference voltage 1.245 V (Typ.) and the feedback voltage of output voltage. The COM pin voltage resulting from this comparison determines the switching duty. At the time of start, since the soft start is operated by the SS pin voltage, the COMP pin voltage is limited to the SS pin voltage. Oscillator (OSC) This block generates the oscillating frequency. Either a 600 kHz or 1.2 MHz (Typ.) frequency can be selected with the FCLK pin. SLOPE This block generates the triangular waveform from the clock generated by OSC. Generated triangular waveform is sent to the PWM comparator. PWM The COMP pin voltage output by the error amp is compared to the SLOPE block's triangular waveform to determine the switching duty. Since the switching duty is limited by the maximum duty ratio which is decided internally, it does not become 100%. Reference voltage (VREF) This block generates the internal reference voltage of 1.245 V (Typ.). Protection circuit (UVLO/TSD) UVLO (under-voltage lockout protection circuit) shuts down the circuits when the voltages are 2.2 V (Typ.BD8151EFV) 1.8 V (Typ.ND8157EFV) or lower. Thermal shutdown circuit shuts down IC at 175°C (Typ.) and recovers at 160°C (Typ.). Overcurrent protection circuit (OCP) Current flowing to the power FET is detected by voltage at the CURRENT SENSE and the overcurrent protection operates at 3 A (Typ.). When the overcurrent protection operates, switching is turned off and the SS pin capacity is discharged. Soft start circuit Since the output voltage rises gradually while restricting the current at the time of startup, it is possible to prevent the output voltage overshoot or the inrush current. Buffer amp and VCOM This buffer amp is used to set the gamma correction voltage, which can be set in from 0.2 V to (VOUT - 0.2 V). Use the VOUT resistance division to set the gamma correction voltage. The VCOM voltage is set similarly. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Timing Chart Startup sequence VCC ENB SS SW VO Fig. 27 Startup sequence Overcurrent protection operating 2.5V VCC,ENB SS SW VO IO Fig. 28 Overcurrent protection operating www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Selecting Application Components (1) Setting the output L constant The coil L to use for output is decided by the rating current ILR and input current maximum value IINMAX of the coil. Vcc IINMAX+ ∆IL should not reach the rating value level IL L INMAX I current IL Vo average Co t Fig. 30 Output Application Circuit Diagram Fig. 29 Coil Current Waveform Adjust so that IINMAX + ∆IL does not reach the rating current value ILR. At this time, ∆IL can be obtained by the following equation. 1 Vo-Vcc 1 Vcc [A] Where, f is the switching frequency. ∆IL = L Vcc f Set with sufficient margin because the coil L value may have the dispersion of approx. 30%. If the coil current exceeds the rating current ILR of the coil, it may damage the IC internal element. BD8157EFV uses the current mode DC/DC converter control and has the optimized design at the coil value. The following coil values are recommended from the aspects of power efficiency, response and safety. When the coil out of this range is selected, the stable continual operation is not guaranteed such as the switching waveform becomes irregular. Please pay attention to it. Switching frequency: L = 10 µH to 22 µH at 600 kHz Switching frequency: L = 4.7 µH to 15 µH at 1,200 kHz (2) Setting the output capacitor For the capacitor C to use for the output, select the capacitor which has the larger value in the ripple voltage VPP allowance value and the drop voltage allowance value at the time of sudden load change. Output ripple voltage is decided by the following equation. 1 Vcc ∆IL (ILMAX) [V] Where, f is the switching frequency. ∆VPP = ILMAX×RESR + fCo Vo 2 Perform setting so that the voltage is within the allowable ripple voltage range. For the drop voltage during sudden load change; VDR, please perform the rough calculation by the following equation. VDR = ∆I Co 10 µ sec [V] However, 10 µs is the rough calculation value of the DC/DC response speed. Please set the capacitance considering the sufficient margin so that these two values are within the standard value range. (3) Selecting the input capacitor Since the peak current flows between the input and output at the DC/DC converter, a capacitor is required to install at the input side. For this reason, the low ESR capacitor is recommended as an input capacitor which has the value more than 10 µF and less than 100 m. If a capacitor out of this range is selected, the excessive ripple voltage is superposed on the input voltage, accordingly it may cause the malfunction of IC. However these conditions may vary according to the load current, input voltage, output voltage, inductance and switching frequency. Be sure to perform the margin check using the actual product. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 9/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note (4) Selecting the output rectification diode Schottky barrier diode is recommended as the rectification diode to use at the DC/DC converter output stage. Select the diode paying attention to the max. inductor current and max. output voltage. Max. Inductor current IINMAX + ∆IL < Rating current of diode Max. output voltage VOMAX < Rating voltage of diode Since each parameter has 30% to 40% of dispersion, be sure to design providing sufficient margins. (5) Design of the feedback resistor constant Refer to the following equation to set the feedback resistor. As the setting range, 10 k to 330 k is recommended. If the resistor is set to a 10 k or lower, it causes the reduction of power efficiency. If it is set to 330 k or larger, the offset voltage becomes larger by the input bias current 0.4 µA (Typ.) in the internal error amplifier. Step-up Vo = R8 + R9 R9 1.245 [V] Reference voltage 1.245 V Vo R8 R9 ＋ ERR － 2 FB Fig. 31Feedback Resistance Setting As the capacitance, 0.001 µF to 0.1µF is recommended. If the capacitance is set to 0.001 µF, the overshooting may occur on the output voltage. If the capacitance is set to 0.1 µF or larger, the excessive back current flow may occur in the internal parasitic elements when the power is turned OFF and it may damage IC. When the capacitor of 0.1 µF or larger is used, be sure to insert a diode to Vcc in series, or a bypass diode between the SS pin and VCC. Bypass diode 10 DELAY TIME[ms] (6) Setting the soft start time Soft start is required to prevent the coil current at the time of startup from increasing and the overshoot of the output voltage at the starting time. Fig. 32 shows the relation between the capacitance and soft start time. Please refer to it to set the capacitance. 1 0.1 0.01 0.001 0.01 0.1 SS CAPACITANCE[uF] Fig.32 SS Pin Capacitance vs Delay Time Back current prevention diode VCC Output pin Fig. 33 Bypass Diode Example When there is the startup relation (sequences) with other power supplies, be sure to use the high accuracy product (such as X5R). Soft start time may vary according to the input voltage, output voltage loads, coils and output capacity. Be sure to verify the operation using the actual product. (7) Setting the ENB pin When the ENB pin is set to Hi, the internal circuit becomes active and the DC/DC converter starts operating. When it is set to Low, the shut down is activated and all circuits will be turned OFF. (8) Setting the frequency by FCLK It is possible to change the switching frequency by setting the FCLK pin to Hi or Low. When it is set to Low, the product operates at 600 kHz (Typ.). When it is set to Hi, the product operates at 1,200 kHz (Typ.). www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 10/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note (9) Setting RC, CC of the phase compensation circuit In the current mode control, since the coil current is controlled, a pole (phase lag) made by the CR filter composed of the output capacitor and load resistor will be created in the low frequency range, and a zero (phase lead) by the output capacitor and ESR of capacitor will be created in the high frequency range. In this case, to cancel the pole of the power amplifier, it is easy to compensate by adding the zero point with CC and RC to the output from the error amplifier as shown in the illustration. Open loop gain fp = fp(Min) A fp(Max) fz (ESR) = 0 Gain 1 2 Ro Co 1 2 ESR Co [Hz] [Hz] 【dB】 lOUTMin Pole at the power amplification stage When the output current reduces, the load resistance RO increases and the pole frequency lowers. fz(ESR) lOUTMax 0 Phase 【deg】 fp(Min) = -90 fz(Max) = Error amplifier phase compensation [Hz] 1 [Hz] 2 RoMin Co (At light-load) (At heavy-load) Zero at the power amplification stage When the output capacitor is set larger, the pole frequency lowers but the zero frequency will not change. (This is because the capacitor ESR becomes 1/2 when the capacitor becomes 2 times.) A Gain 【dB】 0 Phase 1 2 RoMax Co 0 fp (Amp.) = 【deg】-90 1 [Hz] 2 Rc Cc Fig. 34 Gain vs Phase L VCC Vcc,PVcc Cin Ro ESR SW COMP Rc Vo Co GND,PGND Cc Fig. 35 Application Circuit Diagram It is possible to realize the stable feedback loop by canceling the pole fp (Min.), which is created by the output capacitor and load resistor, with CR zero compensation of the error amplifier as shown below. fz (Amp.) = fp (Min.) 1 2 Rc Cc 1 = 2 Romax Co [Hz] As the setting range for the resistor, 1 k to 10 k is recommended. When the resistor is set to 1 k or lower, the effect by phase compensation becomes low and it may cause the oscillation of output voltage. When it is set to 10 k or larger, the COMP pin becomes Hi-Z and the switching noise becomes easy to superpose. Therefore the stable switching pulse cannot be generated and the irregular ripple voltage may be generated on the output voltage. As the setting range for the capacitance, 3,300 pF to 10,000 pF is recommended. When the capacitance is set to 3,300 pF or lower, the irregular ripple voltage may be generated on the output voltage due to the effect of switching noise. When it is set to 10,000 pF or larger, the response becomes worse and the output voltage fluctuation becomes large. Accordingly it may require the output capacitor which is larger than the necessary value. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 11/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note (10) Using the buffer amp and VCOM The 4-channel buffer amp and 1-channel VCOM output are used to generate the gamma compensation voltage that is input to the source driver. The VS pin serves as the power supply for the buffer amp and VCOM. VS VCOMIN VCOM voltage output VIN1 V1 VIN2 V2 VIN3 For gamma correction Gamma correction voltage output V3 VIN4 V4 Fig. 36 Example Buffer Amp Circuit Use caution as the gamma correction buffer amp and VCOM have different output current capacities. A range from I/O power supply to ground potentials can be set for the built-in buffer amplifier. If output voltage noise becomes problematic, insert a 0.1 µF capacitor in the output circuit. A capacitance value of 0 pF to 1 µF is recommended for this capacitor. Large capacitance values of 1 µF or larger may cause back current to flow through internal parasitic diodes in the event of a supply voltage ground fault, causing damage to internal IC elements. For applications where such modes are anticipated, implement a bypass diode or other preventive measure. Wait for trigger Vs V1 V2 V3 V4 Fig. 37 Gamma Correction Voltage Startup Waveform www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 12/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Application Examples * Although ROHM is sure that the application examples are recommendable ones, further check the characteristics of components that require high precision before using them.When a circuit is used modifying the externally connected circuit constant, be sure to decide allowing sufficient margins considering the dispersion of values by external parts as well as our IC including not only the static but also the transient characteristic. For the patent, we have not acquired the sufficient confirmation. Please acknowledge the status. (1) When the charge pump is removed from the DC/DC converter to make it 3-channel output mode: It is possible to create the charge pump by using the switching operation of DC/DC converter. When the application shown in the following diagram is used, 1-channel DC/DC converter output, 1-channel positive side charge pump and 1-channel negative side charge pump can be output as a total of 3 channels. 0.1uF 0.1uF 10uH VOUT DAN217U 10uF RB161M-20 1 20 SW VCC 2.5V 10uF 2 SLOPE VCC 1uF PGND CURRENT SENSE 1uF 19 2SD2657k GND + DRV 3 SET OSC LOGIC RESET SDWN ENB OCP 0.1uF 18 ERR + 1.245V FB VGH UDZ Series 4 UVLO TSD FCLK 5 17 PWM + - COMP SOFT START BUFFER SUPPLY SS VS 6 15 7 14 COMIN VCOM 1uF VCOM IN1 V1 2SB1695k OUT1 V2 13 8 VGL OUT2 IN2 9 12 10 11 UDZ Series V3 OUT3 IN3 IN4 1uF DAN217U 16 1uF V4 OUT4 TOP VIEW Fig. 38 3 ch Application Circuit Diagram Example (2) When the output voltage is set to 0 V: Since the switch does not exist between the input and output in the application using the step-up type DC/DC converter, the output voltage is generated even if the IC is turned off. When it is intended to keep the output voltage 0 V until IC operates, insert the switch as shown in the following circuit diagram. 10uH Vo 10uF RB161M-20 1 20 SW VCC 2.5V 2 10uF SLOPE VCC PGND CURRENT SENSE 19 GND + DRV 3 OSC ENB SET LOGIC RESET SDW N OCP 18 ERR + 1.245V FB 4 UVLO TSD FCLK 5 17 PW M + - COMP SOFT START BUFFER SUPPLY 16 SS VS 6 VCOM V1 14 7 IN1 OUT1 V2 13 8 OUT2 IN2 V3 12 9 OUT3 IN3 10 IN4 VCOM 15 COMIN V4 11 OUT4 TOP VIEW Fig. 39 Switch Application Circuit Diagram Example www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 13/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●I/O Equivalent Circuit Diagrams 1.SW 11.OUT4 12.OUT3 13.OUT2 14.OUT1 15.VCOM VS 3.ENB 4.FCLK 16.SS Vcc Vcc 200kΩ 6.COMIN 7.IN1 8.IN2 9.IN3 10.IN4 17.COMP VS 18.FB Vcc Fig.40 I/O Equivalent Circuit Diagrams www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 14/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Notes for use 1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated. 2) GND potential Ensure a minimum GND pin potential in all operating conditions. 3) Setting of heat Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4) Pin short and mistake fitting Use caution when orienting and positioning the IC for mounting on an application board. Improper mounting may result in damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by the presence of a foreign object may result in damage to the IC. 5) Actions in strong magnetic field Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction. 6) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. 7) Ground wiring patterns When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring patterns of any external components. 8) This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements. For example, when the resistors and transistors are connected to the pins as shown in Fig. 41, a parasitic diode or a transistor operates by inversing the pin voltage and GND voltage. The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements, such as the application of voltages lower than the GND (P substrate) voltage to Resistor input and output pins. Transistor (NPN) (Pin B) C B E ～ ～ ～ ～ (Pin B) ～ ～ B (Pin A) GND N N N Parasitic element GND P P＋ Parasitic elements P＋ N N (Pin A) ～ ～ P＋ N P GND N P P＋ P substrate Parasitic elements C E Parasitic element GND Fig.41 Example of a Simple Monolithic IC Architecture GND 9) Overcurrent protection circuits An overcurrent protection circuit designed according to the output current is incorporated for the prevention of IC destruction that may result in the event of load shorting. This protection circuit is effective in preventing damage due to sudden and unexpected accidents. However, the IC should not be used in applications characterized by the continuous operation or transitioning of the protection circuits. At the time of thermal designing, keep in mind that the current capacity has negative characteristics to temperatures. 10) Thermal shutdown circuit (TSD) This IC incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within the specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power dissipation limits, the attendant rise in the chip's temperature Tj will trigger the temperature protection circuit to turn off all output power elements. The circuit automatically resets once the chip's temperature Tj drops. Operation of the TSD circuit presumes that the IC's absolute maximum ratings have been exceeded. Application designs should never make use of the TSD circuit. 11) Testing on application boards At the time of inspection of the installation boards, when the capacitor is connected to the pin with low impedance, be sure to discharge electricity per process because it may load stresses to the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 15/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note POWRE DISSIPATION : ●Power Dissipation Reduction 2000 On 70×70×1.6mm Board 1500 1000 1000 500 BD8151EF BD8157EF 0 25 50 75 85 100 125 150 AMBIENT MPERATURE :Ta[℃] Fig.42 Power Dissipation Reduction www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 16/17 2009.07 - Rev.B BD8151EFV, BD8157EFV Technical Note ●Ordering part number B D 8 Part No. 1 5 1 Part No. 8151 8157 E F V - Package EFV : HTSSOP-B20 E 2 Packaging and forming specification E2: Embossed tape and reel HTSSOP-B20 <Tape and Reel information> 6.5±0.1 (MAX 6.85 include BURR) (4.0) 1 1.0±0.2 (2.4) 6.4±0.2 0.5±0.15 11 4.4±0.1 20 Tape Embossed carrier tape (with dry pack) Quantity 2500pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 10 0.325 1.0MAX +0.05 0.17 -0.03 0.08±0.05 0.85±0.05 S 0.08 S 0.65 +0.05 0.24 -0.04 1pin (Unit : mm) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Reel 17/17 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2009.07 - Rev.B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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