AD ADG774 Wide bandwidth quad 2:1 mux Datasheet

a
FEATURES
Low Insertion Loss and On Resistance: 2.2 Typical
On Resistance Flatness 0.5 Typical
Automotive Temperature Range
–40C to +125C
–3 dB Bandwidth = 240 MHz
Single 3 V/5 V Supply Operation
Rail-to-Rail Operation
Very Low Distortion: 0.5%
Low Quiescent Supply Current (1 nA Typical)
Fast Switching Times
tON 7 ns
tOFF 4 ns
TTL/CMOS Compatible
CMOS 3 V/5 V,
Wide Bandwidth Quad 2:1 Mux
ADG774
FUNCTIONAL BLOCK DIAGRAM
ADG774
S1A
D1
S1B
S2A
D2
S2B
S3A
D3
S3B
S4A
D4
S4B
1 OF 2
DECODER
APPLICATIONS
USB 1.1 Signal Switching Circuits
Cell Phones
PDAs
Battery-Powered Systems
Communications Systems
Data Acquisition Systems
Token Ring 4 Mbps/16 Mbps
Audio and Video Switching
Relay Replacement
GENERAL DESCRIPTION
The ADG774 is a monolithic CMOS device comprising four
2:1 multiplexer/demultiplexers with high impedance outputs.
The CMOS process provides low power dissipation yet gives
high switching speed and low on resistance. The on resistance
variation is typically less than 0.5 Ω with an input signal ranging
from 0 V to 5 V.
The bandwidth of the ADG774 is greater than 200 MHz; this,
coupled with low distortion (typically 0.5%), makes the part
suitable for switching USB 1.1 data signals and fast Ethernet
signals.
The on resistance profile is very flat over the full analog input
range ensuring excellent linearity and low distortion when
switching audio signals. Fast switching speed, coupled with high
signal bandwidth, also makes the parts suitable for video signal
switching. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and batterypowered instruments.
EN
IN
The ADG774 operates from a single 3.3 V/5 V supply and is
TTL logic compatible. The control logic for each switch is shown
in the Truth Table.
These switches conduct equally well in both directions when ON,
and have an input signal range that extends to the supplies. In
the OFF condition, signal levels up to the supplies are blocked.
The ADG774 switches exhibit break-before-make switching
action.
PRODUCT HIGHLIGHTS
1. Wide –3 dB Bandwidth, 240 MHz.
2. Ultralow Power Dissipation.
3. Extended Signal Range.
The ADG774 is fabricated on a CMOS process giving an
increased signal range that fully extends to the supply rails.
4. Low Leakage Over Temperature.
5. Break-Before-Make Switching.
This prevents channel shorting when the switches are configured as a multiplexer.
6. Crosstalk Typically –70 dB @ 30 MHz.
7. Off Isolation Typically –60 dB @ 10 MHz.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2004 Analog Devices, Inc. All rights reserved.
ADG774–SPECIFICATIONS
SINGLE SUPPLY (V
DD
= 5 V 10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
Parameter
+25C
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
2.2
On Resistance Match between
Channels (RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
B Version1
–40C to –40C to
+85C
+125C
5
0 V to VDD V
Ω typ
7
Ω max
0.5
0.5
1
1
±1
± 1.5
±1
± 1.5
±1
± 1.5
nA typ
nA max
nA typ
nA max
nA typ
nA max
VD = 4.5 V, VS = 1 V; VD = 1 V, VS = 4.5 V;
Test Circuit 2
VD = 4.5 V, VS = 1 V; VD = 1 V, VS = 4.5 V;
Test Circuit 2
VD = VS = 4.5 V; VD = VS = 1 V; Test Circuit 3
2.0
0.8
V min
V max
± 0.5
µA typ
µA max
VIN = VINL or VINH
ns typ
ns max
ns typ
ns max
ns typ
ns min
dB typ
dB typ
MHz typ
% typ
pC typ
pF typ
pF typ
pF typ
RL = 100 Ω, CL = 35 pF,
VS = +3 V; Test Circuit 4
RL = 100 Ω, CL = 35 pF,
VS = +3 V; Test Circuit 4
RL = 100 Ω, CL = 35 pF,
VS1 = VS2 = +5 V; Test Circuit 5
RL = 100 Ω, f = 10 MHz; Test Circuit 7
RL = 100 Ω, f = 10 MHz; Test Circuit 8
RL = 100 Ω; Test Circuit 6
RL = 100 Ω
CL = 1 nF; Test Circuit 9
f = 1 kHz
f = 1 kHz
f = 1 MHz
0.001
7
15
4
8
5
1
–65
–75
240
0.5
10
10
20
30
tOFF
Break-Before-Make Time Delay, tD
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth –3 dB
Distortion
Charge Injection
CS (OFF)
CD (OFF)
CD, CS (ON)
20
9
POWER REQUIREMENTS
IDD
1
1
1
100
1
µA max
µA typ
µA typ
mA max
0.001
IIN
IO
VD = 0 V to VDD, IS = –10 mA
VD = 0 V to VDD, IS = –10 mA
0.5
DYNAMIC CHARACTERISTICS2
tON
Test Conditions/Comments
Ω typ
Ω max
Ω typ
Ω max
0.15
± 0.01
± 0.5
± 0.01
± 0.5
± 0.01
± 0.5
Unit
VD = 0 V to VDD, IS = –1 mA
VDD = +5.5 V
Digital Inputs = 0 V or VDD
VIN = +5 V
VS/VD = 0 V
NOTES
1
Temperature range: B Version, –40°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. C
ADG774
SINGLE SUPPLY
(VDD = 3 V 10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
Parameter
+25C
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
4
On Resistance Match between
Channels (RON)
B Version1
–40C to –40C to
+85C
+125C
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
8
0.5
0.5
4
4
±1
± 1.5
±1
± 1.5
±1
± 1.5
nA typ
nA max
nA typ
nA max
nA typ
nA max
2.0
0.8
V min
V max
± 0.5
µA typ
µA max
VIN = VINL or VINH
ns typ
ns max
ns typ
ns max
ns typ
ns min
dB typ
dB typ
MHz typ
% typ
pC typ
pF typ
pF typ
pF typ
RL = 100 Ω, CL = 35 pF,
VS = +1.5 V; Test Circuit 4
RL = 100 Ω, CL = 35 pF,
VS = +1.5 V; Test Circuit 4
RL = 100 Ω, CL = 35 pF,
VS1 = VS2 = 3 V; Test Circuit 5
RL = 50 Ω, f = 10 MHz; Test Circuit 7
RL = 50 Ω, f = 10 MHz; Test Circuit 8
RL = 50 Ω; Test Circuit 6
RL = 50 Ω
CL = 1 nF; Test Circuit 9
f = 1 kHz
f = 1 kHz
f = 1 MHz
Ω typ
Ω max
Ω typ
Ω max
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
2
± 0.01
± 0.5
± 0.01
± 0.5
± 0.01
± 0.5
0.001
DYNAMIC CHARACTERISTICS2
tON
8
16
5
10
5
1
–65
–75
240
2
3
10
20
30
tOFF
Break-Before-Make Time Delay, tD
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth –3 dB
Distortion
Charge Injection
CS (OFF)
CD (OFF)
CD, CS (ON)
21
11
POWER REQUIREMENTS
IDD
1
1
1
100
1
µA max
µA typ
µA typ
mA max
0.001
IIN
IO
Test Conditions/Comments
0 V to VDD V
Ω typ
9
Ω max
0.15
On Resistance Flatness (RFLAT(ON))
Unit
VD = 0 V to VDD, IS = –10 mA
VD = 0 V to VDD, IS = –10 mA
VD = 0 V to VDD, IS = –10 mA
VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V;
Test Circuit 2
VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V;
Test Circuit 2
VD = VS = 3 V; VD = VS = 1 V; Test Circuit 3
VDD = +3.3 V
Digital Inputs = 0 V or VDD
VIN = +3 V
VS/VD = 0 V
NOTES
1
Temperature range: B Version, –40°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
Table I. Truth Table
REV. C
EN
IN
D1
D2
D3
D4
Function
1
0
0
X
0
1
Hi-Z
S1A
S1B
Hi-Z
S2A
S2B
Hi-Z
S3A
S3B
Hi-Z
S4A
S4B
DISABLE
IN = 0
IN = 1
–3–
ADG774
ABSOLUTE MAXIMUM RATINGS 1
QSOP Package, Power Dissipation . . . . . . . . . . . . . . . 566 mW
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . 149.97°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300°C
I R Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . . 235°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
(TA = 25°C unless otherwise noted.)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Analog, Digital Inputs2 . . . . . . . . . . –0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 100°C/W
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
ORDERING GUIDE
Model
Temperature Range
Package Descriptions
Package Options
ADG774BR
ADG774BR-REEL
ADG774BR-REEL7
ADG774BRZ*
ADG774BRZ-REEL*
ADG774BRZ-REEL7*
ADG774BRQ
ADG774BRQ-REEL
ADG774BRQ-REEL7
ADG774BRQZ*
ADG774BRQZ-REEL*
ADG774BRQZ-REEL7*
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Standard Small Outline Package (SOIC)
Standard Small Outline Package (SOIC)
Standard Small Outline Package (SOIC)
Standard Small Outline Package (SOIC)
Standard Small Outline Package (SOIC)
Standard Small Outline Package (SOIC)
Shrink Small Outline Package (QSOP)
Shrink Small Outline Package (QSOP)
Shrink Small Outline Package (QSOP)
Shrink Small Outline Package (QSOP)
Shrink Small Outline Package (QSOP)
Shrink Small Outline Package (QSOP)
R-16
R-16
R-16
R-16
R-16
R-16
RQ-16
RQ-16
RQ-16
RQ-16
RQ-16
RQ-16
*Z = Pb-free part.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG774 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. C
ADG774
PIN CONFIGURATION
(SOIC/QSOP)
IN
1
16
VDD
S1A
2
15
EN
S1B
3
14
S4A
D1
4
S2A
5
S2B
6
11
S3A
D2
7
10
S3B
GND
8
9
ADG774
13
S4B
TOP VIEW
(Not to Scale) 12 D4
D3
TERMINOLOGY
VDD
GND
S
D
IN
EN
RON
RON
RFLAT(ON)
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
tON
tOFF
tD
Crosstalk
Off Isolation
Bandwidth
Distortion
REV. C
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input.
Logic Control Input.
Ohmic Resistance between D and S.
On Resistance Match between any Two Channels, i.e., RON max – RON min.
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over
the specified analog signal range.
Source Leakage Current with the Switch OFF.
Drain Leakage Current with the Switch OFF.
Channel Leakage Current with the Switch ON.
Analog Voltage on Terminals D, S.
OFF Switch Source Capacitance.
OFF Switch Drain Capacitance.
ON Switch Capacitance.
Delay between Applying the Digital Control Input and the Output Switching on. See Test Circuit 4.
Delay between Applying the Digital Control Input and the Output Switching Off.
OFF Time or ON Time Measured between the 90% Points of Both Switches, When Switching from One Address
State to Another. See Test Circuit 5.
A Measure of Unwanted Signal that is Coupled through from One Channel to Another as a Result of Parasitic
Capacitance.
A Measure of Unwanted Signal Coupling through an OFF Switch.
Frequency Response of the Switch in the ON State Measured at 3 dB Down.
RFLAT(ON)/RL
–5–
ADG774 –Typical Performance Characteristics
5.0
0
TA = 25C
4.5
VDD = 2.7V
VDD = 5V
4.0
3.0
ON RESPONSE – dB
RON – 3.5
VDD = 3.0V
2.5
VDD = 4.5V
2.0
1.5
–2
–4
VDD = 5.0V
1.0
0.5
0
1.3
2.5
3.7
VS OR VD DRAIN OR SOURCE VOLTAGE – V
–6
10k
4.9
TPC 1. On Resistance as a Function of VD (VS) for
Various Single Supplies
10M
1M
FREQUENCY – Hz
100M
TPC 4. On Response vs. Frequency
0
3.0
VDD = 5V
–10
2.5
VDD = 5V
RL = 100
–20
1.5
ATTENUATION – dB
+85C
2.0
RON – 100k
+25C
–40C
1.0
–30
–40
–50
–60
–70
–80
0.5
–90
0
1.3
2.5
3.7
VS OR VO DRAIN OR SOURCE VOLTAGE – V
–100
100k
4.9
4.5
–10
+85C
–20
ATTENUATION – dB
3.5
RON – 100M
1G
0
VDD = 3V
4.0
+25C
2.5
–40C
2.0
1.5
1.0
VDD = 5V
RL = 100
V P-P = 0.316V
–30
–40
–50
–60
–70
–80
0.5
0
10M
FREQUENCY – Hz
TPC 5. Off Isolation vs. Frequency
TPC 2. On Resistance as a Function of VD (VS) for
Different Temperatures with 5 V Single Supplies
3.0
1M
–90
–100
100k
0.6
1.1
1.6
2.1
2.6
VS OR VD DRAIN OR SOURCE VOLTAGE – V
TPC 3. On Resistance as a Function of VD (VS) for
Different Temperatures with 3 V Single Supplies
1M
10M
FREQUENCY – Hz
100M
1G
TPC 6. Crosstalk vs. Frequency
–6–
REV. C
ADG774
20
15
CHARGE INJECTION – pC
TX1
VDD = 5V
TA = 25 C
10
RX1
5
Figure 1. Loop Back
0
–5
–10
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
SOURCE VOLTAGE – V
4.0
4.5
120
5.0
100
TPC 7. Charge Injection vs. Source Voltage
Figure 2. Line Termination
Figure 3. Line Clamp
REV. C
–7–
ADG774
Test Circuits
IDS
V1
IS (OFF)
S
VS
A
D
ID (OFF)
S
D
VS
RON = V1/IDS
ID (ON)
S
A
VD
VS
Test Circuit 2. Off Leakage
Test Circuit 1. On Resistance
D
A
VD
Test Circuit 3. On Leakage
5V
0.1F
VIN
3V
VDD
50%
S
50%
VOUT
D
90%
VS
RL
100
IN
CL
35pF
90%
VOUT
tOFF
tON
EN
GND
Test Circuit 4. Switching Times
5V
0.1F
VDD
3V
S1A
VOUT
D1
VS
VIN
RL
100
VS
CL
35pF
50%
50%
0V
S1B
VOUT
50%
50%
VS
DECODER
tD
EN
tD
GND
Test Circuit 5. Break-Before-Make Time Delay
–8–
REV. C
ADG774
5V
5V
0.1F
0.1F
5V
0.1F
VDD
VDD
S1A
VOUT
D1
S1A
RL
100
IN
VS
VDD
D1
RL
100
IN
VS
VIN
EN
VS
VIN
EN
GND
S2A
NC
D2
EN
Test Circuit 6. Bandwidth
GND
VOUT
RL
100
GND
Test Circuit 8. Off Isolation
VIN
CHANNEL-TO-CHANNEL
CROSSTALK = 20 LOG |VS/VOUT|
Test Circuit 7. Channel-to-Channel Crosstalk
5V
VDD
RS
VS
ADG774
S1A
CL
1nF
S1B
S2A
CL
1nF
S2B
S3A
CL
1nF
S3B
S4A
CL
1nF
S4B
D1 VOUT
3V
VIN
D2 VOUT
D4 VOUT
1 OF 2
DECODER
EN
IN
Test Circuit 9. Charge Injection
REV. C
–9–
VOUT
VOUT
D3 VOUT
VOUT
S1B
100
D1
QINJ = CL VOUT
ADG774
OUTLINE DIMENSIONS
16-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
10.00 (0.3937)
9.80 (0.3858)
4.00 (0.1575)
3.80 (0.1496)
16
9
1
8
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2283)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
45
0.25 (0.0098)
0.25 (0.0098)
0.10 (0.0039)
8
0.51 (0.0201) SEATING
0.25 (0.0098) 0 1.27 (0.0500)
0.31 (0.0122) PLANE
0.40 (0.0157)
0.17 (0.0067)
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MS-012AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
16-Lead Shrink Small Outline Package [QSOP]
(RQ-16)
Dimensions shown in inches
0.193
BSC
9
16
0.154
BSC
1
0.236
BSC
8
PIN 1
0.069
0.053
0.065
0.049
0.010
0.025
0.004
BSC
COPLANARITY
0.004
0.012
0.008
SEATING
PLANE
0.010
0.006
8
0
0.050
0.016
COMPLIANT TO JEDEC STANDARDS MO-137AB
–10–
REV. C
ADG774
Revision History
Location
Page
3/04—Data Sheet changed from REV. B to REV. C.
Added APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
10/03—Data Sheet changed from REV. A to REV. B.
Updated formatting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Renumbered TPCs amd Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to PRODUCT HIGHLIGHTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Delete Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4/03—Data Sheet changed from REV. 0 to REV. A.
Renumbered TPCs and Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
REV. C
–11–
–12–
C00049–0–3/04(C)