NB6L239MNEVB NB6L239MNEVB Evaluation Board User's Manual http://onsemi.com EVAL BOARD USER’S MANUAL Description Board Features The NB6L239 Evaluation Board was designed to provide a flexible and convenient platform to quickly evaluate, characterize and verify the performance and operation of the NB6L239. This user’s manual provides detailed information on board contents, layout and its use. It should be used in conjunction with the NB6L239 data sheet: (www.onsemi.com). The NB6L239 is a differential Receiver to differential LVPECL Clock Divider. The board features Output Enable control of the Outputs. • Accommodates the electrical characterization of the • • • • • NB6L239 Selectable Jumper for the VT pin, minimizing cabling CLK/CLK input and QA/QA and QB/QB output pins are accessed via SMA connectors MR, EN and Clock Divide Select pins are accessed via SMA Connectors or by the Logic Switches Convenient and compact board layout 2.5 V, 3.3 V Power Supply Operating Range Figure 1. Evaluation Board © Semiconductor Components Industries, LLC, 2012 February, 2012 − Rev. 1 1 Publication Order Number: EVBUM2081/D NB6L239MNEVB PROCEDURE Lab Setup and Measurement Procedure Dual Power Supplies Equipment Used • • • • • Agilent Signal Generator #8133A Tektronix TDS8000 Oscilloscope Agilent #6624A DC Power Supply Digital Voltmeter Matched High−Speed Cables with SMA Connectors +2.0 V + VCC Power Supply Connections The NB6L239 has a positive supply pin, VCC, and a negative supply pin, VEE. SMAGND = VTT = VCC – 2.0 V is the termination supply for the LVPECL outputs, only. Power supply terminals VCC, VEE and SMAGND are provided. The SMAGND terminal is for the isolated SMA connector GROUND plane, and is not to be confused with a device VEE pin. Since SMAGND = VTT = VCC – 2.0 V, is the termination supply for the LVPECL outputs, by offsetting VCC by +2.0 V yields VTT = 0 V or Ground. A “split” or dual power supply technique can be used to take advantage of terminating the PECL outputs into 50 W to Ground of an oscilloscope or a frequency counter. (see AND8020/D for more information on terminating ECL). Power Supply Connector Color “Spilt” Power Supply VCC RED VCC = +2.0 V − BLACK − SMAGND VTT = VCC – 2 V = 0 V VEE – 239 YELLOW VEE = −1.3 V (or –0.5 V) VTT + − VEE +3.3 V Figure 2. “Split” or Dual Power Supply Connections NB6L239 To monitor the QA/QA and QB/QB outputs on an oscilloscope, the power supply needs to be DC offset: 1. Connect a “split” power supply to the evaluation board. (Figure 1) Connect VCC to +2.0 V Connect SMAGND to 0 V Connect VEE to −1.3 V for 3.3 V operation; or –0.5 V for 2.5 V operation 2. Ensure the oscilloscope is triggered properly and has 50 W termination to ground. The board does not provide 50 W source termination resistors. Trigger the oscilloscope from trigger output of signal generator. 3. Connect the LVPECL QA/QA and QB/QB outputs to the oscilloscope with matched cables. The outputs are terminated with 50 W to VTT (VCC – 2.0 V) = 0 V = Ground internal to the oscilloscope. Table 1. POWER SUPPLY CONFIGURATIONS Device Pin +1.3 V − http://onsemi.com 2 NB6L239MNEVB MR SELA0 SELA1 VCC SMAGND VEE/GND Signal Generator QA CLK QA CLK QB VBBAC QB OUT OUT Digital Oscilloscope or Frequency Counter 50 W 50 W 50 W 50 W Trigger Out EN SELB0 SELB1 Trigger 50 W Figure 3. Evaluation Board Board Layout a logic LOW owing to the pulldown resistor; a logic LOW voltage is not forced on the pin. In the HIGH position, the switch forces the SELXn and EN pin to the positive power supply rail, a logic HIGH. The MR device pin has an internal pullup resistor. When the MR switch is in the logic HIGH position, the input pin “floats” to a logic HIGH owing to the pullup resistor; a logic HIGH voltage is not forced on the pin. In the LOW position, the switch forces the MR pin to the negative power supply rail, a logic LOW. The evaluation board is constructed with Rogers material with 50 W trace impedances designed to minimize noise, achieve high bandwidth and minimize crosstalk. Layer Stack L1 L2 L3 L4 Signal (top) (Rogers) SMA Ground VCC and VEE (positive and negative power supply) Signal (bottom) Control and Select Pins VBB = VBBAC The Control / Select pins, MR, SELXn and EN, can be accessed via the appropriate SMA connector. These pins can also be manually controlled by using the H/L switch. When using the switch, the SMA connector should be left open. When using the SMA connector, the switch must be in the “OPEN” position. The SELXn and EN device pins have internal pulldown resistors. The NB6L239 evaluation board was designed to take advantage of this attribute. When the SELXn and EN switch is in the logic LOW position, the input pin “floats” to VBB labeled on the board is actually VBBAC per the data sheet. VT The VT pin can be set to VCC, VEE (239) GND (239S), VBB or SMAGND by using a jumper. VEE / GND VEE is the negative supply for the NB6L239. GND is the negative supply for NB6N239S. http://onsemi.com 3 NB6L239MNEVB Table 2. PIN DESCRIPTION (refer to data sheet, NB6L239/D) Pin # 16−QFN Pin Name 1 VT 2 CLK Input LVPECL, CML, LVDS, HSTL Noninverted Differential CLOCK Input. 3 CLK Input LVPECL, CML, LVDS, HSTL Inverted Differential CLOCK Input. 4 VBBAC Output Reference Voltage 5 EN Input L LVCMOS/LVTTL Input Synchronous Output Enable 6 SELB0 Input L LVCMOS/LVTTL Input Clock Divide Select Pin 7 SELB1 Input L LVCMOS/LVTTL Input Clock Divide Select Pin 8 VEE Negative Power Supply 9 QB Output LVPECL Inverted Differential Output. Typically terminated with 50 W resistor to VTT. 10 QB Output LVPECL Noninverted Differential Output. Typically terminated with 50 W resistor to VTT. 11 QA Output LVPECL Inverted Differential Output. Typically terminated with 50 W resistor to VTT. 12 QA Output LVPECL Noninverted Differential Output. Typically terminated with 50 W resistor to VTT. 13 VCC Positive Power Supply 14 SELA1 Input L LVCMOS/LVTTL Clock Divide Select Pin 15 SELA0 Input L LVCMOS/LVTTL Input Clock Divide Select Pin 16 MR Input H LVCMOS/LVTTL Input Master Reset Asynchronous, Default Open High, Asserted LOW EP Negative Power Supply (opt) I/O Open Pin Default Type Function Internal 100 W Center Output Voltage Reference for Capacitor Coupled Inputs, Only. Negative Supply Voltage Positive Power Supply The Exposed Pad on the QFN−16 package bottom is thermally connected to the die for improved heat transfer out of package. The pad is not electrically connected to the die, but is recommended to be electrically and thermally connected to VEE on the PC board. http://onsemi.com 4 NB6L239MNEVB EVALUATION BOARD APPLICATION INFORMATION Table 3. EVALUATION BOARD BILL OF MATERIALS Component Description Qty Connector Rosenberger SMA #32K243−40ME3 6 Capacitor 22 mF, 10%, KEMET T491D226K016AS, Case C or D 2 Capacitor 0.1 mF, 10%, KEMET C060C104K5RAC 4 Switch Grayhill #78B02 4 Jumper Header 100 mil, Berg 5 Jumper/Shunt 1 Resistor 1 kW, 0603 6 Banana Jack Deltron #EF681 150−039 Red 1 Banana Jack Deltron #EF681 150−040 Black 1 Banana Jack Deltron #EF681 150−043 Yellow 1 Stand−offs with Screws Optional 4 NB6L239 or NB6N239S QFN−16 Part Mounted on Board 1 QFN−16 Socket Optional, M&M #50−000−00350 1 http://onsemi.com 5 NB6L239MNEVB S M A S M A S M A H L VEE VCC VCC Switch MR SELA0 SELA1 V CC 16 VTT H L 15 14 13 VBBAC VT VEE/GND CLK SMA 12 2 11 TOP VIEW CLK SMA SMA 1 VBBAC 3 10 4 9 5 EN 6 7 Switch S M A QA QB QB SMA SMA SMA SMA 8 SELB0 SELB1 VEE H L VEE QA S M A H L VEE − 239 GND − 239S S M A Switch H = VCC L = VEE/GND Rosenberger connectors with matched trace launches Switch for MR Normally open switch for EN CLK & CLK traces – equal length All Q Output traces – equal length “Side−mount” banana jacks for power supplies (can be located on backside of board) VT pin has a “jumper capability to VCC, VEE / GND, VTT (SMAGND), or VBBAC Figure 4. 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