TI1 LM48311 Audio power amplifier sery Datasheet

LM48311
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SNAS484B – JUNE 2009 – REVISED MAY 2013
LM48311 Boomer™ Audio Power Amplifier Series Ultra-Low EMI, Filterless, 2.6W, Mono,
Class D Audio Power Amplifier with E2S
Check for Samples: LM48311
FEATURES
DESCRIPTION
•
The LM48311 is a single supply, high efficiency,
mono, 2.6W, filterless switching audio amplifier. The
LM48311 features Texas Instruments' Enhanced
Emissions Suppression (E2S) system, that features a
unique patent-pending ultra low EMI, spread
spectrum, PWM architecture, that significantly
reduces RF emissions while preserving audio quality
and efficiency. The E2S system improves battery life,
reduces external component count, board area
consumption, system cost, and simplifying design.
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•
•
•
•
•
•
•
•
Passes FCC Class B Radiated Emissions with
20 Inches of Cable
E2S System Reduces EMI while Preserving
Audio Quality and Efficiency
Output Short Circuit Protection with AutoRecovery
No output Filter Required
Internally Configured Gain (6dB)
Low power Shutdown Mode
Minimum External Components
"Click and Pop" Suppression
Micro-Power Shutdown
Available in Space-Saving DSBGA Package
APPLICATIONS
•
•
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Mobile Phones
PDAs
Laptops
KEY SPECIFICATIONS
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Efficiency at 3.6V, 400mW into 8Ω 85% (Typ)
Efficiency at 5V, 1W into 8Ω 88% (Typ)
Quiescent Power Supply Current at 5V 3.1mA
Power Output at VDD = 5V, RL = 4Ω
– THD+N ≤ 10% 2.6W (Typ)
– THD+N ≤ 1% 2.1W (Typ)
Power Output at VDD = 5V, RL = 8Ω
– THD+N ≤ 10% 1.6W (Typ)
– THD+N ≤ 1% 1.3W (Typ)
Shutdown Current 0.01μA (Typ)
The LM48311 is designed to meet the demands of
portable multimedia devices. Operating from a single
5V supply, the device is capable of delivering 2.6W of
continuous output power to a 4Ω load with less than
10% THD+N. Flexible power supply requirements
allow operation from 2.4V to 5.5V. The LM48311
features both a spread spectrum modulation scheme,
and an advanced, patented edge rate control (ERC)
architecture that significantly reduces emissions,
while maintaining high quality audio reproduction
(THD+N = 0.03%) and high efficiency (η = 88%).
The LM48311 features high efficiency compared to
conventional Class AB amplifiers, and other low EMI
Class D amplifiers. When driving and 8Ω speaker
from a 5V supply, the device operates with 88%
efficiency at PO = 1W. The gain of the LM48311 is
internally set to 6dB, further reducing external
component count. A low power shutdown mode
reduces supply current consumption to 0.01µA.
Advanced output short circuit protection with autorecovery prevents the device from being damaged
during fault conditions. Superior click and pop
suppression eliminates audible transients on powerup/down and during shutdown.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Boomer is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2013, Texas Instruments Incorporated
LM48311
SNAS484B – JUNE 2009 – REVISED MAY 2013
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Typical Application
+2.4V to +5.5V
CS
CS
VDD
PVDD
SD
CIN
IN+
OUTA
MODULATOR
H-BRIDGE
IN-
OUTB
CIN
PGND
GND
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagram
A
IN+
SD
OUTA
B
VDD
PVDD
PGND
C
IN-
GND
OUTB
1
2
3
Figure 2. DSBGA Package
1.539mm x 1.565mm x 0.6mmTop View
See Package Number YZR0009
PIN DESCRIPTIONS - BUMP DESCRIPTION
2
Pin
Name
A1
IN+
Non-Inverting Input
Description
A2
SD
Active Low Shutdown Input. Connect to VDD for normal operation.
A3
OUTA
B1
VDD
B2
PVDD
H-Bridge Power Supply
Non-Inverting Output
Power Supply
B3
PGND
Power Ground
C1
IN-
Inverting Input
C2
GND
Ground
C3
OUTB
Inverting Output
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2) (3)
Supply Voltage
6.0V
−65°C to +150°C
Storage Temperature
− 0.3V to VDD +0.3V
Input Voltage
Power Dissipation
(4)
Internally Limited
ESD Rating (5)
2000V
ESD Rating (6)
200V
Junction Temperature
Thermal Resistance
150°C
θJA
70°C/W
Soldering Information See AN-1112 (SNVA009) "DSBGA Wafer Level Chip Scale Package."
(1)
(2)
(3)
(4)
(5)
(6)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditionsindicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX- TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower.
Human body model, applicable std. JESD22-A114C.
Machine model, applicable std. JESD22-A115-A.
Operating Ratings (1) (2)
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage (VDD, PVDD)
(1)
(2)
−40°C ≤ TA ≤ +85°C
2.4V ≤ VDD ≤ 5.5V
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditionsindicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
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Electrical Characteristics VDD = PVDD = 5V (1)
(2)
The following specifications apply for AV = 6dB, RL = 8Ω, f = 1kHz, unless otherwise specified. Limits apply for TA = 25°C.
LM48311
Symbol
Parameter
Conditions
Min
(3)
VDD
Supply Voltage Range
VIN = 0
IDD
Quiescent Power Supply Current
VIN = 0, RL = ∞
VDD = 3.6V
VDD = 5V
ISD
Shutdown Current
Shutdown enabled
VOS
Differential Output Offset Voltage
VIN = 0
VIH
Logic Input High Voltage
VIL
Logic Input Low Voltage
CMVR
Common Mode Input Voltage Range
TWU
Wake Up Time
fSW
Switching Frequency
AV
Gain
RIN
Input Resistance
RSD
Input Resistance (SD)
PO
Output Power
Total Harmonic Distortion + Noise
(3)
Units
(Limits)
5.5
V
2.7
3.1
3.4
3.9
mA
mA
0.01
1.0
μA
1
3
mV
(4)
2.4
–3
1.4
V
0
SYNC_IN = VDD (Spread Spectrum)
5
17
0.4
V
VDD–0.25
V
7.5
ms
300±30
kHz
6
7
dB
20
kΩ
SD to GND
300
kΩ
RL = 4Ω, THD = 10%
f = 1kHz, 22kHz BW
VDD = 5V
VDD = 3.6V
VDD = 2.5V
2.6
1.3
555
W
W
mW
RL = 8Ω, THD = 10%
f = 1kHz, 22kHz BW
VDD = 5V
VDD = 3.6V
VDD = 2.5V
1.6
800
354
W
mW
mW
RL = 4Ω, THD = 1%
f = 1kHz, 22kHz BW
VDD = 5V
VDD = 3.6V
VDD = 2.5V
2.1
1
446
W
W
mW
1.3
640
286
W (min)
mW
mW
PO = 200mW, RL = 8Ω, f = 1kHz
0.03
%
PO = 100mW, RL = 8Ω, f = 1kHz
0.03
%
78
76
dB
dB
RL = 8Ω, THD = 1%
f = 1kHz, 22kHz BW
VDD = 5V
VDD = 3.6V
VDD = 2.5V
THD+N
Max
Typ
1.1
PSRR
Power Supply Rejection Ratio
(Input Referred)
VRIPPLE = 200mVP-P Sine,
Inputs AC GND, CIN = 1μF
fRIPPLE = 217Hz
fRIPPLE = 1kHz
CMRR
Common Mode Rejection Ratio
(Input Referred)
VRIPPLE = 1VP-P
fRIPPLE = 217Hz
86
dB
η
Efficiency
VDD = 5V, POUT = 1W
VDD = 3.6V, POUT = 400mW
88
85
%
%
SNR
Signal to Noise Ratio
PO = 1W
97
dB
(1)
(2)
(3)
(4)
4
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
RL is a resistive load in series with two inductors to simulate an actual speaker load. For RL = 8Ω, the load is 15µH + 8Ω, +15µH. For RL
= 4Ω, the load is 15µH + 4Ω + 15µH.
Datasheet min/max specification limits are ensured by test or statistical analysis.
Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of
product characterization and are not ensured.
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Electrical Characteristics VDD = PVDD = 5V(1) (2) (continued)
The following specifications apply for AV = 6dB, RL = 8Ω, f = 1kHz, unless otherwise specified. Limits apply for TA = 25°C.
LM48311
Symbol
Parameter
Conditions
Min
(3)
εOS
Output Noise
(Input Referred)
Un-weighted
A-weighted
Max
(3)
Units
(Limits)
μV
μV
AUDIO
ANALYZER
VDD
+
-
(4)
28
22
200 mVp-p
VDD
Typ
LPF
IN+
DUT
ZL
IN-
Figure 3. PSRR Test Circuit
VDD
AUDIO
ANALYZER
-
+
VDD
LPF
IN+
DUT
IN-
ZL
200 mVp-p
Figure 4. CMRR Test Circuit
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Typical Performance Characteristics
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
THD+N vs Frequency
VDD = 3.6V, PO = 600mW, RL = 4Ω
100
100
10
10
THD+N (%)
THD+N (%)
THD+N vs Frequency
VDD = 2.5V, PO = 250mW, RL = 4Ω
1
0.1
0.01
100
1000
10000
0.001
10
100000
100000
Figure 6.
THD+N vs Frequency
VDD = 5 .0V, PO = 1.2W, RL = 4Ω
THD+N vs Frequency
VDD = 2.5V, PO = 175mW, RL = 8Ω
10
10
1
0.1
1
0.1
0.01
100
1000
10000
0.001
10
100000
100
1000
10000
100000
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 7.
Figure 8.
THD+N vs Frequency
VDD = 3.6V, PO = 400mW, RL = 8Ω
THD+N vs Frequency
VDD = 3.6V, PO = 600mW, RL = 8Ω
100
100
10
10
THD+N (%)
THD+N (%)
10000
FREQUENCY (Hz)
100
1
0.1
0.01
0.001
10
1000
Figure 5.
100
0.001
10
100
FREQUENCY (Hz)
0.01
6
0.1
0.01
THD+N (%)
THD+N (%)
0.001
10
1
1
0.1
0.01
100
1000
10000
100000
0.001
10
100
1000
10000
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9.
Figure 10.
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Typical Performance Characteristics (continued)
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
THD+N vs Frequency
VDD = 3.6V, PO = 1.25W, RL = 3Ω
100
100
THD+N vs Output Power
f = 1kHz, RL = 4Ω
VDD = 5V
10
10
THD+N (%)
THD+N (%)
VDD = 3.6V
1
0.1
1
VDD = 2.5V
0.1
0.01
0.001
10
100
1000
10000
0.01
0.001
100000
0.01
Figure 11.
Figure 12.
THD+N vs Output Power
f = 1kHz, RL = 8Ω
THD+N vs Output Power
f = 1kHz, RL = 3Ω
100
VDD = 5V
10
THD+N (%)
VDD = 3.6V
THD+N (%)
10
VDD = 5V
10
1
VDD = 2.5V
0.1
VDD = 3.6V
1
VDD = 2.5V
0.1
0.01
0.001
0.01
0.1
1
0.01
0.001
10
0.01
OUTPUT POWER (W)
0.1
1
Figure 14.
Efficiency vs Output Power
f = 1kHz, RL = 4Ω
Efficiency vs Output Power
f = 1kHz, RL = 8Ω
100
100
90
90
80
70
EFFICIENCY (%)
VDD = 5V
60
VDD = 3.6V
50
40
10
OUTPUT POWER (W)
Figure 13.
80
EFFICIENCY (%)
1
OUTPUT POWER (W)
FREQUENCY (Hz)
100
0.1
VDD = 2.5V
30
20
VDD = 5V
70
VDD = 3.6V
60
VDD = 2.5V
50
40
30
20
10
10
0
0
500
1000
1500
2000
2500
OUTPUT POWER (mW)
0
0
250
500
750
1000
1250 1500
OUTPUT POWER (mW)
Figure 15.
Figure 16.
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Typical Performance Characteristics (continued)
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
Power Dissipation vs Output Power
f = 1kHz, RL = 4Ω
Power Dissipation vs Output Power
f = 1kHz, RL = 8Ω
150
VDD = 5V
VDD = 5V
125
POWER DISSIPATION (mW)
POWER DISSIPATION (mW)
400
300
VDD = 3.6V
200
VDD = 2.5V
100
100
VDD = 2.5V
75
VDD = 3.6V
50
25
0
0
0
500
1000
1500
2000
2500
0
250
500
750
1000 1250
1500
OUTPUT POWER (mW)
OUTPUT POWER (mW)
Figure 17.
Figure 18.
Output Power vs Supply Voltage
f = 1kHz, RL = 4Ω
Output Power vs Supply Voltage
f = 1kHz, RL = 8Ω
3.5
2
OUTPUT POWER (W)
OUTPUT POWER (W)
3
2.5
THD + N = 10%
2
1.5
THD + N = 1%
1
1.5
THD + N = 10%
1
THD + N = 1%
0.5
0.5
0
2.5
3
3.5
4
4.5
5
0
2.5
5.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 19.
Figure 20.
CMRR vs Frequency
VDD= 5.0V, VRIPPLE = 1VP-P, RL = 8Ω
PSRR vs Frequency
VDD= 5.0V, VRIPPLE = 200mVP-P, RL = 8Ω
0
0
-10
-20
-20
PSRR (dB)
CMRR (dB)
-30
-40
-60
-40
-50
-60
-70
-80
-80
-100
10
100
1000
10000
100000
-90
10
FREQUENCY (Hz)
1000
10000
100000
FREQUENCY (Hz)
Figure 21.
8
100
Figure 22.
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Typical Performance Characteristics (continued)
For all performance graphs, the Output Gains are set to 0dB, unless otherwise noted.
Spread Spectrum Output Spectrum vs Frequency
VDD= 5.0V, VIN = 1VRMS, RL = 8Ω
Wideband Spread Spectrum Output Spectrum vs Frequency
VDD= 5.0V, RL = 8Ω
0
0
-10
-20
-30
AMPLITUDE (dBV)
AMPLITUDE (dBV)
-20
-40
-60
-80
-40
-50
-60
-70
-80
-100
-90
-120
10
100
1000
10000
-100
100
100000
1000
FREQUENCY (Hz)
Figure 23.
Figure 24.
Supply Current vs Supply Voltage
No Load
Shutdown Supply Current vs Supply Voltage
No Load
4
0.05
SUPPLY CURRENT(PA)
SUPPLY CURRENT (mA)
10000
FREQUENCY (Hz)
3
2
1
0.04
0.03
0.02
0.01
0
2.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
0
2.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
Figure 25.
Figure 26.
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APPLICATION INFORMATION
GENERAL AMPLIFIER FUNCTION
The LM48311 mono Class D audio power amplifier features a filterless modulation scheme that reduces external
component count, conserving board space and reducing system cost. The outputs of the device transition from
VDD to GND with a 300kHz switching frequency. With no signal applied, the outputs (VOUTA and VOUTB) switch
with a 50% duty cycle, in phase, causing the two outputs to cancel. This cancellation results in no net voltage
across the speaker, thus there is no current to the load in the idle state.
With the input signal applied, the duty cycle (pulse width) of the LM48311 outputs changes. For increasing output
voltage, the duty cycle of VOUTA increases, while the duty cycle of VOUTB decreases. For decreasing output
voltages, the converse occurs. The difference between the two pulse widths yields the differential output voltage.
ENHANCED EMISSIONS SUPPRESSION SYSTEM (E2S)
The LM48311 features Texas Instruments' patent-pending E2S system that reduces EMI, while maintaining high
quality audio reproduction and efficiency. The E2S system features spread spectrum and advanced edge rate
control (ERC). The LM48311 ERC greatly reduces the high frequency components of the output square waves
by controlling the output rise and fall times, slowing the transitions to reduce RF emissions, while maximizing
THD+N and efficiency performance. The overall result of the E2S system is a filterless Class D amplifier that
passes FCC Class B radiated emissions standards with 20in of twisted pair cable, with excellent 0.03% THD+N
and high 88% efficiency.
SPREAD SPECTRUM
The spread spectrum modulation reduces the need for output filters, ferrite beads or chokes. The switching
frequency varies randomly by 30% about a 300kHz center frequency, reducing the wideband spectral contend,
improving EMI emissions radiated by the speaker and associated cables and traces. Where a fixed frequency
class D exhibits large amounts of spectral energy at multiples of the switching frequency, the spread spectrum
architecture of the LM48311 spreads that energy over a larger bandwidth (See Typical Performance
Characteristics). The cycle-to-cycle variation of the switching period does not affect the audio reproduction,
efficiency, or PSRR.
DIFFERENTIAL AMPLIFIER EXPLANATION
As logic supplies continue to shrink, system designers are increasingly turning to differential analog signal
handling to preserve signal to noise ratios with restricted voltage signs. The LM48311 features a fully differential
speaker amplifier. A differential amplifier amplifies the difference between the two input signals. Traditional audio
power amplifiers have typically offered only single-ended inputs resulting in a 6dB reduction of SNR relative to
differential inputs. The LM48311 also offers the possibility of DC input coupling which eliminates the input
coupling capacitors. A major benefit of the fully differential amplifier is the improved common mode rejection ratio
(CMRR) over single ended input amplifiers. The increased CMRR of the differential amplifier reduces sensitivity
to ground offset related noise injection, especially
POWER DISSIPATION AND EFFICIENCY
The major benefit of a Class D amplifier is increased efficiency versus a Class AB. The efficiency of the
LM48311 is attributed to the region of operation of the transistors in the output stage. The Class D output stage
acts as current steering switches, consuming negligible amounts of power compared to their Class AB
counterparts. Most of the power loss associated with the output stage is due to the IR loss of the MOSFET onresistance, along with switching losses due to gate charge.
SHUTDOWN FUNCTION
The LM48311 features a low current shutdown mode. Set SD = GND to disable the amplifier and reduce supply
current to 0.01µA.
Switch SD between GND and VDD for minimum current consumption is shutdown. The LM48311 may be disabled
with shutdown voltages in between GND and VDD, the idle current will be greater than the typical 0.1µA value.
Increased THD+N may also be observed when a voltage of less than VDD is applied to SD.
10
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The LM48311 shutdown input has and internal pulldown resistor. The purpose of this resistor is to eliminate any
unwanted state changes when SD is floating. To minimize shutdown current, SD should be driven to GND or left
floating. If SD is not driven to GND or floating, an increase in shutdown supply current will be noticed.
AUDIO AMPLIFIER POWER SUPPLY BYPASSING/FILTERING
Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass
capacitors as close to the device as possible. Typical applications employ a voltage regulator with 10µF and
0.1µF bypass capacitors that increase supply stability. These capacitors do not eliminate the need for bypassing
of the LM48311 supply pins. A 1µF capacitor is recommended.
AUDIO AMPLIFIER INPUT CAPACITOR SELECTION
Input capacitors may be required for some applications, or when the audio source is single-ended. Input
capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of
the audio source and the bias voltage of the LM48311. The input capacitors create a high-pass filter with the
input resistors RIN. The -3dB point of the high pass filter is found using Equation (1) below.
f = 1 / 2πRINCIN
(1)
Where RIN is the value of the input resistor given in the Electrical Characteristics table.
The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers
cannot reproduce, and may even be damaged by low frequencies. High pass filtering the audio signal helps
protect the speakers. When the LM48311 is using a single-ended source, power supply noise on the ground is
seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies, 217Hz in a
GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors
with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR.
AUDIO AMPLIFIER GAIN
The gain of the LM48311 is internally set to 6dB. The gain can be reduced by adding additional input resistance
(LM48311 Demo Board Schematic). In this configuration, the gain of the device is given by:
AV = 2 x [RF / (RINEXT + RIN)]
(2)
Where RF is 40kΩ, RIN is 20kΩ, and RINEXT is the value of the additional external resistor.
RF
CIN
RIN
RINEXT
IN+
INCIN
RINEXT
RIN
RF
Figure 27. Reduced Gain Configuration
SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION
The LM48311 is compatible with single-ended sources. When configured for single-ended inputs, input
capacitors must be used to block and DC component at the input of the device. Figure 28 shows the typical
single-ended applications circuit.
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LM48311
SNAS484B – JUNE 2009 – REVISED MAY 2013
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VDD
1 PF
VDD
PVDD
LM48311
SINGLE-ENDED
AUDIO INPUT
INOUTA
OUTB
IN+
Figure 28. Single-Ended Input Configuration
PCB LAYOUT GUIDELINES
As output power increases, interconnect resistance (PCB traces and wires) between the amplifier, load and
power supply create a voltage drop. The voltage loss due to the traces between the LM48311 and the load
results in lower output power and decreased efficiency. Higher trace resistance between the supply and the
LM48311 has the same effect as a poorly regulated supply, increasing ripple on the supply line, and reducing
peak output power. The effects of residual trace resistance increases as output current increases due to higher
output power, decreased load impedance or both. To maintain the highest output voltage swing and
corresponding peak output power, the PCB traces that connect the output pins to the load and the supply pins to
the power supply should be as wide as possible to minimize trace resistance.
The use of power and ground planes will give the best THD+N performance. In addition to reducing trace
resistance, the use of power planes creates parasitic capacitors that help to filter the power supply line.
The inductive nature of the transducer load can also result in overshoot on one of both edges, clamped by the
parasitic diodes to GND and VDD in each case. From an EMI standpoint, this is an aggressive waveform that can
radiate or conduct to other components in the system and cause interference. In is essential to keep the power
and output traces short and well shielded if possible. Use of ground planes beads and micros-strip layout
techniques are all useful in preventing unwanted interference.
wires or traces acting as antennas become more efficient with length. Ferrite chip inductors places close to the
LM48311 outputs may be needed to reduce EMI radiation.
BUILD OF MATERIALS
Table 1. LM48311TL Demoboard Bill of Materials
12
Designator
Quantity
C1
1
10µF ±10% 16V Tantalum Capacitor (B Case) AVX TPSB106K016R0800
Description
C2
1
1µF ±10% 16V X5R Ceramic Capacitor (603) Panasonic ECJ-1VB1C105K
C3, C4
2
1µF ±10% 16V X7R Ceramic Capacitor (1206) Panasonic ECJ-3YB1C105K
JU1
1
3-Pin Header
LM48311TL
1
LM48311TL (9-Bump DSBGA)
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LM48311 Demo Board Schematic
Figure 29. LM48311 Demo Board Schematic
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Demo Boards
14
Figure 30. Top Silkscreen
Figure 31. Top Layer
Figure 32. Bottom Silkscreen
Figure 33. Bottom Layer
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LM48311
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SNAS484B – JUNE 2009 – REVISED MAY 2013
REVISION HISTORY
Rev
Date
1.0
06/25/09
Initial released.
Description
1.01
03/17/10
Text edits (under ENHANCED EMISSIONS....)
Changes from Revision A (May 2013) to Revision B
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 14
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15
PACKAGE OPTION ADDENDUM
www.ti.com
2-May-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM48311TL/NOPB
ACTIVE
DSBGA
YZR
9
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
G
N1
LM48311TLX/NOPB
ACTIVE
DSBGA
YZR
9
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
G
N1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
LM48311TL/NOPB
DSBGA
YZR
9
250
178.0
8.4
LM48311TLX/NOPB
DSBGA
YZR
9
3000
178.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1.7
1.7
0.76
4.0
8.0
Q1
1.7
1.7
0.76
4.0
8.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM48311TL/NOPB
DSBGA
YZR
LM48311TLX/NOPB
DSBGA
YZR
9
250
210.0
185.0
35.0
9
3000
210.0
185.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
YZR0009xxx
D
0.600±0.075
E
TLA09XXX (Rev C)
D: Max = 1.581 mm, Min =1.521 mm
E: Max = 1.557 mm, Min =1.497 mm
4215046/A
NOTES:
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
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12/12
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