TI1 LMH6732MF/NOPB High speed op amp with adjustable bandwidth Datasheet

LMH6732
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SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
LMH6732 High Speed Op Amp with Adjustable Bandwidth
Check for Samples: LMH6732
FEATURES
APPLICATIONS
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1
2
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Exceptional Performance at Any Supply
Current:
VS = ±5V, TA = 25°C, AV = +2V/V, VOUT = 2VPP,
Typical unless Noted:
ICC
(mA)
-3dB
BW
(MHz)
DG/DP
(%/deg.)
PAL
Slew
Rate
(V/μs)
THD
1MHz
(dBc)
Output
Current
(mA)
1.0
55
0.20 / 0.036
400
-70.0
9
3.4
180
0.022 / 0.017
2100
-78.5
45
9.0
540
0.025 / 0.010
2700
-79.6
115
Ultra High Speed (−3dB BW) 1.5GHz
(ICC = 10mA, 0.25VPP)
Single Resistor Adjustability of Supply Current
Fast Enable/ Disable Capability 20ns
(ICC = 9mA)
"Popless" Output on "Enable" 15mV
(ICC = 1mA)
Ultra Low Disable Current <1μA
Unity Gain Stable
Improved Replacement for CLC505 & CLC449
Battery Powered Systems
Video Switching and Distribution
Remote Site Instrumentation
Mobile Communications Gear
DESCRIPTION
The LMH6732 is a high speed op amp with a unique
combination of high performance, low power
consumption, and flexibility of application. The supply
current is adjustable, over a continuous range of
more than 10 to 1, with a single resistor, RP. This
feature allows the device to be used in a wide variety
of high performance applications including device turn
on/ turn off (Enable/ Disable) for power saving or
multiplexing. Typical performance at any supply
current is exceptional. The LMH6732's design has
been optimized so that the output is well behaved,
eliminating spurious outputs on "Enable".
The LMH6732's combination of high performance,
low power consumption, and large signal
performance makes it ideal for a wide variety of
remote site equipment applications such as battery
powered test instrumentation and communications
gear. Other applications include video switching
matrices, ATE and phased array radar systems.
The LMH6732 is available in the SOIC and SOT-23
packages. To reduce design times and assist in
board layout, the LMH6732 is supported by an
evaluation board.
1600
1200
0.6
RL = 100:
0.4
AV = +2
OUTPUT
0.25VPP
9
0.2
RF = 700:
OUTPUT (V)
BW (MHz)
0
1000
800
600
2.0VPP
400
-0.2
6
-0.4
200
-1.2
0
-1.4
2
3 4
5
6 7
8
9 10 11 12
ICC (mA)
Figure 1. −3dB BW vs. ICC
AV = +2
-0.8
RF = 700:
-1
0 1
ICC = 9mA
CONTROL
VOLTAGE
-0.6
3
RL = 100:
LMH6732 ON
CONTROL VOLTAGE (V)
1400
1VPP OUTPUT
500MHz
0
0
10 20 30 40 50 60 70 80 90 100
ns
Figure 2. Turn-On/Off Characteristics
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2013, Texas Instruments Incorporated
LMH6732
SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
VS
±6.75V
See (3)
IOUT
ICC
14mA
−
V to V+
Common Mode Input Voltage
Maximum Junction Temperature
+150°C
−65°C to +150°C
Storage Temperature Range
Soldering Information
ESD Tolerance (4)
Infrared or Convection (20 sec)
235°C
Wave Soldering (10 sec)
260°C
Human Body Model
2000V
Machine Model
(1)
(2)
(3)
(4)
200V
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical
Characteristics tables.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications..
The maximum output current (IO) is determined by device power dissipation limitations.
Human body model: 1.5kΩ in series with 100pF. Machine model: 0Ω in series with 200pF.
Operating Ratings (1)
Thermal Resistance
θJC (°C/W)
θJA (°C/W)
8-Pin SOIC
65°C/W
166°C/W
6-Pin SOT-23
120°C/W
198°C/W
Package
−40°C to +85°C
Operating Temperature
Nominal Supply Voltage
±4.5V to ±6V
Operating Supply Current
(1)
2
0.5mA < ICC < 12mA
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical
Characteristics tables.
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SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
Electrical Characteristics ICC = 9mA (1)
AV = +2, RF = 700Ω, VS = ±5V, RL = 100Ω, RP = 39kΩ; Unless otherwise specified.
Symbol
Parameter
Conditions
Min (2)
Typ (2)
Max (2)
Units
Frequency Domain Response
SSBW
-3dB Bandwidth
VOUT = 2VPP
540
MHz
LSBW
-3dB Bandwidth
VOUT = 4.0VPP
315
MHz
GF0.1dB
0.1dB Gain Flatness
VOUT = 2VPP
180
MHz
GFP
Frequency Response Peaking
DC to 200MHz, VOUT = 2VPP
0.01
dB
GFR
Frequency Response Rolloff
DC to 200MHz, VOUT = 2VPP
0.15
dB
LPD
Linear Phase Deviation
DC to 200MHz, VOUT = 2VPP
0.6
DC to 140MHz, VOUT = 2VPP
0.1
deg
DG
Differential Gain
RL = 150Ω, 4.43MHz
0.025
%
DP
Differential Phase
RL = 150Ω, 4.43MHz
0.010
deg
Time Domain Response
TRS
Rise Time
2V Step
0.8
TRL
Fall Time
2V Step
0.9
TS
Settling Time to 0.04%
AV = −1, 2V Step
18
OS
Overshoot
2V Step
1
%
SR
Slew Rate
5V Step, 40% to 60% (3)
2700
V/µs
ns
ns
Distortion And Noise Response
HD2
2nd Harmonic Distortion
2VPP, 20MHz
−60
dBc
HD3
3rd Harmonic Distortion
2VPP, 20MHz
−64
dBc
THD
Total Harmonic Distortion
2VPP, 1MHz
−79.6
dBc
VN
Input Referred Voltage Noise
>1MHz
2.5
nV/√Hz
IN
Input Referred Inverting Noise Current
>1MHz
9.7
pA/√Hz
INN
Input Referred Non-Inverting Noise
Current
>1MHz
1.8
pA/√Hz
SNF
Noise Floor
>1MHz
−154
dBm1Hz
INV
Total Integrated Input Noise
1MHz to 200MHz
60
μV
(1)
(2)
(3)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA. Min/Max ratings are based on production testing unless otherwise
specified.
Typical numbers are the most likely parametric norm. Bold numbers refer to over temperature limits.
Slew Rate is the average of the rising and falling edges.
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LMH6732
SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
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Electrical Characteristics ICC = 9mA(1) (continued)
AV = +2, RF = 700Ω, VS = ±5V, RL = 100Ω, RP = 39kΩ; Unless otherwise specified.
Symbol
Parameter
Conditions
Min (2)
Typ (2)
Max (2)
Units
±3.0
±8.0
9.9
mV
Static, DC Performance
VIO
Input Offset Voltage
DVIO
Input Offset Voltage Average Drift
See (4)
μV/°C
16
(5)
IBN
Input Bias Current
Non Inverting
DIBN
Input Bias Current Average Drift
Non-Inverting (4)
−2
±11
±12
5
(5)
−9
μA
nA/°C
±20
± 30
μA
IBI
Input Bias Current
Inverting
DIBI
Input Bias Current Average Drift
Inverting (4)
−14
nA/°C
+PSRR
Positive Power Supply Rejection Ratio
DC
52
50
62
dB
−PSRR
Negative Power Supply Rejection
Ratio
DC
51
48
56
dB
CMRR
Common Mode Rejection Ratio
DC
49
46
52
dB
ICC
Supply Current
RL = ∞, RP = 39kΩ
7.5
6.6
9.0
ICCI
Supply Current During Shutdown
10.5
11.7
mA
<1
μA
Miscellaneous Performance
RIN
Input Resistance
Non-Inverting
4.7
MΩ
CIN
Input Capacitance
Non-Inverting
1.8
pF
ROUT
Output Resistance
Closed Loop
32
mΩ
VO
Output Voltage Range
RL = ∞
±3.60
±3.55
±3.75
RL = 100Ω
±2.90
±2.85
±3.10
±2.2
V
±75
±115
mA
VOL
CMIR
Common Mode Input Range
Common Mode
IO
Output Current
Closed Loop
−40mV ≤ VO ≤ 40mV
TON
Turn-on Time
0.5VPP Sine Wave, 90% of Full
Value
20
TOFF
Turn-off Time
0.5VPP Sine Wave, <5% of Full
Value
9
VO
Turn-on Glitch
glitch
FDTH
(4)
(5)
4
Feed-Through
f = 10MHz, AV = +2, Off State
V
ns
50
mV
−61
dB
Drift determined by dividing the change in parameter distribution average at temperature extremes by the total temperature change
Negative input current implies current flowing out of the device.
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SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
Electrical Characteristics ICC = 3.4mA (1)
AV = +2, RF = 1kΩ, VS = ±5V, RL = 100Ω, RP = 137kΩ; Unless otherwise specified.
Symbol
Parameter
Conditions
Min
(2)
Typ
(2)
Max
(2)
Units
Frequency Domain Response
SSBW
-3dB Bandwidth
VOUT = 2VPP
180
MHz
LSBW
-3dB Bandwidth
VOUT = 4.0VPP
100
MHz
GF0.1dB
0.1dB Gain Flatness
VOUT = 2VPP
50
MHz
GFP
Frequency Response Peaking
DC to 75MHz, VOUT = 2VPP
0.15
dB
GFR
Frequency Response Rolloff
DC to 75MHz, VOUT = 2VPP
0.05
dB
LPD
Linear Phase Deviation
DC to 55MHz, VOUT = 2VPP
0.5
DC to 25MHz, VOUT = 2VPP
0.1
deg
DG
Differential Gain
RL = 150Ω, 4.43MHz
0.022
%
DP
Differential Phase
RL = 150Ω, 4.43MHz
0.017
deg
Time Domain Response
TRS
Rise Time
2V Step
1.7
TRL
Fall Time
2V Step
2.1
TS
Settling Time to 0.04%
AV = −1, 2V Step
18
OS
Overshoot
2V Step
2
%
SR
Slew Rate
5V Step, 40% to 60% (3)
2100
V/µs
ns
ns
Distortion And Noise Response
HD2
2nd Harmonic Distortion
2VPP, 10MHz
−51
dBc
HD3
3rd Harmonic Distortion
2VPP, 10MHz
−65
dBc
THD
Total Harmonic Distortion
2VPP, 1MHz
−78.5
dBc
VN
Input Referred Voltage Noise
>1MHz
4.1
nV/√Hz
IN
Input Referred Inverting Noise Current
>1MHz
8.8
pA/√Hz
INN
Input Referred Non-Inverting Noise
Current
>1MHz
1.1
pA/√Hz
SNF
Noise Floor
>1MHz
−151
dBm1Hz
INV
Total Integrated Input Noise
1MHz to 100MHz
60
μV
(1)
(2)
(3)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA. Min/Max ratings are based on production testing unless otherwise
specified.
Typical numbers are the most likely parametric norm. Bold numbers refer to over temperature limits.
Slew Rate is the average of the rising and falling edges.
Submit Documentation Feedback
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LMH6732
SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
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Electrical Characteristics ICC = 3.4mA(1) (continued)
AV = +2, RF = 1kΩ, VS = ±5V, RL = 100Ω, RP = 137kΩ; Unless otherwise specified.
Symbol
Parameter
Conditions
Min
(2)
Typ
Max
Units
±2.5
±7.0
±8.5
mV
(2)
(2)
Static, DC Performance
VIO
Input Offset Voltage
DVIO
Input Offset Voltage Average Drift
See (4)
IBN
Input Bias Current
Non Inverting (5)
−0.4
DIBN
Input Bias Current Average Drift
Non-Inverting (4)
8
μV/°C
10
±4
±6
μA
nA/°C
(5)
−1
−3
nA/°C
±12
±16
μA
IBI
Input Bias Current
Inverting
DIBI
Input Bias Current Average Drift
Inverting (4)
+PSRR
Positive Power Supply Rejection Ratio
DC
52
50
64
dB
−PSRR
Negative Power Supply Rejection
Ratio
DC
51
50
57
dB
CMRR
Common Mode Rejection Ratio
DC
49
48
55
dB
ICC
Supply Current
RL = ∞, RP = 137kΩ
2.8
2.6
3.4
ICCI
Supply Current During Shutdown
3.9
4.1
mA
<1
μA
MΩ
Miscellaneous Performance
RIN
Input Resistance
Non-Inverting
15
CIN
Input Capacitance
Non-Inverting
1.7
pF
ROUT
Output Resistance
Closed Loop
50
mΩ
VO
Output Voltage Range
RL = ∞
±3.60
±3.55
±3.78
RL = 100Ω
±2.90
±2.85
±3.10
VOL
CMIR
Common Mode Input Range
Common Mode
IO
Output Current
Closed Loop
−20mV ≤ VO ≤ 20mV
TON
Turn-on Time
0.5VPP Sine Wave, 90% of Full
Value
42
TOFF
Turn-off Time
0.5VPP Sine Wave, <5% of Full
Value
10
VO
Turn-on Glitch
glitch
FDTH
(4)
(5)
6
Feed-Through
f = 10MHz, AV = +2, Off State
±30
V
±2.2
V
±45
mA
ns
25
mV
−61
dB
Drift determined by dividing the change in parameter distribution average at temperature extremes by the total temperature change
Negative input current implies current flowing out of the device.
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SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
Electrical Characteristics ICC = 1.0mA (1)
AV = +2, RF = 1kΩ, VS = ±5V, RL = 500Ω, RP = 412kΩ; Unless otherwise specified.
Symbol
Parameter
Conditions
Min
(2)
Typ
(2)
Max
(2)
Units
Frequency Domain Response
SSBW
-3dB Bandwidth
VOUT = 2VPP
55
MHz
LSBW
-3dB Bandwidth
VOUT = 4.0VPP
30
MHz
GF0.1dB
0.1dB Gain Flatness
VOUT = 2VPP
20
MHz
GFP
Frequency Response Peaking
DC to 25MHz, VOUT = 2VPP
0.11
dB
GFR
Frequency Response Rolloff
DC to 25MHz, VOUT = 2VPP
0.05
dB
LPD
Linear Phase Deviation
DC to 20MHz, VOUT = 2VPP
1
DC to 14MHz, VOUT = 2VPP
0.3
deg
DG
Differential Gain
RL = 500Ω, 4.43MHz
0.020
%
DP
Differential Phase
RL = 500Ω, 4.43MHz
0.036
deg
Time Domain Response
TRS
Rise Time
2V Step
3.7
TRL
Fall Time
2V Step
5.1
TS
Settling Time to 0.04%
AV = −1, 2V Step
18
OS
Overshoot
2V Step
2
%
SR
Slew Rate
5V Step, 40% to 60% (3)
400
V/µs
ns
ns
Distortion And Noise Response
HD2
2nd Harmonic Distortion
2VPP, 5MHz
−43
dBc
HD3
3rd Harmonic Distortion
2VPP, 5MHz
−65
dBc
THD
Total Harmonic Distortion
2VPP, 1MHz
−70.0
dBc
VN
Input Referred Voltage Noise
>1MHz
8.4
nV/√Hz
IN
Input Referred Inverting Noise Current
>1MHz
9.0
pA/√Hz
INN
Input Referred Non-Inverting Noise
Current
>1MHz
0.8
pA/√Hz
SNF
Noise Floor
>1MHz
−147
dBm1Hz
INV
Total Integrated Input Noise
1MHz to 100MHz
29
μV
(1)
(2)
(3)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA. Min/Max ratings are based on production testing unless otherwise
specified.
Typical numbers are the most likely parametric norm. Bold numbers refer to over temperature limits.
Slew Rate is the average of the rising and falling edges.
Submit Documentation Feedback
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LMH6732
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Electrical Characteristics ICC = 1.0mA(1) (continued)
AV = +2, RF = 1kΩ, VS = ±5V, RL = 500Ω, RP = 412kΩ; Unless otherwise specified.
Symbol
Parameter
Conditions
Min
(2)
Typ
Max
Units
±1.6
±6.0
±7.3
mV
(2)
(2)
Static, DC Performance
VIO
Input Offset Voltage
DVIO
Input Offset Voltage Average Drift
See (4)
IBN
Input Bias Current
Non Inverting (5)
0.04
DIBN
Input Bias Current Average Drift
Non-Inverting (4)
−1
μV/°C
4
(5)
IBI
Input Bias Current
Inverting
DIBI
Input Bias Current Average Drift
Inverting (4)
+PSRR
Positive Power Supply Rejection Ratio
DC
−PSRR
Negative Power Supply Rejection
Ratio
CMRR
−0.1
±2.0
±2.5
μA
nA/°C
±6
±8
μA
−3
nA/°C
52
51
64
dB
DC
51
49
59
dB
Common Mode Rejection Ratio
DC
49
47
55
dB
ICC
Supply Current
RL = ∞, RP = 412kΩ
0.70
0.66
1.0
ICCI
Supply Current During Shutdown
1.3
1.4
mA
<1
μA
46
MΩ
Miscellaneous Performance
RIN
Input Resistance
Non-Inverting
CIN
Input Capacitance
Non-Inverting
1.7
pF
ROUT
Output Resistance
Closed Loop
100
mΩ
VO
Output Voltage Range
RL = ∞
±3.60
±3.55
±3.78
RL = 500Ω
±2.90
±2.85
±3.10
VOL
CMIR
Common Mode Input Range
Common Mode
IO
Output Current
Closed Loop
−15mV ≤ VO ≤ 15mV
TON
Turn-on Time
0.5VPP Sine Wave, 90% of Full
Value
95
TOFF
Turn-off Time
0.5VPP Sine Wave, <5% of Full
Value
40
VO
Turn-on Glitch
glitch
FDTH
(4)
(5)
8
Feed-Through
f = 10MHz, AV = +2, Off State
±6
V
±2.2
V
±9
mA
ns
15
mV
−61
dB
Drift determined by dividing the change in parameter distribution average at temperature extremes by the total temperature change
Negative input current implies current flowing out of the device.
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SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
CONNECTION DIAGRAMS
N/C
-IN
1
2
8
-
7
+
6
RP
V
1
+IN
-
RP
2
OUT
+
V
-
4
5
+
V
+
V
3
6
OUT
+IN
N/C
Figure 3. 8-Pin SOIC (Top View)
See Package Number D (R-PDSO-G8)
3
4
-IN
Figure 4. 6-Pin SOT-23 (Top View)
See Package Number DBV (R-PDSO-G6)
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TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Response
ICC = 9mA
Frequency Response
ICC = 3.4mA
150
100
-1
-2
-3 AV = +6, RF = 500:
-50
-4
AV = +21, RF = 1k:
-100
-5
-6
ICC = 9mA
-5
ICC = 3.4mA
-150
VOUT = 2VPP
-200
-6
VOUT = 2VPP
-200
100M
-7
100k
AV = -1, RF = 500:
-30
1
-80
0
-130
-1
-30
100M
1G
0
-130
-1
-280
AV = -20, RF = 500:
-5
ICC = 9mA
-6
VOUT = 2VPP
10M
100M
GAIN (dB)
-180
-2
-180
-3
-230
-4
AV = -6, RF = 200:
-280
-5
-380
-6 VOUT = 2VPP
RL = 100:
-7
100k
1M
-430
1G
-180
-2
-3
AV = -6
-230
AV = -20
-280
-4
ICC = 1mA
-5
-380
-6 RL = 500:
RF = 1k:
-7
100k
1M
-430
100M
-130
AV = -2
-330
ICC = 3.4mA
10M
-80
PHASE
AV = -20, RF = 500:
-330
AV = -1
GAIN
-80
AV = -1, RF = 750:
-30
1
AV = -2, RF = 450:
GAIN
-230
AV = -6, RF = 200:
1G
-330
VOUT = 2VPP
FREQUENCY (Hz)
-380
10M
100M
-430
1G
FREQUENCY (Hz)
Figure 8.
Figure 9.
Figure 10.
Frequency Response
ICC = 9mA
Frequency Response
ICC = 3.4mA
Frequency Response
ICC = 1mA
150
1
150
1
0
100
0
100
0
-1
50
-1
50
-1
AV = +2, RF = 1k:
GAIN
-3
-50
AV = +6, RF = 500:
-100
AV = +21, RF = 1k:
-5
ICC = 9mA
-150
-6
VOUT = 4VPP
-200
RL = 100:
-250
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 11.
GAIN (dB)
0
PHASE (°)
-2
-2
0
-3 AV = +6, RF = 500:
-50
-4
-5
-6
-100
AV = +21, RF = 1k:
ICC = 3.4mA
VOUT = 4VPP
RL = 100:
-7
100k
100
AV = +6
50
PHASE
PHASE
PHASE
150
AV = +2
GAIN
10M
100M
Figure 12.
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-3
-4
AV = +6
-50
AV = +21
-100
ICC = 1mA
-150
-200
-6 RL = 500:
RF = 1k:
-7
100k
1M
1G
FREQUENCY (Hz)
0
-2
-5
-250
1M
GAIN (dB)
AV = +2, RF = 700:
GAIN
PHASE (°)
1
-7
100k
10M
FREQUENCY (Hz)
PHASE
PHASE
-4
-250
1M
Frequency Response
ICC = 1mA
AV = -2, RF = 400:
PHASE (°)
GAIN (dB)
-7
100k
Frequency Response
ICC = 3.4mA
FREQUENCY (Hz)
GAIN (dB)
-250
1G
Frequency Response
ICC = 9mA
RL = 100:
-7
100k
1M
10
100M
Figure 7.
PHASE (°)
GAIN (dB)
-4
10M
Figure 6.
GAIN
-3
-200
FREQUENCY (Hz)
1
-2
RL = 500:
Figure 5.
0
-1
VOUT = 2VPP
RF = 1k:
1M
FREQUENCY (Hz)
-100
-150
PHASE (°)
10M
AV = +21
-4
RL = 100:
-250
1G
-50
ICC = 1mA
-150
RL = 100:
-7
100k
1M
0
AV = +6
PHASE
-3
PHASE (°)
-6
150
AV = +2
PHASE
PHASE (°)
-5
50
0
-100
AV = +21, RF = 1k:
50
-1
-2
GAIN (dB)
-4
100
50
-50
AV = +6, RF = 500:
0
0
PHASE (°)
GAIN (dB)
PHASE
1
100
GAIN
0
GAIN (dB)
-1
-2
150
AV = +2, RF = 1k:
GAIN
0
-3
1
AV = +2, RF = 700:
GAIN
PHASE (°)
1
Frequency Response
ICC = 1mA
-150
VOUT = 4VPP
-200
-250
10M
100M
1G
FREQUENCY (Hz)
Figure 13.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Frequency Response
ICC = 3.4mA
-30
1
-80
0
-130
-1
-230
AV = -6, RF = 200:
-4
-280
AV = -20, RF = 500:
-5
ICC = 9mA
VOUT = 4VPP
-6
RL = 100:
-7
100k
GAIN (dB)
-180
10M
100M
-3
AV = -6
-230
-4
AV = -20
-280
ICC = 1mA
-330
-5
-6 RL = 500:
RF 1k:
-7
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
VOUT = 4VPP
Figure 15.
Figure 16.
Noise
ICC = 9mA
Noise
ICC = 3.4mA
Noise
ICC = 1mA
100
ICC = 9mA
IN-
100
ICC = 3.4mA
Hz & pA/ Hz)
Figure 14.
Hz & pA/ Hz)
Hz & pA/ Hz)
-180
-2
-380
1G
-130
AV = -2
-330
-430
1M
-80
PHASE
PHASE (°)
GAIN (dB)
PHASE
-3
-30
AV = -1
GAIN
AV = -1, RF = 500:
-1
1
AV = -2, RF = 400:
GAIN
0
-2
Frequency Response
ICC = 1mA
PHASE (°)
Frequency Response
ICC = 9mA
-380
-430
1G
100
ICC = 1mA
IN-
10
en
IN+
1
100
1k
10k
100k
1M
VOLTAGE & CURRENT (nV/
VOLTAGE & CURRENT (nV/
VOLTAGE & CURRENT (nV/
10
IN10
en
1
100
10M
1k
IN+
10k
100k
1M
en
IN+
1
0.1
100
10M
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 17.
Figure 18.
Figure 19.
CMRR and PSRR
ICC = 9mA
CMRR and PSRR
ICC = 3.4mA
CMRR and PSRR
ICC = 1mA
70
10M
70
70
-PSRR
60
60
50
50
60
-PSRR
+PSRR
+PSRR
40
+PSRR
40
CMRR
dB
dB
dB
40
30
CMRR
20
20
ICC = 9mA
ICC = 1mA
ICC = 3.4mA
10
10
10
INPUT REFERRED
0
100
INPUT REFERRED
0
1k
10k
CMRR
30
30
20
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 20.
-PSRR
50
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 21.
100M
INPUT REFERRED
0
10k 100k
100 1k
1M
10M
Figure 22.
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FREQUENCY (Hz)
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
2nd Distortion vs. Output Amplitude
ICC = 9mA
-10
-10
ICC = 9mA
20MHz
50MHz
-30
RF = 700:
-40
RL = 100:
20MHz
-20
-20
50MHz
-30
20MHz
AV = +2
-30
10MHz
-40
-40
-50
HD (dBc)
HD (dBc)
2nd Distortion vs. Output Amplitude
ICC = 1mA
50MHz
-60
10MHz
-70
-80
5MHz
-90
1MHz
-50
-70
ICC = 3.4mA
-70
-80
RF = 1k:
-80
1
2
3
4
5
6
7
8
ICC = 1mA
RF = 1k:
1MHz
RL = 100:
RL = 500:
AV = +2
-90
AV = +2
-100
-100
0
10MHz
-60
5MHz
1MHz
5MHz
-50
-60
-90
-100
HD (dBc)
-20
2nd Distortion vs. Output Amplitude
ICC = 3.4mA
0
1
2
3
VOUT (VPP)
4
5
6
7
0
8
1
2
3
4
5
6
7
8
VOUT (VPP)
VOUT (VPP)
Figure 23.
Figure 24.
Figure 25.
3rd Distortion vs. Output Amplitude
ICC = 9mA
3rd Distortion vs. Output Amplitude
ICC = 3.4mA
3rd Distortion vs. Output Amplitude
ICC = 1mA
-30
0
-10
50MHz
-20
20MHz
-40
50MHz
20MHz
20MHz
-20
-30
50MHz
-50
10MHz
-70
ICC = 9mA
-80
RF = 700:
RL = 100:
-90
10MHz
-50
5MHz
-60
-100
1
2
3
4
5
6
7
8
-60
5MHz
ICC = 1mA
RF = 1k:
RF = 1k:
RL = 100:
-100
RL = 500:
AV = +2
ICC = 3.4mA
-80
AV = +2
1MHz
1MHz
-120
-100
0
10MHz
-80
-70
-90
AV = +2
1MHz
-40
HD (dBc)
HD (dBc)
HD (dBc)
-40
5MHz
-60
0
1
2
3
4
5
6
7
0
8
1
2
3
4
5
6
7
8
VOUT (VPP)
VOUT (VPP)
VOUT (VPP)
Figure 26.
Figure 27.
Figure 28.
Frequency Response for Various CL
ICC = 9mA
Frequency Response for Various CL
ICC = 3.4mA
Frequency Response for Various CL
ICC = 1mA
ICC = 9mA, AV = +2, RL = 1k:
ICC = 3.4mA, AV = +2, RL = 1k:
CL = 10pF
RS = 4:
CL
CL = 100pF,
= 33
RS = 27:
CL = 33pF,
RS = 51:
pF,
RS
00pF, R S
1 dB/DIV
= 10
pF
= 54
:
CL
CL = 1
= 36
:
:
= 21:
= 33
= 1 2:
RS
12
30pF, R S
pF,
Figure 29.
CL = 3
= 33
20 MHz/DIV
CL
RS
1 dB/DIV
= 10
pF
= 46
:
CL
= 19:
= 1 0:
00pF, R S
30pF, R S
CL = 1
CL = 3
1 dB/DIV
RS
20 MHz/DIV
Figure 30.
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ICC = 1mA,
CL = 56pF,
AV = +2,
RS = 36:
RL = 1k:
5 MHz/DIV
Figure 31.
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SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Small Signal Step Response
ICC = 9mA
Small Signal Step Response
ICC = 3.4mA
Small Signal Step Response
ICC = 1mA
1.5
1.5
1
1
1
0.5
0.5
1.5
RL = 100:
-0.5
0
ICC = 3.4mA
-0.5
5
10
15
20
-1.5
0
10
TIME (ns)
30
40
0
50
40
30
50
TIME (ns)
Figure 34.
Large Signal Step Response
ICC = 9mA
Large Signal Step Response
ICC = 3.4mA
Large Signal Step Response
ICC = 1mA
2
2
AV = -1
ICC = 9mA
RL = 100:
-1
0
ICC = 3.4mA
-1
20
30
40
50
AV = +2
-2
-3
-3
0
10
20
30
40
50
0
20
40
80
60
TIME (ns)
TIME (ns)
Figure 35.
Figure 36.
Figure 37.
Output Glitch
ICC = 9mA
Output Glitch
ICC = 3.4mA
Output Glitch
ICC = 1mA
10
9
0.02
8
0
7
6
-0.02
5
-0.04
4
LMH6732 ON
3
2
ICC = 3.4mA
0.04
0.04
0.02
OUTPUT
0
-0.02
-0.06
LMH6732 ON
1
-0.08
-0.1
0
10 20 30 40 50 60 70 80 90 100
-0.1
ns
Figure 38.
5
-0.04
-0.08
ICC = 1mA
10
RL = 100:
10
RL = 100:
0.02
OUTPUT
OUTPUT (V)
ICC = 9mA
RL = 100:
100
TIME (ns)
CONTROL VOLTAGE (V)
OUTPUT
OUTPUT (V)
0.04
CONTROL VOLTAGE (V)
10
ICC = 1mA
RL = 500:
AV = -1
-2
-3
0
-1
RL = 100:
AV = -1
-2
1
VOUT (V)
0
AV = -1
AV = +2
AV = +2
1
VOUT (V)
1
60
3
AV = -1
AV = +2
0
20
TIME (ns)
3
-0.06
10
Figure 33.
2
VOUT (V)
20
Figure 32.
3
0
AV = -1
-1
-1.5
0
RL = 500:
0
-0.5
-1
-1.5
OUTPUT (V)
AV = -1
AV = +2
ICC = 1mA
RL = 100:
AV = +2
-1
0.5
AV = +2
0
-0.02
5
-0.04
-0.06
LMH6732 ON
CONTROL VOLTAGE (V)
ICC = 9mA
0
AV = -1
VOUT (V)
VOUT (V)
VOUT (V)
AV = -1
-0.08
0
0
20 40 60 80 100 120 140 160 180 200
ns
Figure 39.
-0.1
0
0
50 100 150 200 250 300 350 400 450 500
ns
Figure 40.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Turn-On/Off Characteristics
ICC = 3.4mA
0.6
OUTPUT
6
OUTPUT
-0.4
ICC = 9mA
CONTROL
VOLTAGE
-0.6
AV = +2
-0.8
3
RF = 700:
-1
RL = 100:
LMH6732 ON
-1.4
-0.4
CONTROL
VOLTAGE
ICC = 3.4mA
3
AV = +2
-1
LMH6732 ON
RF = 1k:
0
-1.4
0
6
-0.4
-0.6
CONTROL
VOLTAGE
LMH6732 ON
-1
ICC = 1mA
3
AV = +2
RF = 1k:
RL = 100:
-1.2
-1.4
0
20 40 60 80 100 120 140 160 180 200
ns
-0.2
-0.8
RL = 100:
-1.2
0
10 20 30 40 50 60 70 80 90 100
0
6
-0.8
1VPP OUTPUT
500MHz
-1.2
-0.2
-0.6
9
OUTPUT
0.2
0
OUTPUT (V)
OUTPUT (V)
0
50MHz, 0.9VPP OUTPUT
0.4
9
0.2
CONTROL VOLTAGE (V)
0.2
-0.2
0.6
200MHz, 0.8VPP OUTPUT
0.4
9
OUTPUT (V)
0.4
CONTROL VOLTAGE (V)
0.6
Turn-On/Off Characteristics
ICC = 1mA
CONTROL VOLTAGE (V)
Turn-On/Off Characteristics
ICC = 9mA
0
0
50 100 150 200 250 300 350 400 450 500
ns
ns
Figure 41.
Figure 42.
ICC vs. RP
IP vs. ICC
Figure 43.
Max Output Current vs. ICC
10
140
25°C
VOUT = 0V
9
-40°C
120
8
100
6
IOUT (mA)
ICC (mA)
7
5
4
3
80
85°C
60
40
2
20
1
0
0
10
100
0
1k
2
4
6
ICC (mA)
RP (k:)
Figure 44.
Figure 45.
Slew Rate vs. ICC
10
Figure 46.
BW vs. ICC
BW vs. ICC for Various Temperature
1000
1000
3000
8
AV = +2
AV = +2
-40°C
25°C
VOUT = 2VPP
2500
AV = +2
1500
BW (MHz)
BW (MHz)
SR (V/µs)
2000
AV = +6
100
85°C
100
1000
500
VOUT = 2VPP
0
10
0
2
4
6
8
ICC (mA)
Figure 47.
14
10
10
0
2
4
6
8
ICC (mA)
Figure 48.
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10
0
2
4
6
8
10
ICC (mA)
Figure 49.
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SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
−3dB BW vs. ICC
VOS, IBI & IBN VS. ICC
0.25VPP
-1
VOS (mV)
800
600
IBI
3
-4
-5
2.5
-6
2
VOS
1.5
400
-7
A TYPICAL DEVICE
-10
0
0
2
4
0
0 1
3 4
2
5
8
6 7
6
8
10
0.01
100k
ICC (mA)
9 10 11 12
ICC (mA)
Figure 51.
Transimpedance
100
1G
AV = -1
140
70
120
60
100
1mA
PHASE
50
40
RS (:)
160
VOUT = 2VPP
50
PHASE (°)
90
80
3.4mA
1
200
180
9mA
GAIN (dB.:)
100M
Settling Time
60
220
SETTLING (%)
RL = 100:
1mA
10M
Figure 52.
Recommended RS vs. CL
120
GAIN
1M
FREQUENCY (Hz)
Figure 50.
110
9mA
0.1
-9
0.5
200
1mA
1
-8
1
2.0VPP
10
-3
3.5
1000
3.4mA
-2
4
RF = 700:
1200
IBN
4.5
AV = +2
100
ROUT (:)
RL = 100:
1400
BW (MHz)
Output Impedance vs. Frequency
0
5
IBI & IBN (µA)
1600
30
3.4mA
80
9mA
40
20
60
0.1
ICC = 1mA
0.01
3.4mA
30
40
20
1M
10M
100M
ICC = 9mA
10
1mA
20
100k
9mA
1G
ICC = 3.4mA
0
FREQUENCY (Hz)
0.001
50
0
100
150
200
250
300
350
1
10
100
Figure 54.
Figure 55.
DG/DP
ICC = 9mA
DG/DP for Various RL
ICC = 9mA
DG/DP for Various RL
ICC = 3.4mA
0.01
0.1
0.1
4.43MHz
ICC = 9mA
0.08
0.015
0.06
0.005
4.43MHz
AV = +2
DP
DP
0.05
DP
RF = 700:
DG
-0.015
ICC = 9mA
-0.005
RL = 150:
0.75
0.02
0
-0.02
-0.04
-0.01
1.5
VOUT (V)
DG
-0.05
-0.1
ICC = 3.4mA
AV = +2
-0.15
-0.08
RF = 1k:
4.43MHz
-0.1
-0.2
0
1
2
3
4
NUMBER OF 150: LOADS
Figure 56.
0
DG
-0.06
RF = 700:
0
DG/DP (%/deg)
0
DG/DP (%/deg)
0
DP (°)
DG (%)
0.04
-0.75
10k
Figure 53.
0.03
-0.03
-1.5
1k
ts (ns)
CL (pF)
Figure 57.
5
0
1
2
3
Figure 58.
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NUMBER OF 150: LOADS
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APPLICATION INFORMATION
+5V
6.8µF
PIN NUMBERS SHOWN
FOR SOIC PACKAGE
AV = 1 +
0.1µF
VIN
RP
7
3
RG
-5V
8
+
CP
100pF
LMH6732
2
RF
VOUT
6
4
RF
NOTE: CP MAY ALSO
BE CONNECTED FROM
PIN 8 TO GROUND
0.1µF
RG
6.8µF
-5V
Figure 59. Recommended Non-Inverting Gain Circuit
+5V
PIN NUMBERS SHOWN
FOR SOIC PACKAGE
6.8µF
AV =
0.1µF
RP
7
3
2
CP
100pF
LMH6732
RG
RF
0.1µF
-5V
VOUT
6
4
VIN
RG
-5V
8
+
RF
NOTE: CP MAY ALSO
BE CONNECTED FROM
PIN 8 TO GROUND
6.8µF
Figure 60. Recommended Inverting Gain Circuit
DESCRIPTION
The LMH6732 is an adjustable supply current, current-feedback operational amplifier. Supply current and
consequently dynamic performance can be easily adjusted by selecting the value of a single external resistor
(RP).
NOTE
The following discussion uses the SOIC package pin numbers. For the corresponding
SOT-23 package pin numbers, please refer to the Connection Diagrams section.
SELECTING AN OPERATING POINT
The operating point is determined by the supply current which in turn is determined by current (IP) flowing out of
pin 8. As the supply current is increased, the following effects will be observed:
16
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Table 1. Device Parameters Related to Supply Current
Specification
Effect as ICC Increases
Bandwidth
Increases
Rise Time
Decreases
Enable/ Disable Speed
Increases
Output Drive
Increases
Input Bias Current
Increases
Input Impedance
Decreases (see Source impedance Discussion)
Both the Electrical Characteristics pages and the TYPICAL PERFORMANCE CHARACTERISTICS section
illustrate these effects to help make the supply current vs. performance trade-off. The supply current is adjustable
over a continuous range of more than 10 to 1 with a single resistor, RP, allowing for easy trade-off between
power consumption and speed. Performance is specified and tested at ICC = 1mA, 3.4mA, and 9mA. (Note:
Some test conditions and especially the load resistances are different for the three supply current settlings.) The
performance plots show typical performance for all three supply currents levels.
When making the supply current vs. performance trade-off, it is first a good idea to see if one of the standard
operating points (ICC = 1mA, 3.4mA, or 9mA) fits the application. If it does, performance ensured on the
specification pages will apply directly to your application. In addition, the value of RP may be obtained directly
from the Electrical Characteristics pages.
BEYOND 1GHz BANDWIDTH
As stated above, the LMH6732 speed can be increased by increasing the supply current. The −3dB Bandwidth
can even reach the unprecedented value of 1.5GHz (AV = +2, VOUT = 0.25VPP). Of course, this comes at the
expense of power consumption (i.e. supply current). The relationship between −3dB BW and supply current is
shown in Figure 48 to Figure 50. The supply current would nominally have to be set to around 10mA to achieve
this speed. The absolute maximum supply current setting for the LMH6732 is 14mA. Beyond this value, the
operation may become unpredictable.
The following discussion will assist in selecting ICC for applications that cannot operate at one of the
specified supply current settlings.
Use the typical performance plots for critical specifications to select the best ICC. For parameters containing
Min/Max ratings in the data sheet tables, interpolate between the values of ICC in the plots & specification tables
to estimate the max/min values in the application.
The simplified schematic for the supply current setting path (IP) is shown below in Figure 61.
+
+
5k:
ICC SET BLOCK
V
V
-
RP
IP
Figure 61. Supply Current Control's Simplified Schematic
The terminal marked "RP" is tied to a potential through a resistor RP. The current flowing through RP (IP) sets the
LMH6732's supply current. Throughout the data sheet, the voltages applied to RP and V− are both considered to
be −5V. However, the two potentials do not necessarily have to be the same. This is beneficial in applications
where non-standard supply voltages are used or when there is a need to power down the op amp via digital logic
control.
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The relationship between ICC and IP is given by:
lP = ICC/57 (approximate ratio at ICC = 3.4mA; consult Figure 45 for relationship at any ICC).
Knowing IP leads to a direct calculation of RP.
RP + 5kΩ = [(V+ -1.6)-V−]/ IP
RP+ 5kΩ= =8.4 /IP (for V+ = 5V and V− = −5V).
First, an operating point needs to be determined from the plots & specifications as discussed above. From this, IP
is obtained. Knowing IP and the potential RP is tied to, RP can be calculated.
EXAMPLE
An application requires that VS = ±3V and performance in the 1mA operating point range. The required IP can
therefore be determined as follows:
IP=21μA
RP is connected from pin 8 to V−. Calculate RP under these conditions:
RP+ 5kΩ = [(V+ -1.6)-V−] / IP
RP+ 5kΩ = [(3V-1.6V) - (-3V)] / 21μA
RP = 205kΩ
The LMH6732 will have performance similar to RP = 412kΩ shown on the datasheet, but with 40% less power
dissipation due to the reduced supply voltages. The op amp will also have a more restricted common-mode
range and output swing.
DYNAMIC SHUTDOWN CAPABILITY
The LMH6732 may be powered on and off very quickly by controlling the voltage applied to RP. If RP is
connected between pin 8 and the output of a CMOS gate powered from ±5V supplies, the gate can be used to
turn the amplifier on and off. This is shown in Figure 62 below:
PIN NUMBERS SHOWN
FOR SOIC PACKAGE
* EXPERIMENTALLY
ADJUSTED VALUE
| 5pF*
RP
TO PIN 8 OF
LMH6732
CMOS LOGIC GATE
(WITH ±5V OUTPUT SWING)
Figure 62. Dynamic Control of Power Consumption Using CMOS Logic
When the gate output is switched from high to low, the LMH6732 will turn on. In the off state, the supply current
typically reduces to 1μA or less. The LMH6732's "off state" supply current is reduced significantly compared to
the CLC505. This extremely low supply current in the "off state" is quite advantageous since it allows for
significant power saving and minimizes feed-through. To improve switching time, a speed up capacitor from the
gate output to pin 8 is recommended. The value of this capacitor will depend on the RP value used and is best
established experimentally. Turn-on and turn-off times of <20ns (ICC = 9mA) are achievable with ordinary CMOS
gates.
EXAMPLE
An open collector logic device is used to dynamically control the power dissipation of the circuit. Here, the
desired connection for RP is from pin 8 to the open collector logic device.
18
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PIN NUMBERS SHOWN
FOR SOIC PACKAGE
RP
TO PIN 8 OF
LMH6732
OPEN COLLECTOR
TTL GATE
Figure 63. Controlling Power On State with TTL Logic (Open Collector Output)
When the logic gate goes low, the LMH6732 is turned on. The LMH6732 V+ connection would be to +5V supply.
Performance desired is that given for ICC = 3.4mA under standard conditions. From the ICC vs. IP plot, IP = 61μA.
Then calculating RP:
RP + 5kΩ = [(5V-1.6V)- 0] / 61μA
RP = 51kΩ
"POPLESS OUTPUT" & OFF CONDITION OUTPUT STATE
The LMH6732 has been especially designed to have minimum glitches during turn-on and turn-off. This is
advantageous in situations where the LMH6732 output is fed to another stage which could experience false autoranging, or even worse reset operation, due to these transient glitches. Example of this application would be an
AGC circuit or an ADC with multiple ranges set to accommodate the largest input amplitude. For the LMH6732,
these sorts of transients are typically less than 50mV in amplitude (see Electrical Characteristics Tables for
Typical values). Applications designed to utilize the CLC505's low output glitch would benefit from using the
LMH6732 instead since the LMH6732's output glitch is improved to be even lower than the CLC505's. In the "Off
State", the output stage is turned off and is in effect put into a high-Z state. In this sate, output can be forced by
other active devices. No significant current will flow through the device output pin in this mode of operation.
MUX APPLICATION
Since The LMH6732's output is essentially open in the “off” state, it is a good candidate for a fast 2:1 MUX.
Figure 64 shows one such application along with the output waveform in Figure 65 displaying the switching
between a continuous triangle wave and a single cycle sine wave (signals trigger locked to each other for stable
scope photo). Switching speed of the MUX will be less than 50 ns and is governed by the “Ton" and “Toff” times
for U1 and U2 at the supply current set by RP1 and RP2. Note that the “Control” input is a 5V CMOS logic level.
1.3 k:
1.3 k:
RG1
2
U1
LMH6732
VIN1
CONTROL
3
3
8
VOUT
3
-
VIN2
5
1/4 CD4049
U2
LMH6732
50:
+
RG2
1.3 k:
6
VS = ±5V
FOR LMH6732
8
2
4
6
RP1
47 k:
1/4 CD4049
+
50:
+5V
1
2
8
RF1
-
RF2
RP2
1.3 k:
47 k:
Figure 64. 50 ns 2:1 MUX Schematic
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LMH6732
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VOUT
(2 V/DIV)
OUTPUT
RF = RG = 1.3 k:
CONTROL
(2.5 V/DIV)
VS= ±5V
0V
CONTROL
2 µs/DIV
Figure 65. MUX “VOUT” and “Control” Waveform
DIFFERENTIAL GAIN AND PHASE
Differential gain and phase are measurements useful primarily in composite video channels. They are measured
by monitoring the gain and phase changes of a high frequency carrier (3.58MHz for NTSC and 4.43MHz for PAL
systems) as the output of the amplifier is swept over a range of DC voltages. Specifications for the LMH6732
include differential gain and phase. Test signals used are based on a 1VPP video level. Test conditions used are
the following:
DC sweep range: 0 to 100 IRE units (black to white)
Carrier: 4.43MHz at 40 IRE units peak to peak
AV = +2, RL = 75Ω + 75Ω
SOURCE IMPEDANCE
For best results, source impedance in the non-inverting circuit configuration (see Figure 59) should be kept below
5kΩ.
Above 5kΩ it is possible for oscillation to occur, depending on other circuit board parasitics. For high signal
source impedances, a resistor with a value of less than 5kΩ may be used to terminate the non-inverting input to
ground.
FEEDBACK RESISTOR
In current-feedback op amps, the value of the feedback resistor plays a major role in determining amplifier
dynamics. It is important to select the correct value. The LMH6732 provides optimum performance with feedback
resistors as shown in Table 2 below. Selection of an incorrect value can lead to severe roll-off in frequency
response, (if the resistor value is too large) or , peaking or oscillation (if the value is too low).
Table 2. Feedback Resistor Selection for Various Gain Settings and ICC’s
Gain (V/V)
ICC (mA)
Unit
9
3.4
1
AV = +1
700
1k
1k
Ω
AV = +2
700
1k
1k
Ω
AV = −1
500
750
1k
Ω
AV = −2
400
450
1k
Ω
AV = +6
500
500
1k
Ω
AV = −6
200
200
1k
Ω
AV = +21
1k
1k
1k
Ω
AV = −20
500
500
1k
Ω
20
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SNOSA47B – FEBRUARY 2003 – REVISED MARCH 2013
For ICC > 9mA at any closed loop gain setting, a good starting point for RF would be the 9mA value stated in
Table 2 above. This value could then be readjusted, if necessary, to achieve the desired response.
PRINTED CIRCUIT LAYOUT & EVALUATION BOARDS
Generally, a good high frequency layout will keep power supply and ground traces away from the inverting input
and output pins. Parasitic capacitances on these nodes to ground will cause frequency response peaking and
possible circuit oscillations (see Application Note OA-15 (SNOA367) for more information).
Use the following evaluation boards as a guide for high frequency layout and as an aid in device testing and
characterization:
Device
Package
Evaluation Board
Part Number
LMH6732MF
SOT-23
LMH730216
LMH6732MA
SOIC
LMH730227
The supply current adjustment resistor, RP, in both evaluation boards should be tied to the appropriate potential
to get the desired supply current. To do so, leave R2 (LMH730216) [ R5 (LMH730227) ] uninstalled. Jumper
"Dis" connector to V−. Install R1 (LMH730216) [ R4 (LMH730227) ] to set the supply current.
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LMH6732
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REVISION HISTORY
Changes from Revision A (March 2013) to Revision B
•
22
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 21
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Aug-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
95
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
LMH67
32MA
TBD
Call TI
Call TI
-40 to 85
LMH67
32MA
(4/5)
LMH6732MA/NOPB
ACTIVE
SOIC
D
8
LMH6732MAX/NOPB
ACTIVE
SOIC
D
8
LMH6732MF/NOPB
ACTIVE
SOT-23
DBV
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
A97A
LMH6732MFX/NOPB
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
A97A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
10-Aug-2016
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Aug-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
LMH6732MF/NOPB
SOT-23
DBV
6
1000
178.0
8.4
LMH6732MFX/NOPB
SOT-23
DBV
6
3000
178.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.2
3.2
1.4
4.0
8.0
Q3
3.2
3.2
1.4
4.0
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Aug-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMH6732MF/NOPB
SOT-23
DBV
6
1000
210.0
185.0
35.0
LMH6732MFX/NOPB
SOT-23
DBV
6
3000
210.0
185.0
35.0
Pack Materials-Page 2
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