LINER LT1027 Precision 5v reference Datasheet

LT1027
Precision
5V Reference
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FEATURES
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DESCRIPTIO
Very Low Drift: 2ppm/°C Max TC
Pin Compatible with LT1021-5, REF-02,
(PDIP Package)
Output Sources 15mA, Sinks 10mA
Excellent Transient Response Suitable for
A-to-D Reference Inputs
Noise Reduction Pin
Excellent Long Term Stability
Less Than 1ppm P-P Noise (0.1Hz to 10Hz)
The LT ®1027 is a precision reference with extra-low drift,
superior accuracy, excellent line and load regulation and
low output impedance at high frequency. This device is
intended for use in 12- to 16-bit A-to-D and D-to-A
systems where demanding accuracy requirements must
be met without the use of power hungry, heated substrate
references. The fast settling output recovers quickly from
load transients such as those presented by A-to-D converter
reference inputs. The LT1027 brings together both
outstanding accuracy and temperature coefficient
specifications.
A-to-D and D-to-A Converters
Digital Voltmeters
Reference Standard
Precision Current Source
The LT1027 reference is based on LTC’s proprietary
advanced subsurface Zener bipolar process which
eliminates noise and stability problems associated with
surface breakdown devices.
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APPLICATIO S
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, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
Supplying VREF and VCC to the LTC®1290 12-bit ADC
Output Voltage
ANALOG
INPUTS
8V TO 40V
VIN
+
2.2µF
VCC
SCLK
ACLK
DOUT
DIN
CS
LTC1290
REF +
VOUT
REF –
LT1027
+
VTRIM
10k
22µF
AGND
5.006
TO µC
5.004
OUTPUT VOLTAGE (V)
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
5.002
5.000
4.998
4.996
V–
DGND
GND
4.994
–50
–25
50
25
0
TEMPERATURE (°C)
75
100
1027 TA01
1027 TA02
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LT1027
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ABSOLUTE
RATI GS
(Note 1)
Supply Voltage (VIN) ............................................... 40V
Input-Output Voltage Differential ............................ 35V
Output to Ground Voltage ......................................... 7V
VTRIM to Ground Voltage
Positive ................................................................ 5V
Negative .......................................................... – 0.3V
Output Short-Circuit Duration
VIN > 20V ........................................................ 10 sec
VIN ≤ 20V ................................................... Indefinite
Operating Temperature Range
LT1027C ................................................ 0°C to 70°C
LT1027M (OBSOLETE) ............... – 55°C to 125°C
Storage Temperature Range
All Devices ....................................... – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
NC*
TOP VIEW
TOP VIEW
8
7 NC*
NC* 1
VIN 2
NR 3
6
5
4
VOUT
VTRIM
NC*
NR 1
8
VIN
VIN
2
7 NC*
GND 2
7
NC*
NR
3
6
VOUT
VTRIM 3
6
NC*
GND
4
5
VTRIM
VOUT 4
5
NC*
NC* 1
GND
H PACKAGE
8-LEAD TO-5 METAL CAN
8
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 100°C, θJA = 130°C/W
TJMAX = 100°C, θJA = 180°C/W
ORDER PART NUMBER
ORDER PART NUMBER
ORDER PART NUMBER
LT1027ACH-5
LT1027BCH-5
LT1027CCH-5
LT1027DCH-5
LT1027ECH-5
LT1027BCN8-5
LT1027CCN8-5
LT1027DCN8-5
LT1027ECN8-5
LT1027CCS8-5
LT1027DCS8-5
LT1027ECS8-5
TJMAX = 150°C, θJA = 150°C/W, θJC = 45°C/W
S8 PART MARKING
1027C5
1027D5
1027E5
OBSOLETE PACKAGE
Consider the N8 or S8 Packages for Alternate Source
*Connected internally. Do not connect external circuitry to these pins. Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range otherwise specifications are at TA = 25°C. VIN = 10V, ILOAD = 0, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
VOUT
Output Voltage (Note 2)
LT1027A
LT1027B, C, D
LT1027E
4.9990
4.9975
4.9950
TCVOUT
Output Voltage Temperature Coefficient
(Note 3)
LT1027A, B
LT1027C
LT1027D
LT1027E
●
●
●
●
TYP
MAX
5.000 5.0010
5.000 5.0025
5.000 5.0050
1
2
2
3
2
3
5
7.5
UNITS
V
ppm/°C
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LT1027
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range otherwise specifications are at TA = 25°C. VIN = 10V, ILOAD = 0, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
Line Regulation (Note 4)
8V ≤ VIN ≤ 10V
MIN
TYP
MAX
UNITS
6
12
25
ppm/V
ppm/V
3
6
8
ppm/V
ppm/V
–3
6
8
ppm/mA
ppm/mA
30
120
ppm/mA
2.2
3.1
3.5
mA
mA
●
10V ≤ VIN ≤ 40V
●
Load Regulation (Notes 4, 6)
Sourcing Current
0 ≤ IOUT ≤ 15mA
●
Sinking Current
0 ≥ IOUT ≥ – 10mA
–8
–10
●
Supply Current
●
VTRIM Adjust Range
en
●
±30
±50
mV
0.1Hz ≤ f ≤ 10Hz
3
10Hz ≤ f ≤ 1kHz
2.0
Temperature Hysteresis
H package; ∆T = 25°C
10
ppm
Long Term Stability
H package
20
ppm/month
Output Noise (Note 5)
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the part may be impaired.
Note 2: Output voltage is measured immediately after turn-on. Changes
due to chip warm-up are typically less than 0.005%.
Note 3: Temperature coefficient is determined by the "box" method in
which the maximum ∆VOUT over the temperature range is divided by ∆T.
Note 4: Line and load regulation measurements are done on a pulse basis.
Output voltage changes due to die temperature change must be taken into
account separately. Package thermal resistance is 150°C/W for TO-5 (H),
130°C/W for PDIP (N8), and 180°C/W for plastic SO (SO-8).
µVP-P
µVRMS
6.0
Note 5: RMS noise is measured with an 8-pole bandpass filter with a
center frequency of 30Hz and a Q of 1.5. The filter output is then rectified
and integrated for a fixed time period, resulting in an average, as opposed
to RMS voltage. A correction factor is used to convert average to RMS.
This value is then used to obtain RMS noise voltage in the 10Hz to 1000Hz
frequency band. This test also screens for low frequency "popcorn" noise
within the bandwidth of the filter. Consult factory for 100% 0.1Hz to 10Hz
noise testing.
Note 6: Devices typically exhibit a slight negative DC output impedance of
– 0.015Ω. This compensates for PC trace resistance, improving regulation
at the load.
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TYPICAL PERFOR A CE CHARACTERISTICS
Output Impedance vs Frequency
Ripple Rejection
OUTPUT IMPEDANCE (Ω)
110
REJECTION (dB)
∆I = ±3mA AC
ISOURCE = 5mA
VIN = 10V
120
100
90
80
70
5.004
10
OUTPUT VOLTAGE (V)
100
Output Voltage
5.006
100
1
0.1
5.002
5.000
4.998
4.996
60
0.01
50
10
100
1k
FREQUENCY (Hz)
10k
1027 G01
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
1027 G02
4.994
–50
–25
50
25
0
TEMPERATURE (°C)
75
100
1027 G03
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LT1027
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TYPICAL PERFOR A CE CHARACTERISTICS
Start-Up and Turn-Off (No Load)
Start-Up and Turn-Off
Quiescent Current
2.5
SUPPLY CURRENT (mA)
2.0
VOUT
1V/DIV
VOUT
1V/DIV
10V
10V
VIN
VIN
RL = 1k, CL = 4.7µF
1µs/DIV
1027 G04
500µs/DIV
1027 G05
1.5
1.0
0.5
0
0
5
10
15 20
25 30
INPUT VOLTAGE (V)
35
40
1027 G06
Load Regulation
200
400
0
–400
–800
–1200
400
180
OUTPUT NOISE DENSITY (nV/√Hz)
CHANGE IN OUTPUT VOLTAGE (µV)
CHANGE IN OUTPUT VOLTAGE (µV)
Output Noise Voltage Density
Line Regulation
500
800
300
200
100
0
–100
–200
–300
8
12
100
80
CNR = 0
60
CNR = 1µF
40
16
20 24
28 32
INPUT VOLTAGE (V)
36
40
10
100
1k
FREQUENCY (Hz)
10k
1027 G08
1027 G09
0.1Hz to 10Hz Output Noise
Filtering = 1 zero at 0.1Hz
2 poles at 10Hz
5µV/DIV
Output Settling Time (Sinking)
Output Settling Time (Sourcing)
VOUT
400µV/DIV
AC COUPLED
10mA
LOAD STEP
120
0
–500
1027 G07
VOUT
400µV/DIV
AC COUPLED
140
20
–400
–1600
–10 –8 –6 –4 –2 0 2 4 6 8 10 12 14 16
Sink Source
IOUT (mA)
160
–10mA
LOAD STEP
2µs/DIV
1027 G10
2µs/DIV
1027 G11
1sec/DIV
1027 G12
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LT1027
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APPLICATI
S I FOR ATIO
MAXIMUM TEMPERATURE COEFFICIENT FOR
0.5LSB ERROR (ppm/°C)
Effect of Reference Drift on System Accuracy
A large portion of the temperature drift error budget in
many systems is the system reference voltage. Figure 1
indicates the maximum temperature coefficient allowable
if the reference is to contribute no more than 0.5LSB error
to the overall system performance. The example shown is
a 12-bit system designed to operate over a temperature
range from 25°C to 65°C. Assuming the system calibration is performed at 25°C, the temperature span is 40°C.
It can be seen from the graph that the temperature coefficient of the reference must be no worse than 3ppm/°C if
it is to contribute less than 0.5LSB error. For this reason,
the LT1027 has been optimized for low drift.
100
8-BIT
10-BIT
10
12-BIT
14-BIT
1.0
0
10 20 30 40 50 60 70 80 90 100
TEMPERATURE SPAN (°C)
1027 AI01
Figure 1. Maximum Allowable Reference Drift
Trimming Output Voltage
The LT1027 has an adjustment pin for trimming output
voltage. The impedance of the VADJ pin is about 20kΩ with
an open-circuit voltage of 2.5V. A ±30mV guaranteed trim
range is achievable by tying the VADJ pin to the wiper of a
10k potentiometer connecting between the output and
ground. Trimming output voltage does not affect the TC of
the device.
Noise Reduction
The positive input of the internal scaling amplifier is
brought out as the Noise Reduction (NR) pin. Connecting
a 1µF Mylar capacitor between this pin and ground will
reduce the wideband noise of the LT1027 from 2.0µVRMS
to approximately 1.2µVRMS in a 10Hz to 1kHz bandwidth.
Transient response is not affected by this capacitor. Startup settling time will increase to several milliseconds due
to the 7kΩ impedance looking into the NR pin. The
capacitor must be a low leakage type. Electrolytics are not
suitable for this application. Just 100nA leakage current
will result in a 150ppm error in output voltage. This pin is
the most sensitive pin on the device. For maximum protection a guard ring is recommended. The ring should be
driven from a resistive divider from VOUT set to 4.4V (the
open-circuit voltage on the NR pin).
Transient Response
The LT1027 has been optimized for transient response.
Settling time is under 2µs when an AC-coupled 10mA load
transient is applied to the output. The LT1027 achieves
fast settling by using a class B NPN/PNP output stage.
When sinking current, the device may oscillate with capacitive loads greater than 100pF. The LT1027 is stable
with all capacitive loads when at no DC load or when
sourcing current, although for best settling time either no
output bypass capactor or a 4.7µF tantalum unit is recommended. An 0.1µF ceramic output capacitor will maximize
output ringing and is not recommended.
Kelvin Connections
Although the LT1027 does not have true force-sense
capability, proper hook-up can improve line loss and
ground loop problems significantly. Since the ground pin
of the LT1027 carries only 2mA, it can be used as a lowside sense line, greatly reducing ground loop problems on
the low side of the reference. The VOUT pin should be close
to the load or connected via a heavy trace as the resistance
of this trace directly affects load regulation. It is important
to remember that a 1.22mV drop due to trace resistance is
equivalent to a 1LSB error in a 5VFS, 12-bit system.
The circuits in Figures 2 and 3 illustrate proper hook-up to
minimize errors due to ground loops and line losses.
Losses in the output lead can be further reduced by adding
a PNP boost transistor if load current is 5mA or higher. R2
can be added to further reduce current in the output sense
load.
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LT1027
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APPLICATI
S I FOR ATIO
INPUT
R1
91Ω
KEEP THIS LINE RESISTANCE LOW
INPUT
LT1027
IN
2N4403
OUT
+
IN
LOAD
GND
LT1027
GROUND
RETURN
OUT
R2*
2.4k
GND
1027 F02
+
4.7µF
LOAD
Figure 2. Standard Hook-Up
GROUND
RETURN
1027 F03
*OPTIONAL–REDUCES CURRENT IN OUTPUT SENSE LEAD
Figure 3. Driving Higher Load Currents
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TYPICAL APPLICATIONS
10V Reference
10V Reference
VIN
VIN
IN
VIN
+
OUT
7
10.00V
OUTPUT
LT1097
LT1027
LT1027
–
VTRIM
VOUT
1µF
OUT
12
5k*
GND
11
1µF
5k
8
LTC1043
GND
5k*
13
14
16
17
* 0.1% METAL FILM
1027 TA03
0.01µF
1027 TA04
Operating 5V Reference from 5V Supply
5V
LOGIC SUPPLY
CMOS LOGIC GATE**
1N914
+
fIN ≥ 2kHz*
C1
5µF*
1N914
≈8.5V
+
C2
5µF*
IN
LT1027
5V
REFERENCE
OUT
GND
1027 TA05
*FOR HIGHER FREQUENCIES C1 AND C2 MAY BE DECREASED
**PARALLEL GATES FOR HIGHER REFERENCE CURRENT LOADING
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LT1027
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EQUIVALE T SCHE ATIC
VIN
VOUT
NR
VADJ
1027 ES
OUTPUT CURRENT LIMIT AND
BIAS CIRCUITS NOT SHOWN
GND
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PACKAGE DESCRIPTIO
H Package
8-Lead TO-5 Metal Can (.230 Inch PCD)
(Reference LTC DWG # 05-08-1321)
0.335 – 0.370
(8.509 – 9.398)
DIA
0.305 – 0.335
(7.747 – 8.509)
0.040
(1.016)
MAX
0.050
(1.270)
MAX
SEATING
PLANE
0.165 – 0.185
(4.191 – 4.699)
GAUGE
PLANE
0.010 – 0.045*
(0.254 – 1.143)
REFERENCE
PLANE
0.500 – 0.750
(12.700 – 19.050)
0.016 – 0.021**
(0.406 – 0.533)
0.027 – 0.045
(0.686 – 1.143)
45°TYP
0.028 – 0.034
(0.711 – 0.864)
PIN 1
0.230
(5.842)
TYP
0.110 – 0.160
(2.794 – 4.064)
INSULATING
STANDOFF
*LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE
AND 0.045" BELOW THE REFERENCE PLANE
0.016 – 0.024
**FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS
(0.406 – 0.610)
H8 (TO-5) 0.230 PCD 1197
OBSOLETE PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LT1027
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PACKAGE DESCRIPTIO
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
(
0.130 ± 0.005
(3.302 ± 0.127)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
8
7
6
5
1
2
3
4
0.255 ± 0.015*
(6.477 ± 0.381)
+0.035
0.325 –0.015
+0.889
8.255
–0.381
0.400*
(10.160)
MAX
)
0.125
(3.175) 0.020
MIN (0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.100
(2.54)
BSC
N8 1098
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
8
7
6
5
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
2
3
4
SO8 1298
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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Precision Series Bandgap Reference, 0.05%, 5ppm/°C Drift
2.5V, 4.5V, 5V, 10V Outputs; Industrial, Military Grades Available
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Precision Buried Zener Diode Reference,
0.5%, 5ppm/°C Drift
5V, 7V, 10V Outputs; 8-Pin PDIP, SO, TO-5 Packages;
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LT1236
Precision Series Reference, 0.05%, 5ppm/°C Drift
5V, 10V Outputs; 8-Pin PDIP, SO Packages; Industrial Grade Available
LT1460
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0.075%, 10ppm/°C Drift
2.5V, 5V, 10V Outputs; 8-Pin PDIP, SO, MSOP;
TO-92 and SOT-23 Packages
LT1461
Low Dropout 3ppm/°C Drift, 0.04% Series Reference
2.5V, SO-8 Package
LT1798
Low Dropout, Micropower Reference
2.5V, 3V, 4.096V, 5V, Adjustable in SO-8
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LT/CPI 1101 1.5K REV C • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 1992