TI1 INA338AIDGST Instrumentation amplifier Datasheet

INA
INA
337
INA337
INA338
338
SBOS248 – JUNE 2002
Wide-Temperature, Precision
INSTRUMENTATION AMPLIFIER
FEATURES
DESCRIPTION
● PRECISION
LOW OFFSET: 100µV (max)
LOW OFFSET DRIFT: 0.4µV/°C (max)
EXCELLENT LONG-TERM STABILITY
VERY-LOW 1/f NOISE
The INA337 and INA338 (with shutdown) are high temperature, high-performance, low-cost, precision instrumentation
amplifiers. They are true single-supply instrumentation amplifiers with very-low DC errors and input common-mode ranges
that extends beyond the positive and approaches the negative rail. These features make them suitable for applications
ranging from general-purpose to high-accuracy.
● SMALL SIZE
microPACKAGE: MSOP-8, MSOP-10
● LOW COST
APPLICATIONS
● LOW-LEVEL TRANSDUCER AMPLIFIER FOR
BRIDGES, LOAD CELLS, THERMOCOUPLES
● WIDE DYNAMIC RANGE SENSOR
MEASUREMENTS
● HIGH-RESOLUTION TEST SYSTEMS
● WEIGH SCALES
● MULTI-CHANNEL DATA ACQUISITION
SYSTEMS
● MEDICAL INSTRUMENTATION
● AUTOMOTIVE APPLICATIONS
● GENERAL-PURPOSE
Excellent long-term stability and very low 1/f noise assure
low offset voltage and drift throughout the life of the product.
The INA337 (without shutdown) comes in the MSOP-8 package. The INA338 (with shutdown) is offered in MSOP-10.
Both are specified over the temperature range, –40°C to
+125°C.
INA337 AND INA338 RELATED PRODUCTS
PRODUCT
FEATURES
INA326
INA114
INA118
INA122
INA128
INA321
Precision, Rail-to-Rail I/O, 2.4mA IQ
50µV VOS, 0.5nA IB, 115dB CMR, 3mA IQ, 0.25µV/°C drift
50µV VOS, 1nA IB, 120dB CMR, 385µA IQ, 0.5µV/°C drift
250µV VOS, –10nA IB, 85µA IQ, Rail-to-Rail Output, 3µV/°C drift
50µV VOS, 2nA IB, 125dB CMR, 750µA IQ, 0.5µV/°C drift
500µV VOS, 0.5pA IB, 94dB CMRR, 60µA IQ, Rail-to-Rail Output
V+
VIN–
2
1
R1
VIN+
V–
7
4
6
INA337
8
3
5
R2
VO
G = 2(R2/R1)
C2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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PACKAGE/ORDERING INFORMATION
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR(1)
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
MSOP-8
DGK
–40°C to +125°C
BIM
"
"
"
"
INA337AIDGKT
INA337AIDGKR
Tape and Reel, 250
Tape and Reel, 2500
MSOP-10
DGS
–40°C to +125°C
BIL
"
"
"
"
INA338AIDGST
INA338AIDGSR
Tape and Reel, 250
Tape and Reel, 2500
INA337
"
INA338
"
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage .................................................................................. +5.5V
Signal Input Terminals: Voltage(2) ......................................... –0.5V to (V+) + 0.5V
Current(2) ........................................................................ ±10mA
Output Short-Circuit ................................................................. Continuous
Operating Temperature Range ....................................... –40°C to +150°C
Storage Temperature Range .......................................... –65°C to +150°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those specified is not implied.
(2) Input terminals are diode clamped to the power-supply rails. Input signals that
can swing more than 0.5V beyond the supply rails should be current limited to
10mA or less.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PIN CONFIGURATION
Top View
8
R1
R1
1
10 R1
7
V+
VIN–
2
9
V+
3
6
VO
VIN+
3
8
VO
4
5
R2
V–
4
7
R2
(Connect to V+)
5
6
Enable
R1
1
VIN–
2
VIN+
V–
INA337
MSOP-8
INA338
MSOP-10
2
INA337, INA338
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SBOS222A
ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V
BOLDFACE limits apply over the specified temperature range, TA = –40°C to +125°C
At TA = +25°C, RL = 10kΩ, G = 100 (R1 = 2kΩ, R2 = 100kΩ), external gain set resistors, and IACOMMON = VS /2, with external equivalent filter corner of 1kHz filters,
unless otherwise noted.
INA337AIDGK, INA338AIDGS
PARAMETER
CONDITION
INPUT
VS = +5V, VCM = VS /2
Offset Voltage, RTI
VOS
Over Temperature
vs Temperature
dVOS/dT
vs Power Supply
PSR
VS = +2.7V to +5.5V, VCM = VS /2
Long-Term Stability
Input Impedance, Differential
Common-Mode
Input Voltage Range
Safe Input Voltage
Common-Mode Rejection
CMR VS = +5V, VCM = (V–) + 0.25V to (V+) + 0.1V
Over Temperature
INPUT BIAS CURRENT
Bias Current
vs Temperature
Offset Current
IB
VCM = VS /2
VS = +5V
IOS
VS = +5V
NOISE
Voltage Noise, RTI
f = 10Hz
f = 100Hz
f = 1kHz
f = 0.01Hz to 10Hz
Voltage Noise, RTI
f = 10Hz
f = 100Hz
f = 1kHz
f = 0.01Hz to 10Hz
Current Noise, RTI
f = 1kHz
f = 0.01Hz to 10Hz
Output Ripple, VO Filtered(2)
MAX
UNITS
±140
±0.4
±100
µV
µV
µV/°C
µV/V
(V+) + 0.1
(V+) + 0.5
Ω || pF
Ω || pF
V
V
dB
dB
±20
±0.1
±20
±3
See Note (1)
1010 || 2
1010 || 14
(V–) + 0.25
(V–) –0.5
106
100
120
±0.2
See Typical Characteristics
±0.2
±2
nA
±2
nA
33
33
33
0.8
nV/ √Hz
nV/ √Hz
nV/ √Hz
µVp-p
120
97
97
4
nV/ √Hz
nV/ √Hz
nV/ √Hz
µVp-p
0.15
4.2
See Applications Information
pA/ √Hz
pAp-p
RS = 0Ω, G = 10, R1 = 20kΩ, R2 = 100kΩ
G = 2(R2/R1)
< 0.1
G = 10, 100, VS = +5V, VO = 0.25V to 4.925V
G = 10, 100, VS = +5V, VO = 0.25V to 4.925V
G = 10, 100, VS = +5V, VO = 0.25V to 4.925V
OUTPUT
Voltage Output Swing from Positive Rail
Over Temperature
Voltage Output Swing from Negative Rail
Over Temperature
Capacitive Load Drive
Short-Circuit Current
ISC
RL = 10kΩ, VS = 5V
RL = 10kΩ, VS = 5V
INTERNAL OSCILLATOR
Frequency of Auto-Correction
Accuracy
BW
G = 1 to 1k
SR
VS = 5V, All Gains, CL = 100pF
tS 1kHz Filter, G = 1 to 1k, VO = 2V step, CL = 100pF
10kHz Filter, G = 1 to 1k, VO = 2V step, CL = 100pF
1kHz Filter, 50% Output Overload, G = 1 to 1k
10kHz Filter, 50% Output Overload, G = 1 to 1k
INA337, INA338
SBOS222A
TYP
RS = 0Ω, G = 100, R1 = 2kΩ, R2 = 100kΩ
GAIN
Gain Equation
Range of Gain
Gain Error(3)
vs Temperature
Nonlinearity
FREQUENCY RESPONSE
Bandwidth(4), –3dB
Slew Rate(4)
Settling Time(4), 0.1%
0.01%
0.1%
0.01%
Overload Recovery(4)
MIN
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0.08
±6
±0.003
(V+) – 0.075
(V+) – 0.075
(V–) + 0.25
(V–) + 0.25
(V+) – 0.01
> 10000
±0.2
±25
±0.01
V/V
%
ppm/°C
% of FS
500
±25
V
V
V
V
pF
mA
90
±20
kHz
%
1
Filter Limited
0.95
1.3
130
160
30
5
kHz
(V+) + 0.01
ms
ms
µs
µs
µs
µs
3
ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V (Cont.)
BOLDFACE limits apply over the specified temperature range, TA = –40°C to +125°C
At TA = +25°C, RL = 10kΩ, G = 100 (R1 = 2kΩ, R2 = 100kΩ), external gain set resistors, and IACOMMON = VS /2, with external equivalent filter corner of 1kHz filters,
unless otherwise noted.
INA337AIDGK, INA338AIDGS
PARAMETER
POWER SUPPLY
Specified Voltage Range
Quiescent Current
Over Temperature
CONDITION
TYP
MAX
UNITS
2.4
+5.5
3.4
3.7
V
mA
mA
0.25
V
V
µs
µs
µA
+2.7
IQ
SHUTDOWN
Disable (Logic-Low Threshold)
Enable (Logic-High Threshold)
Enable Time(5)
Disable Time
Shutdown Current and Enable Pin Current
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance
MIN
IO = 0, Diff VIN = 0V, VS = +5V
1.6
75
100
2
VS = +5V, Disabled
–40
–40
–65
θJA
MSOP-8 Surface-Mount
5
+125
+150
+150
150
°C
°C
°C
°C/W
NOTES: (1) 1000-hour life test at 150°C demonstrated randomly distributed variation in the range of measurement limits—approximately 10µV. (2) See Applications
Information section, Figures 1 and 2. (3) Does not include error and TCR of external gain-setting resistors. (4) Dynamic response is limited by filtering. Higher
bandwidths can be achieved by adjusting the filter. (5) See Typical Characteristics, “Input Offset Voltage vs Warm-Up Time”.
4
INA337, INA338
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SBOS222A
TYPICAL CHARACTERISTICS
At TA = 25°C, VS = +5V, Gain = 100, RL = 10kΩ with external equivalent filter corner of 1kHz filters, unless otherwise noted.
GAIN vs FREQUENCY
1kHz FILTER
GAIN vs FREQUENCY
10kHz FILTER
80
80
60
60
G = 1k
G = 1k
40
Gain (dB)
Gain (dB)
40
G = 100
20
G = 10
0
G = 100
20
G = 10
0
G=1
G=1
–20
–20
–40
–40
10
100
1k
10k
Frequency (Hz)
100k
1M
10
100
1k
10k
Frequency (Hz)
CMR vs FREQUENCY
1kHz FILTER
100k
1M
100k
1M
CMR vs FREQUENCY
10kHz FILTER
160
160
G = 1k
140
140
G = 100
120
CMR (dB)
100
G = 10
80
G=1
G = 1k
100
80
G = 100
60
60
40
40
G=1
20
20
10
100
1k
10k
Frequency (Hz)
100k
1M
10
Input-Referred Voltage Noise (nV/√Hz)
G = 100, 1k
100
PSR (dB)
80
G = 10
G=1
60
40
Filter Frequency
10kHz
1kHz
20
100
1k
10k
Frequency (Hz)
INPUT-REFERRED VOLTAGE NOISE AND
INPUT BIAS CURRENT NOISE vs FREQUENCY
10kHz Filter
POWER-SUPPLY REJECTION vs FREQUENCY
120
G = 10
0
10k
1
Current Noise
(all gains)
1k
0.1
G=1
G = 10
100
0.01
G = 100
G = 1000
10
10
100
1k
Frequency (Hz)
10k
100k
INA337, INA338
SBOS222A
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Input Bias Current Noise (pA/√Hz)
CMR (dB)
120
0.001
1
10
100
Frequency (Hz)
1k
10k
5
TYPICAL CHARACTERISTICS (Cont.)
At TA = 25°C, VS = +5V, Gain = 100, RL = 10kΩ with external equivalent filter corner of 1kHz filters, unless otherwise noted.
INPUT OFFSET VOLTAGE vs WARM-UP TIME
10kHz FILTER, G = 100
INPUT OFFSET VOLTAGE vs TURN-ON TIME
1kHz FILTER, G = 100
Input Offset Voltage (20µV/div)
Input Offset Voltage (20µV/div)
Filter
Settling Time
Device
Turn-On
Time
(75µs)
0
1
Turn-On Time (ms)
Device
Turn-On
Time
Filter
Settling Time
0
2
SMALL-SIGNAL RESPONSE
G = 1, 10, AND 100
0.1
0.2
0.3
Warm-Up Time (ms)
0.4
SMALL-SIGNAL STEP RESPONSE
G = 1000
50mV/div
1kHz Filter
50mV/div
1kHz Filter
10kHz Filter
500µs/div
500µs/div
LARGE-SIGNAL RESPONSE
G = 1 TO 1000
0.01Hz TO 10Hz VOLTAGE NOISE
2V/div
200nV/div
1kHz Filter
10kHz Filter
10s/div
500µs/div
6
INA337, INA338
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SBOS222A
TYPICAL CHARACTERISTICS (Cont.)
At TA = 25°C, VS = +5V, Gain = 100, RL = 10kΩ with external equivalent filter corner of 1kHz filters, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
G=1
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
–10,000
–9000
–8000
–7000
–6000
–5000
–4000
–3000
–2000
–1000
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10,000
Population
Population
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
G=1
Offset Voltage Drift (µV/°C)
Offset Voltage (µV)
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
G = 10
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
–1000
–900
–800
–700
–600
–500
–400
–300
–200
–100
0
100
200
300
400
500
600
700
800
900
1000
Population
Population
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
G = 10
Offset Voltage Drift (µV/°C)
Offset Voltage (µV)
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
G = 100 and 1000
0.0
0.2
0.4
0.6
0.8
0.1
0.12
0.14
0.16
0.18
0.2
0.22
0.24
0.26
0.28
0.3
0.32
0.34
0.36
0.38
0.4
100
90
80
70
60
50
40
30
20
10
0
10
20
30
40
50
60
70
80
90
100
Population
Population
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
G = 100 and 1000
Offset Voltage (µV)
Offset Voltage Drift (µV/°C)
INA337, INA338
SBOS222A
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7
TYPICAL CHARACTERISTICS (Cont.)
At TA = 25°C, VS = +5V, Gain = 100, RL = 10kΩ with external equivalent filter corner of 1kHz filters, unless otherwise noted.
VOUT (dBV)
Population
100
100
110
31.6
120
1
130
0.316
140
0.10
150
0.03
160
0.01
170
0.003
–200
–180
–160
–140
–120
–100
–80
–60
–40
–20
0
20
40
60
80
100
120
140
160
180
200
180
0
200k
400k
600k
Frequency (Hz)
Gain Error (m%)
QUIESCENT CURRENT vs TEMPERATURE
INPUT BIAS CURRENT vs TEMPERATURE
3.0
2.0
VS = +5V
1.5
2.5
1.0
IB+
0.5
VS = +2.7V
IB (nA)
IQ (mA)
2.0
1.5
0
–0.5
1.0
IB–
–1.0
0.5
0
–50
0.001
1M
800k
–1.5
–2.0
–25
0
25
50
Temperature (°C)
75
100
–40
125
–20
0
20
40
60
80
100
120
Temperature (°C)
OUTPUT SWING TO THE NEGATIVE RAIL
vs TEMPERATURE
Output Swing to Negative Rail (mV)
16
14
12
10
8
6
4
2
0
–40
–20
0
20
40
60
80
100
120
Temperature (°C)
8
INA337, INA338
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SBOS222A
VOUT (µVrms)
INPUT-REFERRED RIPPLE SPECTRUM
G = 100
GAIN ERROR PRODUCTION DISTRIBUTION
APPLICATIONS INFORMATION
SETTING THE GAIN
The INA337 is a 2-stage amplifier with each stage gain set
by R1 and R2, respectively (see Figure 4, “Inside the INA337",
for details.) Overall gain is described by the equation:
Figure 1 shows the basic connections required for operation of
the INA337. A 0.1µF capacitor, placed close to and across the
power-supply pins is strongly recommended for highest accuracy. RoCo is an output filter that minimizes auto-correction
circuitry noise. This output filter may also serve as an antialiasing filter ahead of an Analog-to-Digital (A/D) converter. It
is also optional based on desired precision.
G=
2R2
R1
(1)
The stability and temperature drift of the external gain-setting
resistors will affect gain by an amount that can be directly
inferred from the gain equation (1).
The output reference terminal is taken at the low side of R2
(IACOMMON).
Resistor values for commonly used gains are shown in
Figure 1. Gain-set resistor values for best performance are
different for +5V single-supply and for ±2.5V dual-supply
operation. Optimum value for R1 can be calculated by:
The INA337 uses a unique internal topology to achieve excellent common-mode rejection (CMR). Unlike conventional instrumentation amplifiers, CMR is not affected by resistance in
the reference connections. See “Inside the INA337” for further
detail. To achieve best high-frequency CMR, minimize capacitance on pins 1 and 8.
R1 = VIN, MAX/12.5µA
(2)
where R1 must be no less than 2kΩ.
Dual-Supply Operation
DESIRED
GAIN
R1
(Ω)
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
1000
2000
5000
10000
400k
400k
400k
200k
100k
40k
20k
10k
4k
2k
2k
2k
2k
2k
2k
2k
R2 || C2
(Ω || nF)
20k ||
40k ||
100k ||
100k ||
100k ||
100k ||
100k ||
100k ||
100k ||
100k ||
200k ||
500k ||
1M ||
2M ||
5M ||
10M ||
5
2.5
1
1
1
1
1
1
1
1
0.5
0.2
0.1
0.05
0.02
0.01
–2.5V
+2.5V
0.1µF
VIN–
R1
VIN+
2
7
1
4
6
INA337
RO
VO 100Ω
VO Filtered
CO(1)
1µF
8
5
3
G = 2(R2/R1)
fO = 1kHz
C2(1)
R2
IACOMMON(2)
NOTES: (1) C2 and CO combine to form a 2-pole response that is –3dB at 1kHz.
Each individual pole is at 1.5kHz. (2) Output voltage is referenced to IACOMMON (see text).
Single-Supply Operation
DESIRED
GAIN
R1
(Ω)
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
1000
2000
5000
10000
400k
400k
400k
400k
200k
80k
40k
20k
8k
4k
2k
2k
2k
2k
2k
2k
V+
R2 || C2
(Ω || nF)
20k ||
40k ||
100k ||
200k ||
200k ||
200k ||
200k ||
200k ||
200k ||
200k ||
200k ||
500k ||
1M ||
2M ||
5M ||
10M ||
5
2.5
1
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.2
0.1
0.05
0.02
0.01
V–
0.1µF
VIN–
2
7
1
R1
4
6
INA337
RO
VO 100Ω
VIN+
VO Filtered
CO(1)
8
5
3
G = 2(R2/R1)
1µF
(3)
R2
fO = 1kHz
C2(1)
IACOMMON(2)
NOTES: (1) C2 and CO combine to form a 2-pole response that is –3dB at 1kHz.
Each individual pole is at 1.5kHz. (2) Output voltage is referenced to IACOMMON (see text).
(3) Output pedestal required for measurement near zero (see Figure 6).
FIGURE 1. Basic Connections. NOTE: Connections for INA338 differ—see Pin Configuration for detail.
INA337, INA338
SBOS222A
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9
Following this design procedure for R1 produces the maximum possible input stage gain for best accuracy and lowest
noise.
Circuit layout and supply bypassing can affect performance.
Minimize the stray capacitance on pins 1 and 8. Use recommended supply bypassing, including a capacitor directly from
pin 7 to pin 4 (V+ to V–), even with dual (split) power supplies
(see Figure 1).
DYNAMIC PERFORMANCE
The typical characteristic “Gain vs Frequency” shows that the
INA337 has nearly constant bandwidth regardless of gain.
This results from the bandwidth limiting from the recommended filters.
NOISE PERFORMANCE
Internal auto-correction circuitry eliminates virtually all 1/f
noise (noise that increases at low frequency) in gains of 100
or greater. Noise performance is affected by gain-setting
resistor values. Follow recommendations in the “Setting
Gain” section for best performance.
Total noise is a combination of input stage noise and output
stage noise. When referred to the input, the total mid-band
noise is:
VN = 33nV / Hz +
800nV / Hz
G
(3)
The output noise has some 1/f components that affect
performance in gains less than 10. See typical characteristic
“Input-Referred Voltage Noise vs Frequency.”
High-frequency noise is created by internal auto-correction
circuitry and is highly dependent on the filter characteristics
chosen. This may be the dominant source of noise visible
when viewing the output on an oscilloscope. Low cutoff
frequency filters will provide lowest noise. Figure 2 shows the
typical noise performance as a function of cutoff frequency.
Applications sensitive to the spectral characteristics of highfrequency noise may require consideration of the spurious
frequencies generated by internal clocking circuitry. “Spurs”
occur at approximately 90kHz and its harmonics (see typical
characteristic “Input Referred Ripple”) which may be reduced
by additional filtering below 1kHz.
Insufficient filtering at pin 5 can cause nonlinearity with large
output voltage swings (very near the supply rails). Noise
must be sufficiently filtered at pin 5 so that noise peaks do not
“hit the rail” and change the average value of the signal.
Figure 2 shows guidelines for filter cutoff frequency.
HIGH-FREQUENCY NOISE
C2 and CO form filters to reduce internally generated autocorrection circuitry noise. Filter frequencies can be chosen to
optimize the tradeoff between noise and frequency response
of the application, as shown in Figure 2. The cutoff frequencies of the filters are generally set to the same frequency.
Figure 2 shows the typical output noise for four gains as a
function of the –3dB cutoff frequency of each filter response.
Small signals may exhibit the addition of internally generated
auto-correction circuitry noise at the output. This noise,
combined with broadband noise, becomes most evident in
higher gains with filters of wider bandwidth.
INPUT BIAS CURRENT RETURN PATH
The input impedance of the INA337 is extremely high—
approximately 1010Ω. However, a path must be provided for
the input bias current of both inputs. This input bias current is
approximately ±0.2nA. High input impedance means that this
input bias current changes very little with varying input voltage.
Input circuitry must provide a path for this input bias current
for proper operation. Figure 3 shows provisions for an input
bias current path in a thermocouple application. Without a
bias current path, the inputs will float to an undefined potential and the output voltage may not be valid.
Total Output Noise (µVRMS)
1k
G = 1000
100
Thermocouple
10
5
G = 100
G = 10
G=1
1
1
10
100
1k
Required Filter Cutoff Frequency (Hz)
10k
FIGURE 2. Total Output Noise vs Filter Cutoff Frequency.
10
INA337
FIGURE 3. Providing Input Bias Current Return Path.
INA337, INA338
www.ti.com
SBOS222A
INPUT AND OUTPUT VOLTAGE
INPUT PROTECTION
The INA337 and INA338 feature nearly rail-to-rail input
behavior, with the linear input voltage range extending from
0.25V above the negative rail to 0.1V above the positive rail.
The output is able to swing to within 0.25V of the negative rail
and 0.075V of the positive rail. See Typical Characteristics
Curve “Output Swing to the Negative Rail” for additional
detail.
The inputs of the INA337 are protected with internal diodes
connected to the power-supply rails. These diodes will clamp the
applied signal to prevent it from damaging the input circuitry. If the
input signal voltage can exceed the power supplies by more than
0.5V, the input signal current should be limited to less than 10mA
to protect the internal clamp diodes. This can generally be done
with a series input resistor. Some signal sources are inherently
current-limited and do not require limiting resistors.
INSIDE THE INA337
A simplified diagram shows the basic circuit function. The
differential input voltage, (VIN+) – (VIN–) is applied across
R1. The signal-generated current through R1 comes from
A1 and A2’s output stages. A2 combines the current in R1
with a mirrored replica of the current from A1. The resulting current in A2’s output and associated current mirror is
two times the current in R1. This current flows in (or out)
of pin 5 into R2. The resulting gain equation is:
The INA337 uses a new, unique internal circuit topology
that provides near rail-to-rail input. Unlike other instrumentation amplifiers, it can linearly process inputs from
0.25V above the negative rail to 0.1V beyond the positive
rail. Conventional instrumentation amplifier circuits cannot
deliver such performance, even if rail-to-rail op amps are
used.
The ability to reject common-mode signals is derived in
most instrumentation amplifiers through a combination of
amplifier CMR and accurately matched resistor ratios. The
INA337 converts the input voltage to a current. Currentmode signal processing provides rejection of commonmode input voltage and power-supply variation without
accurately matched resistors.
G=
2R2
R1
Amplifiers A1, A2 and their associated mirrors are powered from internal charge-pumps that provide voltage
supplies that are beyond the positive negative supply. As
a result, the voltage developed on R2 can actually swing
100mV above the positive power-supply rail. A3 provides
a buffered output of the voltage on R2. A3’s input stage is
also operated from the charge-pumped power supplies for
true rail-to-rail operation.
The topology of the INA337 avoids aliasing issues that
appear in instrumentation amplifiers that use sampled
data techniques.
V+
V–
0.1µF
Current Mirror
IR1
VIN–
IR1
A1
Current Mirror
IR1
R1
Current Mirror
IR1
2IR1
2IR1
VIN+
A2
2IR1
A3
2IR1
Current Mirror
VO
2IR1
R2
C2
IACOMMON
FIGURE 4. Simplified Circuit Diagram.
INA337, INA338
SBOS222A
www.ti.com
11
FILTERING
Filtering can be adjusted through selection of R2C2 and
ROCO for the desired tradeoff of noise and bandwidth. Adjustment of these components will result in more or less ripple
due to auto-correction circuitry noise and will also affect
broadband noise. Filtering limits slew rate, settling time, and
output overload recovery time.
R0
R1
5
VREF = 10V to 5V
C0
R´2
It is generally desirable to keep the resistance of RO relatively
low to avoid DC gain error created by the subsequent stage
loading. This may result in relatively high values for CO to
produce the desired filter response. The impedance of ROCO
can be scaled higher to produce smaller capacitor values if
the load impedance is very high.
Certain capacitor types greater than 0.1µF may have dielectric absorption effects that can significantly increase settling
time in high-accuracy applications (settling to 0.01%). Polypropylene, polystyrene, and polycarbonate types are generally
good. Certain “high-K” ceramic types may produce slow
settling “tails.” Settling time to 0.1% is not generally affected
by high-K ceramic capacitors. Electrolytic types are not
recommended for C2 and CO.
INA337
R2 and R´2 are chosen to
create a small pedestal
voltage (e.g., 250mV).
Gain is determined by
the parallel combination
of R2 and R´2.
R2
C2
G = 2 (R2 || R´2)/R1
FIGURE 6. Output Range Pedestal.
+5V
RS must be chosen
so that the input voltage
does not exceed 100mV
above the rail.
RS
INA338 ENABLE FUNCTION
IL
RO
The INA338 can be enabled by applying a logic “High”
voltage level to the Enable pin. Conversely, a logic “Low”
voltage level will disable the amplifier, reducing its supply
current from 2.4mA to typically 2µA. For battery-operated
applications, this feature may be used to greatly reduce the
average current and extend battery life. This pin should be
connected to a valid high or low voltage or driven, not left
open circuit. The Enable pin can be modeled as a CMOS
input gate as in Figure 5.
R1
INA337
5
NOTE: Connection point
of V+ will include (
) or
exclude (
) quiescent
current in the measurement
as desired. Output pedestal
required for measurements
near zero (see Figure 6).
CO
R2
C2
FIGURE 7. High-Side Shunt Measurement of Current Load.
V+
2µA
Enable
VREF
VREF
6
V–
RO
FIGURE 5. Enable Pin Model.
2kΩ
5
The enable time following shutdown is 75µs plus the settling
time due to filters (see Typical Characteristics, “Input Offset
Voltage vs Warm-up Time”). Disable time is 100µs. This
allows the INA338 to be operated as a “gated” amplifier, or
to have its output multiplexed onto a common output bus.
When disabled, the output assumes a high-impedance state.
A/D
Converter
INA337
CO
200kΩ
G = 2(200kΩ || 200kΩ)/2kΩ = 100
200kΩ
C2
INA338 PIN 5
Pin 5 of the INA338 should be connected to V+ to ensure
proper operation.
12
FIGURE 8. Output Referenced to VREF/2.
INA337, INA338
www.ti.com
SBOS222A
PACKAGE DRAWINGS
MPDS028B – JUNE 1997 – REVISED SEPTEMBER 2001
DGK (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,38
0,25
0,65
8
0,08 M
5
0,15 NOM
3,05
2,95
4,98
4,78
Gage Plane
0,25
1
0°– 6°
4
3,05
2,95
0,69
0,41
Seating Plane
1,07 MAX
0,15
0,05
0,10
4073329/C 08/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-187
INA337, INA338
SBOS222A
www.ti.com
13
PACKAGE DRAWINGS (Cont.)
MPDS035A – JANUARY 1998 – REVISED SEPTEMBER 2001
DGS (S-PDSO-G10)
PLASTIC SMALL-OUTLINE PACKAGE
0,27
0,17
0,50
10
0,08 M
6
0,15 NOM
3,05
2,95
4,98
4,78
Gage Plane
0,25
1
0°– 6°
5
3,05
2,95
0,69
0,41
Seating Plane
1,07 MAX
0,15
0,05
0,10
4073272/B 08/01
NOTES: A.
B.
C.
A.
14
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-187
INA337, INA338
www.ti.com
SBOS222A
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA337AIDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BIM
INA337AIDGKRG4
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BIM
INA337AIDGKT
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BIM
INA337AIDGKTG4
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BIM
INA338AIDGST
ACTIVE
VSSOP
DGS
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BIL
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
INA337AIDGKR
VSSOP
DGK
INA337AIDGKT
VSSOP
INA338AIDGST
VSSOP
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
DGK
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
DGS
10
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA337AIDGKR
VSSOP
DGK
8
2500
367.0
367.0
35.0
INA337AIDGKT
VSSOP
DGK
8
250
210.0
185.0
35.0
INA338AIDGST
VSSOP
DGS
10
250
210.0
185.0
35.0
Pack Materials-Page 2
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