ON MC100H603FNR2 9−bit latch ecl to ttl translator Datasheet

MC10H603, MC100H603
9−Bit Latch ECL to TTL
Translator
Description
The MC10H/100H603 is a 9−bit, dual supply ECL to TTL
translator. Devices in the ON Semiconductor 9−bit translator series
utilize the 28−lead PLCC for optimal power pinning, signal
flow−through and electrical performance.
The devices feature a 48 mA TTL output stage, and AC
performance is specified into both a 50 pF and 200 pF load
capacitance. Latching is controlled by Latch Enable (LEN), and
Master Reset (MR) resets the latches. A HIGH on OEECL sends the
outputs into the high impedance state. All control inputs are ECL
level.
The 10H version is compatible with MECL 10Ht ECL logic levels.
The 100H version is compatible with 100K levels.
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PLCC−28
FN SUFFIX
CASE 776
Features
•
•
•
•
•
•
•
•
9−Bit Ideal for Byte−Parity Applications
3−State TTL Outputs
Flow−Through Configuration
Extra TTL and ECL Power Pins to Minimize Switching Noise
Dual Supply
6.0 ns Max Delay into 50 pF, 12 ns into 200 pF
(all Outputs Switching)
PNP TTL Inputs for Low Loading
Pb−Free Packages are Available*
MARKING DIAGRAM*
1
MCxxxH603G
AWLYYWW
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 10
1
Publication Order Number:
MC10H603/D
MC10H603, MC100H603
Table 1. PIN NAMES
Q5 GND VCCT Q6 GND Q7 Q8
25
24
23
22
21
20
PIN
19
Q4
26
18
D8
Q3
27
17
D7
VCCT
28
16
VCCE
15
D6
Q2
GND
2
14
D5
Q1
3
13
D4
Q0
4
12
D3
5
6
7
8
9
10
MR LEN OEECL VEE D0 D1
FUNCTION
GND
VCCE
VCCT
VEE
D0 −D8
Q0 −Q8
OEECL
LEN
MR
TTL Ground (0 V)
ECL VCC (0 V)
TTL Supply (+ 5.0 V)
ECL Supply (− 5.2 / −4.5 V)
Data Inputs (ECL)
Data Outputs (TTL)
3-State Control (ECL)
Latch Enable (ECL)
Master Reset (ECL)
11
D2
Figure 1. PLCC−28 Pinout (Top View)
OEECL
Table 2. TRUTH TABLE
DQ
EN
Q0
D
LEN
MR
OEECL
Q
D1
DQ
EN
Q1
D2
DQ
EN
Q2
L
H
X
X
X
L
L
H
X
X
L
L
L
H
X
L
L
L
L
H
L
H
Q0
L
Z
D3
DQ
EN
Q3
ECL D4
DQ
EN
Q4
D5
DQ
EN
Q5
D6
DQ
EN
Q6
D7
DQ
EN
Q7
D8
DQ
EN
Q8
D0
TTL
LEN
MR
Figure 2. Logic Diagram
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2
MC10H603, MC100H603
10H ECL DC CHARACTERISTICS: VCCT = 5.0 V ± 10%; VEE = − 5.2 V ± 5%
0°C
Symbol
Min
Parameter
25°C
Max
IEE
Power Supply Current
IINH
IINL
Input HIGH Current
Input LOW Current
0.5
VIH
VIL
Input HIGH Voltage
Input LOW Voltage
−1170
−1950
Min
−64
255
−840
−1480
85°C
Max
Min
Max
Unit
−64
mA
175
mA
mA
−720
−1445
mV
−64
175
0.5
−1130
−1950
−810
−1480
0.5
−1060
−1950
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
100H ECL DC CHARACTERISTICS: VCCT = 5.0 V ± 10%; VEE = − 4.2 V to − 5.5 V
0°C
Symbol
Min
Parameter
25°C
Max
IEE
Power Supply Current
IINH
IINL
Input HIGH Current
Input LOW Current
0.5
VIH
VIL
Input HIGH Voltage
Input LOW Voltage
−1165
−1810
Min
Max
−63
255
−880
−1475
85°C
Min
Max
Unit
−68
mA
175
mA
mA
−880
−1475
mV
−64
175
0.5
−1165
−1810
−880
−1475
0.5
−1165
−1810
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
TTL DC CHARACTERISTICS: VCCT = 5.0 V ± 10%; VEE = − 5.2 V ± 5% (10H); VEE = − 4.2 V to − 5.5 V (100H)
0°C
Symbol
ICCH
Parameter
Min
Condition
Power Supply Current
ICCL
ICCZ
Power Supply Current
IOS
Output Short Circuit Current
VOUT = 0 V
IOZH
IOZL
Output Disable Current HIGH
Output Disable Current LOW
VOUT = 2.7 V
VOUT = 0.5 V
VOHT
Output HIGH Voltage
IOH = − 3.0 mA
IOH = −15 mA
VOLT
Output LOW Voltage
IOL = 48 mA
−100
25°C
Max
Min
85°C
Max
Min
Max
Unit
mA
110
110
110
110
110
110
110
110
110
−225
−100
50
−50
2.5
2.0
−225
50
−50
2.5
2.0
0.55
−100
−225
mA
50
−50
mA
2.5
2.0
0.55
V
0.55
V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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3
MC10H603, MC100H603
AC CHARACTERISTICS: VCCT = 5.0 V ± 10%; VEE = − 5.2 V ± 5% (10H); VEE = − 4.2 V to − 5.5 V (100H)
0°C
Symbol
tPLH
tPHL
Parameter
Propagation Delay
to Output
Condition
25°C
85°C
Min
Max
Min
Max
Min
Max
Unit
D
CL = 50 pF
CL = 200 pF
3.0
6.4
6.0
12
3.0
6.4
6.0
12
3.0
6.4
6.0
12
ns
ns
LEN
CL = 50 pF
CL = 200 pF
3.5
7.0
6.5
13
3.5
7.0
6.5
13
3.5
7.0
6.5
13
ns
ns
MR
CL = 50 pF
CL = 200 pF
3.0
6.0
6.0
12
3.0
6.0
6.0
12
3.0
6.0
6.0
12
ns
ns
tPLZ
tPHZ
Output Disable Time
CL = 50 pF
CL = 200 pF
2.5
4.2
6.5
13
2.5
4.2
6.5
13
2.5
4.2
6.5
13
ns
ns
tPZL
tPZH
Output Enable Time
CL = 50 pF
CL = 200 pF
2.0
4.0
5.0
10
2.0
4.0
5.0
10
2.0
4.0
5.0
10
ns
ns
ts
Setup Time
D to LEN
1.5
1.5
1.5
ns
th
Hold Time
D to LEN
0.8
0.8
0.8
ns
tw(L)
LEN Pulse Width, LOW
2.0
2.0
2.0
ns
tR
tF
Output Rise/Fall Time
1.0 V −2.0 V
CL = 50 pF
CL = 200 pF
0.2
0.2
1.2
3.0
0.2
0.2
1.2
3.0
0.2
0.2
1.2
3.0
ns
ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
ORDERING INFORMATION
Package
Shipping †
MC10H603FN
PLCC−28
37 Units / Rail
MC10H603FNG
PLCC−28
(Pb−Free)
37 Units / Rail
MC10H603FNR2
PLCC−28
500 / Tape & Reel
MC10H603FNR2G
PLCC−28
(Pb−Free)
500 / Tape & Reel
MC100H603FN
PLCC−28
37 Units / Rail
MC100H603FNG
PLCC−28
(Pb−Free)
37 Units / Rail
MC100H603FNR2
PLCC−28
500 / Tape & Reel
MC100H603FNR2G
PLCC−28
(Pb−Free)
500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC10H603, MC100H603
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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MC10H603, MC100H603
PACKAGE DIMENSIONS
PLCC−28
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 776−02
ISSUE E
−N−
0.007 (0.180)
B
Y BRK
T L−M
M
0.007 (0.180)
U
M
N
S
T L−M
S
S
N
S
D
Z
−M−
−L−
W
28
D
X
V
1
A
0.007 (0.180)
R
0.007 (0.180)
C
M
M
T L−M
T L−M
S
S
N
S
N
S
0.007 (0.180)
H
N
S
S
G
J
0.004 (0.100)
−T− SEATING
T L−M
S
N
T L−M
S
N
S
K
PLANE
F
VIEW S
G1
M
K1
E
S
T L−M
S
VIEW D−D
Z
0.010 (0.250)
0.010 (0.250)
G1
VIEW S
S
NOTES:
1. DATUMS −L−, −M−, AND −N− DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS
PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM −T−, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE
MOLD FLASH. ALLOWABLE MOLD FLASH IS
0.010 (0.250) PER SIDE.
4. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN
THE PACKAGE BOTTOM BY UP TO 0.012
(0.300). DIMENSIONS R AND U ARE
DETERMINED AT THE OUTERMOST
EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR
BURRS, GATE BURRS AND INTERLEAD
FLASH, BUT INCLUDING ANY MISMATCH
BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037
(0.940). THE DAMBAR INTRUSION(S) SHALL
NOT CAUSE THE H DIMENSION TO BE
SMALLER THAN 0.025 (0.635).
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
INCHES
MIN
MAX
0.485
0.495
0.485
0.495
0.165
0.180
0.090
0.110
0.013
0.019
0.050 BSC
0.026
0.032
0.020
−−−
0.025
−−−
0.450
0.456
0.450
0.456
0.042
0.048
0.042
0.048
0.042
0.056
−−− 0.020
2_
10_
0.410
0.430
0.040
−−−
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6
MILLIMETERS
MIN
MAX
12.32
12.57
12.32
12.57
4.20
4.57
2.29
2.79
0.33
0.48
1.27 BSC
0.66
0.81
0.51
−−−
0.64
−−−
11.43
11.58
11.43
11.58
1.07
1.21
1.07
1.21
1.07
1.42
−−−
0.50
2_
10_
10.42
10.92
1.02
−−−
0.007 (0.180)
M
T L−M
S
N
S
MC10H603, MC100H603
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
MECL 10H is a trademark of Motorola, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your local
Sales Representative
MC10H603/D