STMicroelectronics M40Z300WMH1F 5v or 3v nvram supervisor for up to 8 lpsram Datasheet

M40Z300
M40Z300W
5V or 3V NVRAM supervisor for up to 8 LPSRAMs
Features
■
Converts low power SRAM into NVRAMs
■
Precision power monitoring and power
switching circuitry
■
Automatic WRITE-protection when VCC is outof-tolerance
■
Two-input decoder allows control for up to 8
SRAMs (with 2 devices active in parallel)
■
Choice of supply voltages and power-fail
deselect voltages:
– M40Z300:
VCC = 4.5V to 5.5V
THS = VSS: 4.5V ≤ VPFD ≤ 4.75V
THS = VOUT: 4.2V ≤ VPFD ≤ 4.5V
– M40Z300W:
VCC = 3.0V to 3.6V
THS = VSS: 2.8V ≤ VPFD ≤ 3.0V
VCC = 2.7V to 3.3V
THS = VOUT: 2.5 ≤ VPFD ≤ 2.7V
■
Reset output (RST) for power on reset
■
Battery low pin (BL)
■
Less than 12ns chip enable access
propagation delay (for 5.0V device)
■
Packaging includes a 28-lead SOIC and
SNAPHAT® top (to be ordered separately), or
A 16-lead SOIC
■
SOIC package provides direct connection for a
SNAPHAT top which contains the battery
■
RoHS compliant
– Lead-free second level interconnect
November 2007
16
1
SO16 (MQ)
SNAPHAT (SH)
crystal/battery
28
1
SOH28 (MH)
Rev 4
1/25
www.st.com
1
Contents
M40Z300, M40Z300W
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1
Two to four decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2
Data retention lifetime calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3
Power-on reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.4
Battery low pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.5
VCC noise and negative going transients . . . . . . . . . . . . . . . . . . . . . . . . . 11
3
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2/25
M40Z300, M40Z300W
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
DC and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Power down/up mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SOH28 – 28-lead plastic small outline, battery SNAPHAT, package mechanical data . . . 19
SH – 4-pin SNAPHAT housing for 48mAh battery, package mechanical data . . . . . . . . . . 20
SH – 4-pin SNAPHAT housing for 120mAh battery, package mechanical data . . . . . . . . . 21
SO16 – 16-lead plastic small outline, 150 mils body width, package mechanical data . . . 22
Ordering information example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SNAPHAT® battery table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3/25
List of figures
M40Z300, M40Z300W
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
4/25
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
28-pin SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
M40Z300 16-pin SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
M40Z300W 16-pin SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Address-decode time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Supply voltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
AC testing load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Power down timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Power up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT, package outline . . . . 18
SH – 4-pin SNAPHAT housing for 48mAh battery, package outline. . . . . . . . . . . . . . . . . . 20
SH – 4-pin SNAPHAT housing for 120mAh battery, package outline. . . . . . . . . . . . . . . . . 21
SO16 – 16-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . 22
M40Z300, M40Z300W
1
Description
Description
The M40Z300/W NVRAM SUPERVISOR is a self-contained device which converts a
standard low-power SRAM into a non-volatile memory. A precision voltage reference and
comparator monitors the VCC input for an out-of-tolerance condition.
When an invalid VCC condition occurs, the conditioned chip enable outputs (E1CON to
E4CON) are forced inactive to write-protect the stored data in the SRAM. During a power
failure, the SRAM is switched from the VCC pin to the lithium cell within the SNAPHAT® to
provide the energy required for data retention. On a subsequent power-up, the SRAM
remains write protected until a valid power condition returns.
The 28-pin, 330mil SOIC provides sockets with gold plated contacts for direct connection to
a separate SNAPHAT housing containing the battery. The SNAPHAT housing has gold
plated pins which mate with the sockets, ensuring reliable connection. The housing is keyed
to prevent improper insertion. This unique design allows the SNAPHAT battery package to
be mounted on top of the SOIC package after the completion of the surface mount process
which greatly reduces the board manufacturing process complexity of either directly
soldering or inserting a battery into a soldered holder. Providing non-volatility becomes a
“SNAP.” The 16-pin SOIC provides battery pins for an external user-supplied battery.
Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the
high temperatures required for device surface-mounting. The SNAPHAT housing is also
keyed to prevent reverse insertion.
The 28-pin SOIC and battery packages are shipped separately in plastic anti-static tubes or
in tape & reel form. For the 28-lead SOIC, the battery/crystal package (e.g., SNAPHAT) part
number is “M4ZXX-BR00SH” (see Table 13 on page 23).
Caution:
Do not place the SNAPHAT battery top in conductive foam, as this will drain the lithium
button-cell battery.
5/25
Description
M40Z300, M40Z300W
Figure 1.
Logic diagram
VCC
B+
(1)
THS
VOUT
BL
E
B
A
E1CON
M40Z300
M40Z300W
E2CON
E3CON
E4CON
RST
VSS
B –(1)
AI02242
1. For 16-pin SOIC package only.
Table 1.
Signal names
THS
Threshold select input
E
Chip enable input
E1CON - E4CON
Conditioned chip enable output
A, B
Decoder inputs
RST
Reset output (open drain)
BL
Battery low output (open drain)
VOUT
Supply voltage output
VCC
Supply voltage
VSS
Ground
B+
Positive battery pin
B–
Negative battery pin(1)
NC
Not connected internally
1. For M40Z300W, B– must be connected to the negative battery terminal only (not to Pin 8, VSS).
6/25
M40Z300, M40Z300W
Figure 2.
Description
28-pin SOIC connections
VOUT
NC
NC
RST
NC
A
NC
B
NC
BL
NC
NC
THS
VSS
28
1
2
27
3
26
4
25
5
24
6
23
7 M40Z300 22
8 M40Z300W 21
9
20
10
19
11
18
12
17
13
16
14
15
VCC
E
NC
NC
NC
E1CON
E2CON
NC
E3CON
NC
NC
NC
E4CON
NC
AI02243
Figure 3.
M40Z300 16-pin SOIC connections
VOUT
NC
RST
A
B
BL
THS
VSS
1
2
3
4
5
6
7
8
16
15
14
13
M40Z300
12
11
10
9
VCC
B+
E
E1CON
E2CON
E3CON
E4CON
B–
AI03624
Figure 4.
M40Z300W 16-pin SOIC connections
VOUT
NC
RST
A
B
BL
THS
VSS
16
1
2
15
3
14
4
13
M40Z300W
5
12
6
11
7
10
8
9
VCC
B – (1)
E
E1CON
E2CON
E3CON
E4CON
B+
AI06350
1. For M40Z300W, B– must be connected to the negative battery terminal only (not to pin 8, VSS).
7/25
Description
Figure 5.
M40Z300, M40Z300W
Hardware hookup
3.0V, 3.3V or 5V
VCC
VOUT
VCC
0.1μF
(1)
E2
CMOS
SRAM
M40Z300
M40Z300W
0.1μF
B
E
Threshold
VCC
VCC
E2(1)
E2(1)
E2(1)
CMOS
SRAM
0.1μF
E
A
VCC
CMOS
SRAM
0.1μF
E
CMOS
SRAM
0.1μF
E
E
E1CON
E2CON
E3CON
E4CON
THS
RST
VSS
BL
To Microprocessor
To Battery Monitor Circuit
AI02395
1. If the second chip enable pin (E2) is unused, it should be tied to VOUT.
8/25
M40Z300, M40Z300W
2
Operation
Operation
The M40Z300/W, as shown in Figure 5 on page 8, can control up to four (eight, if placed in
parallel) standard low-power SRAMs. These SRAMs must be configured to have the chip
enable input disable all other input signals. Most slow, low-power SRAMs are configured like
this, however many fast SRAMs are not. During normal operating conditions, the
conditioned chip enable (E1CON to E4CON) output pins follow the chip enable (E) input pin
with timing shown in Figure 6 on page 10 and Table 7 on page 17. An internal switch
connects VCC to VOUT. This switch has a voltage drop of less than 0.3V (IOUT1).
When VCC degrades during a power failure, E1CON to E4CON are forced inactive
independent of E. In this situation, the SRAM is unconditionally write protected as VCC falls
below an out-of-tolerance threshold (VPFD). For the M40Z300 the power fail detection value
associated with VPFD is selected by the Threshold Select (THS) pin and is shown in Table 6
on page 15. For the M40Z300W, the THS pin selects both the supply voltage and VPFD (also
shown in Table 6 on page 15).
Note:
In either case, THS pin must be connected to either VSS or VOUT.
If chip enable access is in progress during a power fail detection, that memory cycle
continues to completion before the memory is write protected. If the memory cycle is not
terminated within time tWPT, E1CON to E4CON are unconditionally driven high, write
protecting the SRAM. A power failure during a WRITE cycle may corrupt data at the
currently addressed location, but does not jeopardize the rest of the SRAM's contents. At
voltages below VPFD (min), the user can be assured the memory will be write protected
within the Write Protect Time (tWPT) provided the VCC fall time exceeds tF (see Figure 6 on
page 10).
As VCC continues to degrade, the internal switch disconnects VCC and connects the internal
battery to VOUT. This occurs at the switchover voltage (VSO). Below the VSO, the battery
provides a voltage VOHB to the SRAM and can supply current IOUT2 (see Table 6 on
page 15).
When VCC rises above VSO, VOUT is switched back to the supply voltage. Outputs E1CON to
E4CON are held inactive for tCER (120ms maximum) after the power supply has reached
VPFD, independent of the E input, to allow for processor stabilization (see Figure 10 on
page 16).
9/25
Operation
2.1
M40Z300, M40Z300W
Two to four decode
The M40Z300/W includes a 2 input (A, B) decoder which allows the control of up to 4
independent SRAMs. The Truth Table for these inputs is shown in Table 2.
Table 2.
Truth table
Inputs
Outputs
E
B
A
E1CON
E2CON
E3CON
E4CON
H
X
X
H
H
H
H
L
L
L
L
H
H
H
L
L
H
H
L
H
H
L
H
L
H
H
L
H
L
H
H
H
H
H
L
Figure 6.
Address-decode time
A, B
tAS
E
tEDL
tEDH
E1CON - E4CON
AI02551
Note:
During system design, compliance with the SRAM timing parameters must comprehend the
propagation delay between E1CON - E4CON.
2.2
Data retention lifetime calculation
Most low power SRAMs on the market today can be used with the M40Z300/W NVRAM
SUPERVISOR. There are, however some criteria which should be used in making the final
choice of which SRAM to use. The SRAM must be designed in a way where the chip enable
input disables all other inputs to the SRAM. This allows inputs to the M40Z300/W and
SRAMs to be “Don't Care” once VCC falls below VPFD(min). The SRAM should also
guarantee data retention down to VCC = 2.0V. The chip enable access time must be
sufficient to meet the system needs with the chip enable propagation delays included. If the
SRAM includes a second chip enable pin (E2), this pin should be tied to VOUT.
If data retention lifetime is a critical parameter for the system, it is important to review the
data retention current specifications for the particular SRAMs being evaluated. Most SRAMs
specify a data retention current at 3.0V. Manufacturers generally specify a typical condition
for room temperature along with a worst case condition (generally at elevated
temperatures). The system level requirements will determine the choice of which value to
use.
The data retention current value of the SRAMs can then be added to the IBAT value of the
M40Z300/W to determine the total current requirements for data retention. The available
10/25
M40Z300, M40Z300W
Operation
battery capacity for the SNAPHAT® of your choice can then be divided by this current to
determine the amount of data retention available (see Table 13 on page 23).
Caution:
Take care to avoid inadvertent discharge through VOUT and E1CON - E4CON after battery has
been attached.
For a further more detailed review of lifetime calculations, please see Application Note
AN1012.
2.3
Power-on reset output
All microprocessors have a reset input which forces them to a known state when starting.
The M40Z300/W has a reset output (RST) pin which is guaranteed to be low within tWPT of
VPFD (see Table 7). This signal is an open drain configuration. An appropriate pull-up
resistor should be chosen to control the rise time. This signal will be valid for all voltage
conditions, even when VCC equals VSS.
Once VCC exceeds the power failure detect voltage VPFD, an internal timer keeps RST low
for tREC to allow the power supply to stabilize.
2.4
Battery low pin
The M40Z300/W automatically performs battery voltage monitoring upon power-up, and at
factory-programmed time intervals of at least 24 hours. The Battery Low (BL) pin will be
asserted if the battery voltage is found to be less than approximately 2.5V. The BL pin will
remain asserted until completion of battery replacement and subsequent battery low
monitoring tests, either during the next power-up sequence or the next scheduled 24-hour
interval.
If a battery low is generated during a power-up sequence, this indicates that the battery is
below 2.5V and may not be able to maintain data integrity in the SRAM. Data should be
considered suspect, and verified as correct. A fresh battery should be installed.
If a battery low indication is generated during the 24-hour interval check, this indicates that
the battery is near end of life. However, data is not compromised due to the fact that a
nominal VCC is supplied. In order to insure data integrity during subsequent periods of
battery back-up mode, the battery should be replaced. The SNAPHAT® top should be
replaced with valid VCC applied to the device.
The M40Z300/W only monitors the battery when a nominal VCC is applied to the device.
Thus appli-cations which require extensive durations in the battery back-up mode should be
powered-up periodically (at least once every few months) in order for this technique to be
beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon
power-up via a checksum or other technique. The BL pin is an open drain output and an
appropriate pull-up resistor to VCC should be chosen to control the rise time.
2.5
VCC noise and negative going transients
ICC transients, including those produced by output switching, can produce voltage
fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if
capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the
bypass capacitors will be released as low going spikes are generated or energy will be
11/25
Operation
M40Z300, M40Z300W
absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1µF (as shown in
Figure 7) is recommended in order to provide the needed filtering.
In addition to transients that are caused by normal SRAM operation, power cycling can
generate negative voltage spikes on VCC that drive it to values below VSS by as much as
one volt. These negative spikes can cause data corruption in the SRAM while in battery
backup mode. To protect from these voltage spikes, STMicroelectronics recommends
connecting a schottky diode from VCC to VSS (cathode connected to VCC, anode to VSS).
Schottky diode 1N5817 is recommended for through hole and MBRS120T3 is
recommended for surface mount.
Figure 7.
Supply voltage protection
VCC
VCC
0.1μF
DEVICE
VSS
AI00622
12/25
M40Z300, M40Z300W
3
Maximum rating
Maximum rating
Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 3.
Absolute maximum ratings
Symbol
TA
TSTG
TSLD(1)
Parameter
Value
Unit
0 to 70
°C
–40 to 85
°C
–40 to 85
°C
–55 to 125
°C
260
°C
–0.3 to VCC + 0.3
V
M40Z300
–0.3 to 7.0
V
M40Z300W
Grade 1
Ambient operating temperature
Storage temperature
Grade 6
SNAPHAT
®
SOIC
Lead solder temperature for 10 seconds
VIO
Input or output voltage
VCC
Supply voltage
–0.3 to 4.6
V
IO
Output current
20
mA
PD
Power dissipation
1
W
1. For SO package, Lead-free (Pb-free) lead finish: Reflow at peak temperature of 260°C (total thermal
budget not to exceed 245°C for greater than 30 seconds).
Caution:
Negative undershoots below –0.3V are not allowed on any pin while in the battery back-up
mode.
Caution:
Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
13/25
DC and AC parameters
4
M40Z300, M40Z300W
DC and AC parameters
This section summarizes the operating and measurement conditions, as well as the DC and
AC characteristics of the device. The parameters in the following DC and AC Characteristic
tables are derived from tests performed under the Measurement Conditions listed in Table 4:
DC and AC measurement conditions. Designers should check that the operating conditions
in their projects match the measurement conditions when using the quoted parameters.
Table 4.
DC and AC measurement conditions
Parameter
M40Z300
M40Z300W
4.5 to 5.5V
2.7 to 3.6V
Grade 1
0 to 70°C
0 to 70°C
Grade 6
–40 to 85°C
–40 to 85°C
Load capacitance (CL)
100pF
50pF
Input rise and fall times
≤ 5ns
≤ 5ns
0 to 3V
0 to 3V
1.5V
1.5V
VCC supply voltage
Ambient operating temperature
Input pulse voltages
Input and output timing ref. voltages
Note:
Output High Z is defined as the point where data is no longer driven.
Figure 8.
AC testing load circuit
333Ω
DEVICE
UNDER
TEST
CL = 100pF
or 50pF
CL includes JIG capacitance
Note:
AI02393
50pF for M40Z300W.
Table 5.
Capacitance
Parameter(1)(2)
Symbol
CIN
Input capacitance
COUT(3) Input/output capacitance
1. Sampled only, not 100% tested.
2. At 25°C, f = 1MHz.
3. Outputs deselected.
14/25
1.73V
Min
Max
Unit
8
pF
10
pF
M40Z300, M40Z300W
Table 6.
Sym
DC and AC parameters
DC characteristics
M40Z300
Test condition(1)
Parameter
M40Z300W
Unit
Min
Typ
Max
ILI(2)
Input leakage current
ICC
Supply current
VIL
Input low voltage
–0.3
0.8
VIH
Input high voltage
2.2
VCC + 0.3
0V ≤ VIN ≤ VCC
Min
Typ
±1
Outputs open
3
Max
±1
µA
4
mA
–0.3
0.8
V
2.0
VCC + 0.3
V
6
2
Output low voltage
IOL = 4.0mA
0.4
0.4
V
VOL
Output low voltage
(open drain)(3)
IOL = 10mA
0.4
0.4
V
VOH
Output high voltage
VOHB VOH battery back-up
(4)
IOUT1 VOUT current (active)
IOH = –2.0mA
2.4
IOUT2 = –1.0µA
2.0
3.6
2.0
2.9
3.6
V
250
150
mA
VOUT > VCC –0.2
150
100
mA
VOUT current (battery
back-up)
ICCDR
Data retention mode
current(5)
THS
Threshold select
voltage
VSS
Power-fail deselect
voltage (THS = VSS)
4.5
Power-fail deselect
voltage (THS = VOUT)
4.2
VSO
2.9
V
VOUT > VCC –0.3
IOUT2
VPFD
2.4
VOUT > VBAT –0.3
100
100
Battery back-up
switchover voltage
VBAT Battery voltage
100
100
nA
VOUT
V
VOUT
VSS
4.6
4.75
2.8
2.9
3.0
V
4.35
4.5
2.5
2.6
2.7
V
3.0
2.0
µA
2.9
2.5
3.6
2.0
2.9
V
3.6
V
1. Valid for ambient operating temperature: TA = 0 to 70°C or –40 to 85°C; VCC = 2.7 to 3.6V or 4.5 to 5.5V (except where
noted).
2. Outputs deselected.
3. For RST & BL pins (open drain).
4. Chip enable outputs (E1CON - E4CON) can only sustain CMOS leakage currents in the battery back-up mode.
Higher leakage currents will reduce battery life.
5. Measured with VOUT and E1CON - E4CON open.
15/25
DC and AC parameters
Figure 9.
M40Z300, M40Z300W
Power down timing
VCC
VPFD (max)
VPFD
VPFD (min)
VSO
tF
tFB
E
tWPT
VOHB
E1CON-E4CON
RST
AI02398B
Figure 10. Power up timing
VCC
VPFD (max)
VPFD
VPFD (min)
VSO
tR
tRB
tCER
E
tEDH
E1CON-E4CON
tEDL
VOHB
tREC
RST
AI02399B
16/25
M40Z300, M40Z300W
Table 7.
DC and AC parameters
Power down/up mode AC characteristics
Parameter(1)
Symbol
tF(2)
VPFD (max) to VPFD (min) VCC fall time
tFB(3)
VPFD (min) to VSS VCC fall time
tR
Chip enable propagation delay low
tEDH
Chip enable propagation delay high
tCER
tREC(4)
tWPT
tRB
Max
Unit
300
µs
M40Z300
10
µs
M40Z300W
150
µs
10
µs
VPFD(min) to VPFD (max) VCC rise time
tEDL
tAS
Min
M40Z300
12
ns
M40Z300W
20
ns
M40Z300
10
ns
20
ns
M40Z300W
A, B set up to E
0
Chip enable recovery
40
120
ms
VPFD (max) to RST high
40
120
ms
M40Z300
40
150
µs
M40Z300W
40
250
µs
Write protect time
VSS to VPFD (min) VCC rise time
ns
1
µs
1. Valid for ambient operating temperature: TA = 0 to 70°C or –40 to 85°C; VCC = 2.7 to 3.6V or 4.5 to
5.5V(except where noted).
2. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring
until 200 µs after VCC passes VPFD (min).
3. VPFD (min) to VSS fall time of less than tFB may cause corruption of RAM data.
4. tREC (min) = 20ms for industrial temperature Grade 6 device.
17/25
Package mechanical data
5
M40Z300, M40Z300W
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
Figure 11. SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT,
package outline
A2
A
C
B
eB
e
CP
D
N
E
H
A1
1
SOH-A
Note:
18/25
Drawing is not to scale.
α
L
M40Z300, M40Z300W
Table 8.
Package mechanical data
SOH28 – 28-lead plastic small outline, battery SNAPHAT, package
mechanical data
mm
inches
Symbol
Typ
Min
A
Max
Typ
Min
3.05
Max
0.120
A1
0.05
0.36
0.002
0.014
A2
2.34
2.69
0.092
0.106
B
0.36
0.51
0.014
0.020
C
0.15
0.32
0.006
0.012
D
17.71
18.49
0.697
0.728
E
8.23
8.89
0.324
0.350
–
–
–
–
eB
3.20
3.61
0.126
0.142
H
11.51
12.70
0.453
0.500
L
0.41
1.27
0.016
0.050
a
0°
8°
0°
8°
N
28
e
CP
1.27
0.050
28
0.10
0.004
19/25
Package mechanical data
M40Z300, M40Z300W
Figure 12. SH – 4-pin SNAPHAT housing for 48mAh battery, package outline
A1
A2
A3
A
eA
B
L
eB
D
E
SHZP-A
Note:
Drawing is not to scale.
Table 9.
SH – 4-pin SNAPHAT housing for 48mAh battery, package mechanical data
mm
inches
Symbol
Typ
Min
A
Typ
Min
9.78
Max
0.385
A1
6.73
7.24
0.265
0.285
A2
6.48
6.99
0.255
0.275
A3
20/25
Max
0.38
0.015
B
0.46
0.56
0.018
0.022
D
21.21
21.84
0.835
0.860
E
14.22
14.99
0.560
0.590
eA
15.55
15.95
0.612
0.628
eB
3.20
3.61
0.126
0.142
L
2.03
2.29
0.080
0.090
M40Z300, M40Z300W
Package mechanical data
Figure 13. SH – 4-pin SNAPHAT housing for 120mAh battery, package outline
A1
A2
A3
A
eA
B
L
eB
D
E
SHZP-A
Note:
Drawing is not to scale.
Table 10.
SH – 4-pin SNAPHAT housing for 120mAh battery, package mechanical data
mm
inches
Symbol
Typ
Min
A
Max
Typ
Min
10.54
Max
0.415
A1
8.00
8.51
0.315
.0335
A2
7.24
8.00
0.285
0.315
A3
B
0.38
0.46
0.56
0.015
0.018
0.022
D
21.21
21.84
0.835
0.860
E
17.27
18.03
0.680
0.710
eA
15.55
15.95
0.612
0.628
eB
3.20
3.61
0.126
0.142
L
2.03
2.29
0.080
0.090
21/25
Package mechanical data
M40Z300, M40Z300W
Figure 14. SO16 – 16-lead plastic small outline, 150 mils body width, package
outline
A2
A
C
B
CP
e
D
N
E
H
1
A1
α
L
SO-b
Note:
Drawing is not to scale.
Table 11.
SO16 – 16-lead plastic small outline, 150 mils body width, package
mechanical data
mm
inches
Symbol
Typ.
Min.
A
Typ.
Min.
1.75
A1
0.10
A2
Max.
0.069
0.25
0.004
1.60
0.010
0.063
B
0.35
0.46
0.014
0.018
C
0.19
0.25
0.007
0.010
D
9.80
10.00
0.386
0.394
E
3.80
4.00
0.150
0.158
–
–
–
–
H
5.80
6.20
0.228
0.244
L
0.40
1.27
0.016
0.050
a
0°
8°
0°
8°
N
16
e
CP
22/25
Max.
1.27
0.050
16
0.10
0.004
M40Z300, M40Z300W
6
Part numbering
Part numbering
Table 12.
Ordering information example
Example:
M40Z
300W
MH
1
E
Device type
M40Z
Supply and write protect voltage
300 = VCC = 4.5 to 5.5V
THS = VSS = 4.5V ≤ VPFD ≤ 4.75V
THS = VOUT = 4.2V ≤ VPFD ≤ 4.5V
300W = VCC = 3.0 to 3.6V
THS = VSS = 2.8V ≤ VPFD ≤ 3.0V
VCC = 2.7V to 3.3V
THS = VOUT = 2.5V ≤ VPFD ≤ 2.7V
Package
MH (1) = SOH28
MQ = SO16
Temperature range
1 = 0 to 70°C
6 = –40 to 85°C
Shipping method for SOIC
E = Lead-free package (ECOPACK®), tubes
F = Lead-free package (ECOPACK®), tape & reel
1. The SOIC package (SOH28) requires the battery package (SNAPHAT®) which is ordered separately under
the part number “M4Zxx-BR00SH” in plastic tubes or “M4Zxx-BR00SHTR” in tape & reel form.
Caution:
Do not place the SNAPHAT battery package “M4Zxx-BR00SH” in conductive foam as it will
drain the lithium button-cell battery.
For other options, or for more information on any aspect of this device, please contact the
ST sales office nearest you.
Table 13.
SNAPHAT® battery table
Part number
Description
Package
M4Z28-BR00SH1
Lithium battery (48mAh) SNAPHAT
SH
M4Z32-BR00SH1
Lithium battery (120mAh) SNAPHAT
SH
23/25
Revision history
7
M40Z300, M40Z300W
Revision history
Table 14.
24/25
Document revision history
Date
Revision
Changes
Mar-1999
1.0
First Issue
08-Mar-2000
1.1
Document Layout changed; SO16 package added; Battery Capacity
changed (Table 13)
22-Sep-2000
1.2
SO16 package measures change
23-Feb-2001
1.3
Added information for Industrial Temperature (Table 3, 7, 12)
30-May-2001
1.4
Change “Controller” references to “SUPERVISOR”
10-Jul-2001
2.0
Reformatted; added temp/voltage info. to tables (Table 6, 7); Figures
changed (Figure 1, 3, 5, 8, 6)
01-Aug-2001
2.1
E2 connections added to Hookup (Figure 5)
15-Jan-2002
2.2
16-pin SOIC Connections split, graphic added (Figure 4); addition to
hardware hookup (Figure 5)
13-May-2002
2.3
Modify reflow time and temperature footnote (Table 3)
31-Oct-2003
2.4
Update DC Characteristics (Table 6)
04-Nov-2003
2.5
Correct DC Characteristics (Table 6)
23-Feb-2005
3.0
Reformatted; IR reflow, SO package updates (Table 3)
05-Nov-2007
4.0
Reformatted; added lead-free second level interconnect to cover
page and Section 5: Package mechanical data; updated Figure 10
and Table 3, 12, 13.
M40Z300, M40Z300W
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